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[ARM] 3830/1: iop3xx: board support file cleanup

Browse source 
Revamp the iop3xx board support: move the support code for each iop
board type into its own file, start using platform serial and platform
physmap flash devices, switch to a per-board time tick rate, and get
rid of the ARCH_EP80219 and STEPD config options by doing the relevant
checks at run time.

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Lennert Buytenhek 2006-09-18 23:24:52 +01:00 • committed by Russell King
commit c680b77efe
32 changed files with 911 additions and 944 deletions
Download patch file Download diff file Expand all files Collapse all files

12
include/asm-arm/arch-iop32x/iop321.h
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@ -150,18 +150,6 @@
#define IOP321_IINTSRC (volatile u32 *)IOP321_REG_ADDR(0x000007D8)
#define IOP321_FINTSRC (volatile u32 *)IOP321_REG_ADDR(0x000007DC)
/* Timers */
#ifdef CONFIG_ARCH_IQ80321
#define IOP321_TICK_RATE 200000000 /* 200 MHz clock */
#elif defined(CONFIG_ARCH_IQ31244)
#define IOP321_TICK_RATE 198000000 /* 33.000 MHz crystal */
#endif
#ifdef CONFIG_ARCH_EP80219
#undef IOP321_TICK_RATE
#define IOP321_TICK_RATE 200000000 /* 33.333333 Mhz crystal */
#endif
/* Application accelerator unit 0x00000800 - 0x000008FF */
#define IOP321_AAU_ACR (volatile u32 *)IOP321_REG_ADDR(0x00000800)
#define IOP321_AAU_ASR (volatile u32 *)IOP321_REG_ADDR(0x00000804)

7
include/asm-arm/arch-iop32x/iq31244.h
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@ -7,18 +7,11 @@
#ifndef _IQ31244_H_
#define _IQ31244_H_
#define IQ31244_FLASHBASE 0xf0000000 /* Flash */
#define IQ31244_FLASHSIZE 0x00800000
#define IQ31244_FLASHWIDTH 2
#define IQ31244_UART 0xfe800000 /* UART #1 */
#define IQ31244_7SEG_1 0xfe840000 /* 7-Segment MSB */
#define IQ31244_7SEG_0 0xfe850000 /* 7-Segment LSB (WO) */
#define IQ31244_ROTARY_SW 0xfe8d0000 /* Rotary Switch */
#define IQ31244_BATT_STAT 0xfe8f0000 /* Battery Status */
#ifndef __ASSEMBLY__
extern void iq31244_map_io(void);
#endif
#endif // _IQ31244_H_

7
include/asm-arm/arch-iop32x/iq80321.h
View file

@ -7,18 +7,11 @@
#ifndef _IQ80321_H_
#define _IQ80321_H_
#define IQ80321_FLASHBASE 0xf0000000 /* Flash */
#define IQ80321_FLASHSIZE 0x00800000
#define IQ80321_FLASHWIDTH 1
#define IQ80321_UART 0xfe800000 /* UART #1 */
#define IQ80321_7SEG_1 0xfe840000 /* 7-Segment MSB */
#define IQ80321_7SEG_0 0xfe850000 /* 7-Segment LSB (WO) */
#define IQ80321_ROTARY_SW 0xfe8d0000 /* Rotary Switch */
#define IQ80321_BATT_STAT 0xfe8f0000 /* Battery Status */
#ifndef __ASSEMBLY__
extern void iq80321_map_io(void);
#endif
#endif // _IQ80321_H_

38
include/asm-arm/arch-iop32x/irqs.h
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@ -47,42 +47,4 @@
#define NR_IRQS 32
/*
* Interrupts available on the IQ80321 board
*/
/*
* On board devices
*/
#define IRQ_IQ80321_I82544 IRQ_IOP321_XINT0
#define IRQ_IQ80321_UART IRQ_IOP321_XINT1
/*
* PCI interrupts
*/
#define IRQ_IQ80321_INTA IRQ_IOP321_XINT0
#define IRQ_IQ80321_INTB IRQ_IOP321_XINT1
#define IRQ_IQ80321_INTC IRQ_IOP321_XINT2
#define IRQ_IQ80321_INTD IRQ_IOP321_XINT3
/*
* Interrupts on the IQ31244 board
*/
/*
* On board devices
*/
#define IRQ_IQ31244_UART IRQ_IOP321_XINT1
#define IRQ_IQ31244_I82546 IRQ_IOP321_XINT0
#define IRQ_IQ31244_SATA IRQ_IOP321_XINT2
#define IRQ_IQ31244_PCIX_SLOT IRQ_IOP321_XINT3
/*
* PCI interrupts
*/
#define IRQ_IQ31244_INTA IRQ_IOP321_XINT0
#define IRQ_IQ31244_INTB IRQ_IOP321_XINT1
#define IRQ_IQ31244_INTC IRQ_IOP321_XINT2
#define IRQ_IQ31244_INTD IRQ_IOP321_XINT3
#endif // _IRQ_H_

5
include/asm-arm/arch-iop33x/hardware.h
View file

@ -22,6 +22,11 @@
#define PCIBIOS_MIN_IO 0x00000000
#define PCIBIOS_MIN_MEM 0x00000000
#ifndef __ASSEMBLY__
extern struct platform_device iop33x_uart0_device;
extern struct platform_device iop33x_uart1_device;
#endif
/*
* Generic chipset bits

10
include/asm-arm/arch-iop33x/iop331.h
View file

@ -136,16 +136,6 @@
#define IOP331_FINTVEC (volatile u32 *)IOP331_REG_ADDR(0x000007CC)
/* Timers */
#if defined(CONFIG_ARCH_IOP33X)
#define IOP331_TICK_RATE 266000000 /* 266 MHz IB clock */
#endif
#if defined(CONFIG_IOP331_STEPD) || defined(CONFIG_ARCH_IQ80333)
#undef IOP331_TICK_RATE
#define IOP331_TICK_RATE 333000000 /* 333 Mhz IB clock */
#endif
/* Application accelerator unit 0x00000800 - 0x000008FF */
#define IOP331_AAU_ACR (volatile u32 *)IOP331_REG_ADDR(0x00000800)
#define IOP331_AAU_ASR (volatile u32 *)IOP331_REG_ADDR(0x00000804)

7
include/asm-arm/arch-iop33x/iq80331.h
View file

@ -7,17 +7,10 @@
#ifndef _IQ80331_H_
#define _IQ80331_H_
#define IQ80331_FLASHBASE 0xc0000000 /* Flash */
#define IQ80331_FLASHSIZE 0x00800000
#define IQ80331_FLASHWIDTH 1
#define IQ80331_7SEG_1 0xce840000 /* 7-Segment MSB */
#define IQ80331_7SEG_0 0xce850000 /* 7-Segment LSB (WO) */
#define IQ80331_ROTARY_SW 0xce8d0000 /* Rotary Switch */
#define IQ80331_BATT_STAT 0xce8f0000 /* Battery Status */
#ifndef __ASSEMBLY__
extern void iq80331_map_io(void);
#endif
#endif // _IQ80331_H_

7
include/asm-arm/arch-iop33x/iq80332.h
View file

@ -7,17 +7,10 @@
#ifndef _IQ80332_H_
#define _IQ80332_H_
#define IQ80332_FLASHBASE 0xc0000000 /* Flash */
#define IQ80332_FLASHSIZE 0x00800000
#define IQ80332_FLASHWIDTH 1
#define IQ80332_7SEG_1 0xce840000 /* 7-Segment MSB */
#define IQ80332_7SEG_0 0xce850000 /* 7-Segment LSB (WO) */
#define IQ80332_ROTARY_SW 0xce8d0000 /* Rotary Switch */
#define IQ80332_BATT_STAT 0xce8f0000 /* Battery Status */
#ifndef __ASSEMBLY__
extern void iq80332_map_io(void);
#endif
#endif // _IQ80332_H_

38
include/asm-arm/arch-iop33x/irqs.h
View file

@ -57,42 +57,4 @@
#define NR_IRQS 64
/*
* Interrupts available on the IQ80331 board
*/
/*
* On board devices
*/
#define IRQ_IQ80331_I82544 IRQ_IOP331_XINT0
#define IRQ_IQ80331_UART0 IRQ_IOP331_UART0
#define IRQ_IQ80331_UART1 IRQ_IOP331_UART1
/*
* PCI interrupts
*/
#define IRQ_IQ80331_INTA IRQ_IOP331_XINT0
#define IRQ_IQ80331_INTB IRQ_IOP331_XINT1
#define IRQ_IQ80331_INTC IRQ_IOP331_XINT2
#define IRQ_IQ80331_INTD IRQ_IOP331_XINT3
/*
* Interrupts available on the IQ80332 board
*/
/*
* On board devices
*/
#define IRQ_IQ80332_I82544 IRQ_IOP331_XINT0
#define IRQ_IQ80332_UART0 IRQ_IOP331_UART0
#define IRQ_IQ80332_UART1 IRQ_IOP331_UART1
/*
* PCI interrupts
*/
#define IRQ_IQ80332_INTA IRQ_IOP331_XINT0
#define IRQ_IQ80332_INTB IRQ_IOP331_XINT1
#define IRQ_IQ80332_INTC IRQ_IOP331_XINT2
#define IRQ_IQ80332_INTD IRQ_IOP331_XINT3
#endif // _IRQ_H_