mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-08 04:42:04 -04:00
coresight: Add snapshot of Coresight cti driver
Add snapshot for coresight cti driver from msm-4.19
commit b92521c119 ("net: qrtr: Add node assignment on new server").
Make necessary change to adopt coresight framework change.
Change-Id: I12fb53e9fcaeb59eb748376ab6d8ed469b921f16
Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org>
This commit is contained in:
parent
22d49bcc8d
commit
c69961762f
4 changed files with 1717 additions and 0 deletions
|
|
@ -119,6 +119,69 @@ config CORESIGHT_CPU_DEBUG
|
|||
properly, please refer Documentation/trace/coresight-cpu-debug.rst
|
||||
for detailed description and the example for usage.
|
||||
|
||||
config CORESIGHT_CTI
|
||||
bool "CoreSight Cross Trigger Interface driver"
|
||||
help
|
||||
This driver provides support for Cross Trigger Interface that is
|
||||
used to input or output i.e. pass cross trigger events from one
|
||||
hardware component to another. It can also be used to pass
|
||||
software generated events.
|
||||
|
||||
config CORESIGHT_CTI_SAVE_DISABLE
|
||||
bool "Turn off CTI save and restore"
|
||||
depends on CORESIGHT_CTI
|
||||
help
|
||||
Turns off CoreSight CTI save and restore support for cpu CTIs. This
|
||||
avoids voting for the clocks during probe as well as the associated
|
||||
save and restore latency at the cost of breaking cpu CTI support on
|
||||
targets where cpu CTIs have to be preserved across power collapse.
|
||||
|
||||
If unsure, say 'N' here to avoid breaking cpu CTI support.
|
||||
|
||||
config CORESIGHT_TPDA
|
||||
bool "CoreSight Trace, Profiling & Diagnostics Aggregator driver"
|
||||
help
|
||||
This driver provides support for configuring aggregator. This is
|
||||
primarily useful for pulling the data sets from one or more
|
||||
attached monitors and pushing the resultant data out. Multiple
|
||||
monitors are connected on different input ports of TPDA.
|
||||
|
||||
config CORESIGHT_TPDM
|
||||
bool "CoreSight Trace, Profiling & Diagnostics Monitor driver"
|
||||
help
|
||||
This driver provides support for configuring monitor. Monitors are
|
||||
primarily responsible for data set collection and support the
|
||||
ability to collect any permutation of data set types. Monitors are
|
||||
also responsible for interaction with system cross triggering.
|
||||
|
||||
config CORESIGHT_TPDM_DEFAULT_ENABLE
|
||||
bool "Turn on TPDM tracing by default"
|
||||
depends on CORESIGHT_TPDM
|
||||
help
|
||||
Turns on CoreSight TPDM tracing for different data set types by
|
||||
default. Otherwise, tracing is disabled by default but can be
|
||||
enabled via sysfs.
|
||||
|
||||
If unsure, say 'N' here to avoid potential power and performance
|
||||
penalty.
|
||||
|
||||
config CORESIGHT_CSR
|
||||
bool "CoreSight Slave Register driver"
|
||||
help
|
||||
This driver provides support for CoreSight Slave Register block
|
||||
that hosts miscellaneous configuration registers.
|
||||
Those configuration registers can be used to control, various
|
||||
coresight configurations.
|
||||
|
||||
config CORESIGHT_HWEVENT
|
||||
bool "CoreSight Hardware Event driver"
|
||||
depends on CORESIGHT_STM
|
||||
select CORESIGHT_CSR
|
||||
help
|
||||
This driver provides support for monitoring and tracing CoreSight
|
||||
Hardware Event across STM interface. It configures Coresight
|
||||
Hardware Event mux control registers to select hardware events
|
||||
based on user input.
|
||||
config CORESIGHT_TPDA
|
||||
bool "CoreSight Trace, Profiling & Diagnostics Aggregator driver"
|
||||
help
|
||||
|
|
|
|||
|
|
@ -18,6 +18,7 @@ obj-$(CONFIG_CORESIGHT_SOURCE_ETM4X) += coresight-etm4x.o \
|
|||
obj-$(CONFIG_CORESIGHT_STM) += coresight-stm.o
|
||||
obj-$(CONFIG_CORESIGHT_CPU_DEBUG) += coresight-cpu-debug.o
|
||||
obj-$(CONFIG_CORESIGHT_CATU) += coresight-catu.o
|
||||
obj-$(CONFIG_CORESIGHT_CTI) += coresight-cti.o
|
||||
obj-$(CONFIG_CORESIGHT_TPDA) += coresight-tpda.o
|
||||
obj-$(CONFIG_CORESIGHT_TPDM) += coresight-tpdm.o
|
||||
obj-$(CONFIG_CORESIGHT_HWEVENT) += coresight-hwevent.o
|
||||
|
|
|
|||
1566
drivers/hwtracing/coresight/coresight-cti.c
Normal file
1566
drivers/hwtracing/coresight/coresight-cti.c
Normal file
File diff suppressed because it is too large
Load diff
87
include/linux/coresight-cti.h
Normal file
87
include/linux/coresight-cti.h
Normal file
|
|
@ -0,0 +1,87 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* Copyright (c) 2013-2014, 2019, The Linux Foundation. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef _LINUX_CORESIGHT_CTI_H
|
||||
#define _LINUX_CORESIGHT_CTI_H
|
||||
|
||||
#include <linux/pinctrl/consumer.h>
|
||||
#include <linux/list.h>
|
||||
|
||||
struct coresight_cti_data {
|
||||
int nr_ctis;
|
||||
const char **names;
|
||||
};
|
||||
|
||||
struct coresight_cti {
|
||||
const char *name;
|
||||
struct list_head link;
|
||||
};
|
||||
|
||||
#ifdef CONFIG_CORESIGHT_CTI
|
||||
extern struct coresight_cti *coresight_cti_get(const char *name);
|
||||
extern void coresight_cti_put(struct coresight_cti *cti);
|
||||
extern int coresight_cti_map_trigin(
|
||||
struct coresight_cti *cti, int trig, int ch);
|
||||
extern int coresight_cti_map_trigout(
|
||||
struct coresight_cti *cti, int trig, int ch);
|
||||
extern void coresight_cti_unmap_trigin(
|
||||
struct coresight_cti *cti, int trig, int ch);
|
||||
extern void coresight_cti_unmap_trigout(
|
||||
struct coresight_cti *cti, int trig, int ch);
|
||||
extern void coresight_cti_reset(struct coresight_cti *cti);
|
||||
extern int coresight_cti_set_trig(struct coresight_cti *cti, int ch);
|
||||
extern void coresight_cti_clear_trig(struct coresight_cti *cti, int ch);
|
||||
extern int coresight_cti_pulse_trig(struct coresight_cti *cti, int ch);
|
||||
extern int coresight_cti_enable_gate(struct coresight_cti *cti, int ch);
|
||||
extern void coresight_cti_disable_gate(struct coresight_cti *cti, int ch);
|
||||
extern void coresight_cti_ctx_save(void);
|
||||
extern void coresight_cti_ctx_restore(void);
|
||||
extern int coresight_cti_ack_trig(struct coresight_cti *cti, int trig);
|
||||
#else
|
||||
static inline struct coresight_cti *coresight_cti_get(const char *name)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
static inline void coresight_cti_put(struct coresight_cti *cti) {}
|
||||
static inline int coresight_cti_map_trigin(
|
||||
struct coresight_cti *cti, int trig, int ch)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
static inline int coresight_cti_map_trigout(
|
||||
struct coresight_cti *cti, int trig, int ch)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
static inline void coresight_cti_unmap_trigin(
|
||||
struct coresight_cti *cti, int trig, int ch) {}
|
||||
static inline void coresight_cti_unmap_trigout(
|
||||
struct coresight_cti *cti, int trig, int ch) {}
|
||||
static inline void coresight_cti_reset(struct coresight_cti *cti) {}
|
||||
static inline int coresight_cti_set_trig(struct coresight_cti *cti, int ch)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
static inline void coresight_cti_clear_trig(struct coresight_cti *cti, int ch)
|
||||
{}
|
||||
static inline int coresight_cti_pulse_trig(struct coresight_cti *cti, int ch)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
static inline int coresight_cti_enable_gate(struct coresight_cti *cti, int ch)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
static inline void coresight_cti_disable_gate(struct coresight_cti *cti, int ch)
|
||||
{}
|
||||
static inline void coresight_cti_ctx_save(void){}
|
||||
static inline void coresight_cti_ctx_restore(void){}
|
||||
static inline int coresight_cti_ack_trig(struct coresight_cti *cti, int trig)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
Loading…
Reference in a new issue