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ARM: dts: msm: remove the t-clk-post and t-clk-pre timings from Blair

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The qcom,mdss-dsi-t-clk-post and qcom,mdss-dsi-t-clk-pre panel
properties are not required for DSI ctrl v2.3.0 and above, using
DSI phy v4.0.0 and above. As the Blair is reusing the display
nodes from the Holi target, these two properties are getting
included automatically.

If these properties are defined, the DSI ctrl programs the
DSI_CLKOUT_TIMING_CTRL register for all the DSI PHY versions,
that is not recommended as per the DSI HPG.

We don't need these two for the Blair, remove them from Blair
CDP and MTP platforms.

Change-Id: I81d66c53fabfc389466b0dbf82c8d8678f08868a
This commit is contained in:
Rajeev Nandan 2021-07-20 13:12:00 +05:30 • committed by chenyt17
commit c6a2adb14d
2 changed files with 30 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

21
display/blair-sde-display-cdp.dtsi
View file

@ -70,6 +70,9 @@
};
&dsi_sim_vid {
/delete-property/ qcom,mdss-dsi-t-clk-post;
/delete-property/ qcom,mdss-dsi-t-clk-pre;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [01 09 01 01 1b 1b 01
@ -79,6 +82,9 @@
};
&dsi_rm69299_visionox_amoled_video {
/delete-property/ qcom,mdss-dsi-t-clk-post;
/delete-property/ qcom,mdss-dsi-t-clk-pre;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 20 08 08 18 17 08
@ -88,6 +94,9 @@
};
&dsi_rm69299_visionox_amoled_cmd {
/delete-property/ qcom,mdss-dsi-t-clk-post;
/delete-property/ qcom,mdss-dsi-t-clk-pre;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 20 08 08 18 17 08
@ -114,6 +123,9 @@
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
/delete-property/ qcom,mdss-dsi-t-clk-post;
/delete-property/ qcom,mdss-dsi-t-clk-pre;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 24 09 0a 26 25 09
@ -140,6 +152,9 @@
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
/delete-property/ qcom,mdss-dsi-t-clk-post;
/delete-property/ qcom,mdss-dsi-t-clk-pre;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 1e 08 08 24 22 08
@ -166,6 +181,9 @@
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
/delete-property/ qcom,mdss-dsi-t-clk-post;
/delete-property/ qcom,mdss-dsi-t-clk-pre;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 20 08 08 24 23 08
@ -195,6 +213,9 @@
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0",
"cphy_byte_clk0", "cphy_pixel_clk0";
/delete-property/ qcom,mdss-dsi-t-clk-post;
/delete-property/ qcom,mdss-dsi-t-clk-pre;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 00 00 00 22 1F 06

9
display/blair-sde-display-mtp.dtsi
View file

@ -20,6 +20,9 @@
};
&dsi_sim_vid {
/delete-property/ qcom,mdss-dsi-t-clk-post;
/delete-property/ qcom,mdss-dsi-t-clk-pre;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [01 09 01 01 1b 1b 01
@ -29,6 +32,9 @@
};
&dsi_rm69299_visionox_amoled_video {
/delete-property/ qcom,mdss-dsi-t-clk-post;
/delete-property/ qcom,mdss-dsi-t-clk-pre;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 20 08 08 18 17 08
@ -38,6 +44,9 @@
};
&dsi_rm69299_visionox_amoled_cmd {
/delete-property/ qcom,mdss-dsi-t-clk-post;
/delete-property/ qcom,mdss-dsi-t-clk-pre;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 20 08 08 18 17 08