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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma
Pull slave-dma updates from Vinod Koul:
"Some notable changes are:
- new driver for AMBA AXI NBPF by Guennadi
- new driver for sun6i controller by Maxime
- pl330 drivers fixes from Lar's
- sh-dma updates and fixes from Laurent, Geert and Kuninori
- Documentation updates from Geert
- drivers fixes and updates spread over dw, edma, freescale, mpc512x
etc.."
* 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (72 commits)
dmaengine: sun6i: depends on RESET_CONTROLLER
dma: at_hdmac: fix invalid remaining bytes detection
dmaengine: nbpfaxi: don't build this driver where it cannot be used
dmaengine: nbpf_error_get_channel() can be static
dma: pl08x: Use correct specifier for size_t values
dmaengine: Remove the context argument to the prep_dma_cyclic operation
dmaengine: nbpfaxi: convert to tasklet
dmaengine: nbpfaxi: fix a theoretical race
dmaengine: add a driver for AMBA AXI NBPF DMAC IP cores
dmaengine: add device tree binding documentation for the nbpfaxi driver
dmaengine: edma: Do not register second device when booted with DT
dmaengine: edma: Do not change the error code returned from edma_alloc_slot
dmaengine: rcar-dmac: Add device tree bindings documentation
dmaengine: shdma: Allocate cyclic sg list dynamically
dmaengine: shdma: Make channel filter ignore unrelated devices
dmaengine: sh: Rework Kconfig and Makefile
dmaengine: sun6i: Fix memory leaks
dmaengine: sun6i: Free the interrupt before killing the tasklet
dmaengine: sun6i: Remove switch statement from buswidth convertion routine
dmaengine: of: kconfig: select DMA_ENGINE when DMA_OF is selected
...
This commit is contained in:
commit
c7a19c795b
59 changed files with 4031 additions and 984 deletions
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@ -37,7 +37,6 @@
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*/
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typedef s32 dma_cookie_t;
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#define DMA_MIN_COOKIE 1
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#define DMA_MAX_COOKIE INT_MAX
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static inline int dma_submit_error(dma_cookie_t cookie)
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{
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@ -671,7 +670,7 @@ struct dma_device {
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struct dma_async_tx_descriptor *(*device_prep_dma_cyclic)(
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struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
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size_t period_len, enum dma_transfer_direction direction,
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unsigned long flags, void *context);
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unsigned long flags);
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struct dma_async_tx_descriptor *(*device_prep_interleaved_dma)(
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struct dma_chan *chan, struct dma_interleaved_template *xt,
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unsigned long flags);
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@ -746,7 +745,7 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_cyclic(
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unsigned long flags)
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{
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return chan->device->device_prep_dma_cyclic(chan, buf_addr, buf_len,
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period_len, dir, flags, NULL);
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period_len, dir, flags);
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}
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static inline struct dma_async_tx_descriptor *dmaengine_prep_interleaved_dma(
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@ -41,6 +41,8 @@ extern struct dma_chan *of_dma_request_slave_channel(struct device_node *np,
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const char *name);
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extern struct dma_chan *of_dma_simple_xlate(struct of_phandle_args *dma_spec,
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struct of_dma *ofdma);
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extern struct dma_chan *of_dma_xlate_by_chan_id(struct of_phandle_args *dma_spec,
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struct of_dma *ofdma);
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#else
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static inline int of_dma_controller_register(struct device_node *np,
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struct dma_chan *(*of_dma_xlate)
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@ -66,6 +68,8 @@ static inline struct dma_chan *of_dma_simple_xlate(struct of_phandle_args *dma_s
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return NULL;
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}
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#define of_dma_xlate_by_chan_id NULL
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#endif
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#endif /* __LINUX_OF_DMA_H */
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@ -40,6 +40,7 @@ enum sdma_peripheral_type {
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IMX_DMATYPE_ASRC, /* ASRC */
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IMX_DMATYPE_ESAI, /* ESAI */
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IMX_DMATYPE_SSI_DUAL, /* SSI Dual FIFO */
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IMX_DMATYPE_ASRC_SP, /* Shared ASRC */
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};
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enum imx_dma_prio {
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@ -150,6 +150,8 @@ void edma_clear_event(unsigned channel);
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void edma_pause(unsigned channel);
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void edma_resume(unsigned channel);
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void edma_assign_channel_eventq(unsigned channel, enum dma_event_q eventq_no);
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struct edma_rsv_info {
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const s16 (*rsv_chans)[2];
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@ -95,19 +95,21 @@ struct sh_dmae_pdata {
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};
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/* DMAOR definitions */
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#define DMAOR_AE 0x00000004
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#define DMAOR_AE 0x00000004 /* Address Error Flag */
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#define DMAOR_NMIF 0x00000002
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#define DMAOR_DME 0x00000001
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#define DMAOR_DME 0x00000001 /* DMA Master Enable */
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/* Definitions for the SuperH DMAC */
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#define DM_INC 0x00004000
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#define DM_DEC 0x00008000
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#define DM_FIX 0x0000c000
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#define SM_INC 0x00001000
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#define SM_DEC 0x00002000
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#define SM_FIX 0x00003000
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#define CHCR_DE 0x00000001
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#define CHCR_TE 0x00000002
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#define CHCR_IE 0x00000004
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#define DM_INC 0x00004000 /* Destination addresses are incremented */
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#define DM_DEC 0x00008000 /* Destination addresses are decremented */
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#define DM_FIX 0x0000c000 /* Destination address is fixed */
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#define SM_INC 0x00001000 /* Source addresses are incremented */
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#define SM_DEC 0x00002000 /* Source addresses are decremented */
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#define SM_FIX 0x00003000 /* Source address is fixed */
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#define RS_AUTO 0x00000400 /* Auto Request */
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#define RS_ERS 0x00000800 /* DMA extended resource selector */
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#define CHCR_DE 0x00000001 /* DMA Enable */
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#define CHCR_TE 0x00000002 /* Transfer End Flag */
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#define CHCR_IE 0x00000004 /* Interrupt Enable */
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#endif
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