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Merge branch 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull locking updates from Ingo Molnar:
"The locking tree was busier in this cycle than the usual pattern - a
couple of major projects happened to coincide.
The main changes are:
- implement the atomic_fetch_{add,sub,and,or,xor}() API natively
across all SMP architectures (Peter Zijlstra)
- add atomic_fetch_{inc/dec}() as well, using the generic primitives
(Davidlohr Bueso)
- optimize various aspects of rwsems (Jason Low, Davidlohr Bueso,
Waiman Long)
- optimize smp_cond_load_acquire() on arm64 and implement LSE based
atomic{,64}_fetch_{add,sub,and,andnot,or,xor}{,_relaxed,_acquire,_release}()
on arm64 (Will Deacon)
- introduce smp_acquire__after_ctrl_dep() and fix various barrier
mis-uses and bugs (Peter Zijlstra)
- after discovering ancient spin_unlock_wait() barrier bugs in its
implementation and usage, strengthen its semantics and update/fix
usage sites (Peter Zijlstra)
- optimize mutex_trylock() fastpath (Peter Zijlstra)
- ... misc fixes and cleanups"
* 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (67 commits)
locking/atomic: Introduce inc/dec variants for the atomic_fetch_$op() API
locking/barriers, arch/arm64: Implement LDXR+WFE based smp_cond_load_acquire()
locking/static_keys: Fix non static symbol Sparse warning
locking/qspinlock: Use __this_cpu_dec() instead of full-blown this_cpu_dec()
locking/atomic, arch/tile: Fix tilepro build
locking/atomic, arch/m68k: Remove comment
locking/atomic, arch/arc: Fix build
locking/Documentation: Clarify limited control-dependency scope
locking/atomic, arch/rwsem: Employ atomic_long_fetch_add()
locking/atomic, arch/qrwlock: Employ atomic_fetch_add_acquire()
locking/atomic, arch/mips: Convert to _relaxed atomics
locking/atomic, arch/alpha: Convert to _relaxed atomics
locking/atomic: Remove the deprecated atomic_{set,clear}_mask() functions
locking/atomic: Remove linux/atomic.h:atomic_fetch_or()
locking/atomic: Implement atomic{,64,_long}_fetch_{add,sub,and,andnot,or,xor}{,_relaxed,_acquire,_release}()
locking/atomic: Fix atomic64_relaxed() bits
locking/atomic, arch/xtensa: Implement atomic_fetch_{add,sub,and,or,xor}()
locking/atomic, arch/x86: Implement atomic{,64}_fetch_{add,sub,and,or,xor}()
locking/atomic, arch/tile: Implement atomic{,64}_fetch_{add,sub,and,or,xor}()
locking/atomic, arch/sparc: Implement atomic{,64}_fetch_{add,sub,and,or,xor}()
...
This commit is contained in:
Linus Torvalds
commit
c86ad14d30
108 changed files with 3268 additions and 958 deletions
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@ -98,6 +98,26 @@ static inline int atomic_##op##_return(int i, atomic_t * v) \
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return result; \
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}
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#define ATOMIC_FETCH_OP(op) \
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static inline int atomic_fetch_##op(int i, atomic_t * v) \
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{ \
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unsigned long tmp; \
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int result; \
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\
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__asm__ __volatile__( \
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"1: l32i %1, %3, 0\n" \
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" wsr %1, scompare1\n" \
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" " #op " %0, %1, %2\n" \
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" s32c1i %0, %3, 0\n" \
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" bne %0, %1, 1b\n" \
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: "=&a" (result), "=&a" (tmp) \
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: "a" (i), "a" (v) \
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: "memory" \
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); \
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\
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return result; \
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}
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#else /* XCHAL_HAVE_S32C1I */
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#define ATOMIC_OP(op) \
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@ -138,18 +158,42 @@ static inline int atomic_##op##_return(int i, atomic_t * v) \
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return vval; \
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}
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#define ATOMIC_FETCH_OP(op) \
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static inline int atomic_fetch_##op(int i, atomic_t * v) \
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{ \
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unsigned int tmp, vval; \
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\
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__asm__ __volatile__( \
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" rsil a15,"__stringify(TOPLEVEL)"\n" \
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" l32i %0, %3, 0\n" \
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" " #op " %1, %0, %2\n" \
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" s32i %1, %3, 0\n" \
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" wsr a15, ps\n" \
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" rsync\n" \
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: "=&a" (vval), "=&a" (tmp) \
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: "a" (i), "a" (v) \
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: "a15", "memory" \
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); \
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\
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return vval; \
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}
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#endif /* XCHAL_HAVE_S32C1I */
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#define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_OP_RETURN(op)
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#define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_FETCH_OP(op) ATOMIC_OP_RETURN(op)
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ATOMIC_OPS(add)
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ATOMIC_OPS(sub)
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ATOMIC_OP(and)
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ATOMIC_OP(or)
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ATOMIC_OP(xor)
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#undef ATOMIC_OPS
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#define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_FETCH_OP(op)
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ATOMIC_OPS(and)
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ATOMIC_OPS(or)
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ATOMIC_OPS(xor)
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#undef ATOMIC_OPS
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#undef ATOMIC_FETCH_OP
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#undef ATOMIC_OP_RETURN
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#undef ATOMIC_OP
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@ -11,6 +11,9 @@
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#ifndef _XTENSA_SPINLOCK_H
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#define _XTENSA_SPINLOCK_H
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#include <asm/barrier.h>
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#include <asm/processor.h>
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/*
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* spinlock
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*
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@ -29,8 +32,11 @@
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*/
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#define arch_spin_is_locked(x) ((x)->slock != 0)
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#define arch_spin_unlock_wait(lock) \
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do { while (arch_spin_is_locked(lock)) cpu_relax(); } while (0)
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static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
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{
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smp_cond_load_acquire(&lock->slock, !VAL);
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}
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#define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock)
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