mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-25 06:03:36 -04:00
Merge git://git.linux-xtensa.org/kernel/xtensa-feed
* git://git.linux-xtensa.org/kernel/xtensa-feed: Xtensa: use asm-generic/fcntl.h [XTENSA] Remove non-rt signal handling [XTENSA] Move common sections into bss sections [XTENSA] clean-up header files [XTENSA] Use generic 64-bit division [XTENSA] Remove multi-exported symbols from xtensa_ksyms.c [XTENSA] fix sources using deprecated assembler directive [XTENSA] Spelling fixes in arch/xtensa [XTENSA] fix bit operations in bitops.h
This commit is contained in:
Linus Torvalds
commit
c8d8170feb
26 changed files with 475 additions and 783 deletions
|
|
@ -7,7 +7,7 @@
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|||
* License. See the file "COPYING" in the main directory of this archive
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||||
* for more details.
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||||
*
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||||
* Copyright (C) 2001 - 2005 Tensilica Inc.
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* Copyright (C) 2001 - 2007 Tensilica Inc.
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*/
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#ifndef _XTENSA_BITOPS_H
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@ -31,53 +31,30 @@
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#if XCHAL_HAVE_NSA
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static __inline__ int __cntlz (unsigned long x)
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static inline unsigned long __cntlz (unsigned long x)
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{
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int lz;
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asm ("nsau %0, %1" : "=r" (lz) : "r" (x));
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return 31 - lz;
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return lz;
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}
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#else
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static __inline__ int __cntlz (unsigned long x)
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{
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unsigned long sum, x1, x2, x4, x8, x16;
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x1 = x & 0xAAAAAAAA;
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x2 = x & 0xCCCCCCCC;
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x4 = x & 0xF0F0F0F0;
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x8 = x & 0xFF00FF00;
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x16 = x & 0xFFFF0000;
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sum = x2 ? 2 : 0;
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sum += (x16 != 0) * 16;
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sum += (x8 != 0) * 8;
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sum += (x4 != 0) * 4;
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sum += (x1 != 0);
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return sum;
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}
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#endif
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/*
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* ffz: Find first zero in word. Undefined if no zero exists.
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* bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
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*/
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static __inline__ int ffz(unsigned long x)
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static inline int ffz(unsigned long x)
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{
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if ((x = ~x) == 0)
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return 32;
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return __cntlz(x & -x);
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return 31 - __cntlz(~x & -~x);
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}
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/*
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* __ffs: Find first bit set in word. Return 0 for bit 0
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*/
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static __inline__ int __ffs(unsigned long x)
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static inline int __ffs(unsigned long x)
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{
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return __cntlz(x & -x);
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return 31 - __cntlz(x & -x);
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}
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/*
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@ -86,9 +63,9 @@ static __inline__ int __ffs(unsigned long x)
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* differs in spirit from the above ffz (man ffs).
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*/
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static __inline__ int ffs(unsigned long x)
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static inline int ffs(unsigned long x)
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{
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return __cntlz(x & -x) + 1;
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return 32 - __cntlz(x & -x);
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}
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/*
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@ -96,20 +73,36 @@ static __inline__ int ffs(unsigned long x)
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* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
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*/
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static __inline__ int fls (unsigned int x)
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static inline int fls (unsigned int x)
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{
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return __cntlz(x);
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return 32 - __cntlz(x);
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}
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#else
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/* Use the generic implementation if we don't have the nsa/nsau instructions. */
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# include <asm-generic/bitops/ffs.h>
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# include <asm-generic/bitops/__ffs.h>
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# include <asm-generic/bitops/ffz.h>
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# include <asm-generic/bitops/fls.h>
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#endif
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#include <asm-generic/bitops/fls64.h>
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#include <asm-generic/bitops/find.h>
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#include <asm-generic/bitops/ext2-non-atomic.h>
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#ifdef __XTENSA_EL__
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# define ext2_set_bit_atomic(lock,nr,addr) test_and_set_bit((nr),(addr))
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# define ext2_clear_bit_atomic(lock,nr,addr) test_and_clear_bit((nr),(addr))
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# define ext2_set_bit_atomic(lock,nr,addr) \
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test_and_set_bit((nr), (unsigned long*)(addr))
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# define ext2_clear_bit_atomic(lock,nr,addr) \
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test_and_clear_bit((nr), (unsigned long*)(addr))
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#elif defined(__XTENSA_EB__)
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# define ext2_set_bit_atomic(lock,nr,addr) test_and_set_bit((nr) ^ 0x18, (addr))
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# define ext2_clear_bit_atomic(lock,nr,addr) test_and_clear_bit((nr)^0x18,(addr))
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# define ext2_set_bit_atomic(lock,nr,addr) \
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test_and_set_bit((nr) ^ 0x18, (unsigned long*)(addr))
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# define ext2_clear_bit_atomic(lock,nr,addr) \
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test_and_clear_bit((nr) ^ 0x18, (unsigned long*)(addr))
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#else
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# error processor byte order undefined!
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#endif
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@ -12,6 +12,7 @@
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#define _XTENSA_BYTEORDER_H
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#include <asm/types.h>
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#include <linux/compiler.h>
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static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
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{
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@ -78,4 +79,4 @@ static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
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# error processor byte order undefined!
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#endif
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#endif /* __ASM_XTENSA_BYTEORDER_H */
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#endif /* _XTENSA_BYTEORDER_H */
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@ -64,6 +64,7 @@ typedef struct {
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# define COPROCESSOR_INFO_SIZE 8
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# endif
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#endif
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#endif /* XCHAL_HAVE_CP */
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#ifndef __ASSEMBLY__
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@ -74,8 +75,11 @@ extern void save_coprocessor_registers(void*, int);
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# else
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# define release_coprocessors(task)
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# endif
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#endif
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#endif
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typedef unsigned char cp_state_t[XTENSA_CP_EXTRA_SIZE]
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__attribute__ ((aligned (XTENSA_CP_EXTRA_ALIGN)));
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#endif /* !__ASSEMBLY__ */
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#endif /* _XTENSA_COPROCESSOR_H */
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|
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@ -5,21 +5,12 @@
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* License. See the file "COPYING" in the main directory of this archive
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||||
* for more details.
|
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*
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* Copyright (C) 2001 - 2005 Tensilica Inc.
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* Copyright (C) 2001 - 2007 Tensilica Inc.
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*/
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#ifndef _XTENSA_DIV64_H
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#define _XTENSA_DIV64_H
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#include <linux/types.h>
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#include <asm-generic/div64.h>
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#define do_div(n,base) ({ \
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int __res = n % ((unsigned int) base); \
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n /= (unsigned int) base; \
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__res; })
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static inline uint64_t div64_64(uint64_t dividend, uint64_t divisor)
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{
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return dividend / divisor;
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}
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#endif
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#endif /* _XTENSA_DIV64_H */
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@ -13,7 +13,6 @@
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#ifndef _XTENSA_ELF_H
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#define _XTENSA_ELF_H
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#include <asm/variant/core.h>
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#include <asm/ptrace.h>
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/* Xtensa processor ELF architecture-magic number */
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@ -49,7 +48,7 @@ typedef struct {
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elf_greg_t lcount;
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elf_greg_t sar;
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elf_greg_t syscall;
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elf_greg_t ar[XCHAL_NUM_AREGS];
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elf_greg_t ar[64];
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} xtensa_gregset_t;
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#define ELF_NGREG (sizeof(xtensa_gregset_t) / sizeof(elf_greg_t))
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@ -1,99 +1 @@
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/*
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* include/asm-xtensa/fcntl.h
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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||||
*
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* Copyright (C) 1995, 1996, 1997, 1998 by Ralf Baechle
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* Copyright (C) 2001 - 2005 Tensilica Inc.
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*/
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#ifndef _XTENSA_FCNTL_H
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#define _XTENSA_FCNTL_H
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/* open/fcntl - O_SYNC is only implemented on blocks devices and on files
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located on an ext2 file system */
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#define O_ACCMODE 0003
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#define O_RDONLY 00
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#define O_WRONLY 01
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#define O_RDWR 02
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#define O_CREAT 0100 /* not fcntl */
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#define O_EXCL 0200 /* not fcntl */
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#define O_NOCTTY 0400 /* not fcntl */
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#define O_TRUNC 01000 /* not fcntl */
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#define O_APPEND 02000
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#define O_NONBLOCK 04000
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#define O_NDELAY O_NONBLOCK
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#define O_SYNC 010000
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#define FASYNC 020000 /* fcntl, for BSD compatibility */
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#define O_DIRECT 040000 /* direct disk access hint */
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#define O_LARGEFILE 0100000
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#define O_DIRECTORY 0200000 /* must be a directory */
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#define O_NOFOLLOW 0400000 /* don't follow links */
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#define O_NOATIME 01000000
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#define F_DUPFD 0 /* dup */
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#define F_GETFD 1 /* get close_on_exec */
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#define F_SETFD 2 /* set/clear close_on_exec */
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#define F_GETFL 3 /* get file->f_flags */
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#define F_SETFL 4 /* set file->f_flags */
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#define F_GETLK 5
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#define F_SETLK 6
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#define F_SETLKW 7
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#define F_SETOWN 8 /* for sockets. */
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#define F_GETOWN 9 /* for sockets. */
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#define F_SETSIG 10 /* for sockets. */
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#define F_GETSIG 11 /* for sockets. */
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#define F_GETLK64 12 /* using 'struct flock64' */
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#define F_SETLK64 13
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#define F_SETLKW64 14
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/* for F_[GET|SET]FL */
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#define FD_CLOEXEC 1 /* actually anything with low bit set goes */
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/* for posix fcntl() and lockf() */
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#define F_RDLCK 0
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#define F_WRLCK 1
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#define F_UNLCK 2
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/* for old implementation of bsd flock () */
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#define F_EXLCK 4 /* or 3 */
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#define F_SHLCK 8 /* or 4 */
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/* for leases */
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#define F_INPROGRESS 16
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|
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/* operations for bsd flock(), also used by the kernel implementation */
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#define LOCK_SH 1 /* shared lock */
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#define LOCK_EX 2 /* exclusive lock */
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#define LOCK_NB 4 /* or'd with one of the above to prevent
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blocking */
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#define LOCK_UN 8 /* remove lock */
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#define LOCK_MAND 32 /* This is a mandatory flock */
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#define LOCK_READ 64 /* ... Which allows concurrent read operations */
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#define LOCK_WRITE 128 /* ... Which allows concurrent write operations */
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#define LOCK_RW 192 /* ... Which allows concurrent read & write ops */
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|
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struct flock {
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short l_type;
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short l_whence;
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off_t l_start;
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off_t l_len;
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pid_t l_pid;
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||||
};
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|
||||
struct flock64 {
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||||
short l_type;
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short l_whence;
|
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loff_t l_start;
|
||||
loff_t l_len;
|
||||
pid_t l_pid;
|
||||
};
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|
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#define F_LINUX_SPECIFIC_BASE 1024
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|
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#endif /* _XTENSA_FCNTL_H */
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#include <asm-generic/fcntl.h>
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|
|
|
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|
|
@ -14,6 +14,7 @@
|
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#define _XTENSA_MMU_CONTEXT_H
|
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|
||||
#include <linux/stringify.h>
|
||||
#include <linux/sched.h>
|
||||
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/cacheflush.h>
|
||||
|
|
|
|||
|
|
@ -131,6 +131,6 @@ void copy_user_page(void *to,void* from,unsigned long vaddr,struct page* page);
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#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
|
||||
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#include <asm-generic/memory_model.h>
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _XTENSA_PAGE_H */
|
||||
|
|
|
|||
|
|
@ -11,15 +11,13 @@
|
|||
#ifndef _XTENSA_PARAM_H
|
||||
#define _XTENSA_PARAM_H
|
||||
|
||||
#include <asm/variant/core.h>
|
||||
|
||||
#ifdef __KERNEL__
|
||||
# define HZ 100 /* internal timer frequency */
|
||||
# define USER_HZ 100 /* for user interfaces in "ticks" */
|
||||
# define CLOCKS_PER_SEC (USER_HZ) /* frequnzy at which times() counts */
|
||||
#endif
|
||||
|
||||
#define EXEC_PAGESIZE (1 << XCHAL_MMU_MIN_PTE_PAGE_SIZE)
|
||||
#define EXEC_PAGESIZE 4096
|
||||
|
||||
#ifndef NGROUPS
|
||||
#define NGROUPS 32
|
||||
|
|
|
|||
|
|
@ -11,8 +11,6 @@
|
|||
#ifndef _XTENSA_PTRACE_H
|
||||
#define _XTENSA_PTRACE_H
|
||||
|
||||
#include <asm/variant/core.h>
|
||||
|
||||
/*
|
||||
* Kernel stack
|
||||
*
|
||||
|
|
@ -101,7 +99,8 @@ struct pt_regs {
|
|||
unsigned long windowbase; /* 48 */
|
||||
unsigned long windowstart; /* 52 */
|
||||
unsigned long syscall; /* 56 */
|
||||
int reserved[2]; /* 64 */
|
||||
unsigned long icountlevel; /* 60 */
|
||||
int reserved[1]; /* 64 */
|
||||
|
||||
/* Make sure the areg field is 16 bytes aligned. */
|
||||
int align[0] __attribute__ ((aligned(16)));
|
||||
|
|
@ -113,6 +112,9 @@ struct pt_regs {
|
|||
};
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <asm/variant/core.h>
|
||||
|
||||
# define task_pt_regs(tsk) ((struct pt_regs*) \
|
||||
(task_stack_page(tsk) + KERNEL_STACK_SIZE - (XCHAL_NUM_AREGS-16)*4) - 1)
|
||||
# define user_mode(regs) (((regs)->ps & 0x00000020)!=0)
|
||||
|
|
|
|||
|
|
@ -9,8 +9,6 @@
|
|||
#ifndef _XTENSA_SHMPARAM_H
|
||||
#define _XTENSA_SHMPARAM_H
|
||||
|
||||
#include <asm/processor.h>
|
||||
|
||||
/*
|
||||
* Xtensa can have variable size caches, and if
|
||||
* the size of single way is larger than the page size,
|
||||
|
|
|
|||
|
|
@ -5,21 +5,12 @@
|
|||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2001 - 2003 Tensilica Inc.
|
||||
* Copyright (C) 2001 - 2007 Tensilica Inc.
|
||||
*/
|
||||
|
||||
#ifndef _XTENSA_SIGCONTEXT_H
|
||||
#define _XTENSA_SIGCONTEXT_H
|
||||
|
||||
#define _ASMLANGUAGE
|
||||
#include <asm/processor.h>
|
||||
#include <asm/coprocessor.h>
|
||||
|
||||
|
||||
struct _cpstate {
|
||||
unsigned char _cpstate[XTENSA_CP_EXTRA_SIZE];
|
||||
} __attribute__ ((aligned (XTENSA_CP_EXTRA_ALIGN)));
|
||||
|
||||
|
||||
struct sigcontext {
|
||||
unsigned long oldmask;
|
||||
|
|
@ -27,18 +18,13 @@ struct sigcontext {
|
|||
/* CPU registers */
|
||||
unsigned long sc_pc;
|
||||
unsigned long sc_ps;
|
||||
unsigned long sc_wmask;
|
||||
unsigned long sc_windowbase;
|
||||
unsigned long sc_windowstart;
|
||||
unsigned long sc_lbeg;
|
||||
unsigned long sc_lend;
|
||||
unsigned long sc_lcount;
|
||||
unsigned long sc_sar;
|
||||
unsigned long sc_depc;
|
||||
unsigned long sc_dareg0;
|
||||
unsigned long sc_treg[4];
|
||||
unsigned long sc_areg[XCHAL_NUM_AREGS];
|
||||
struct _cpstate *sc_cpstate;
|
||||
unsigned long sc_acclo;
|
||||
unsigned long sc_acchi;
|
||||
unsigned long sc_a[16];
|
||||
};
|
||||
|
||||
#endif /* __ASM_XTENSA_SIGCONTEXT_H */
|
||||
#endif /* _XTENSA_SIGCONTEXT_H */
|
||||
|
|
|
|||
|
|
@ -116,6 +116,7 @@ static inline struct thread_info *current_thread_info(void)
|
|||
#define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */
|
||||
#define TIF_IRET 5 /* return with iret */
|
||||
#define TIF_MEMDIE 6
|
||||
#define TIF_RESTORE_SIGMASK 7 /* restore signal mask in do_signal() */
|
||||
#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
|
||||
|
||||
#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
|
||||
|
|
@ -125,6 +126,7 @@ static inline struct thread_info *current_thread_info(void)
|
|||
#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP)
|
||||
#define _TIF_IRET (1<<TIF_IRET)
|
||||
#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
|
||||
#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
|
||||
|
||||
#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
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#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */
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||||
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@ -485,8 +485,8 @@ __SYSCALL(217, sys_sched_get_priority_min, 1)
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__SYSCALL(218, sys_sched_rr_get_interval, 2)
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#define __NR_sched_yield 219
|
||||
__SYSCALL(219, sys_sched_yield, 0)
|
||||
#define __NR_sigreturn 222
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__SYSCALL(222, xtensa_sigreturn, 0)
|
||||
#define __NR_available222 222
|
||||
__SYSCALL(222, sys_ni_syscall, 0)
|
||||
|
||||
/* Signal Handling */
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue