mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 10:41:38 -04:00
ARM: SoC: late DT updates for v4.9
These updates have been kept in a separate branch mostly because
they rely on updates to the respective clk drivers to keep the
shared header files in sync.
- The Renesas r8a7796 (R-Car M3-W) platform gets added, this is an
automotive SoC similar to the ⅹ8a7795 chip we already support, but
the dts changes rely on a clock driver change that has been
merged for v4.9 through the clk tree.
- The Amlogic meson-gxbb (S905) platform gains support for a few
drivers merged through our tree, in particular the network and
usb driver changes are required and included here, and also
the clk tree changes.
- The Allwinner platforms have seen a large-scale change to their
clk drivers and the dts file updates must come after that.
This includes the newly added Nextthing GR8 platform, which is
derived from sun5i/A13.
- Some integrator (arm32) changes rely on clk driver changes.
- A single patch for lpc32xx has no such dependency but wasn't
added until just before the merge window
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Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late DT updates from Arnd Bergmann:
"These updates have been kept in a separate branch mostly because they
rely on updates to the respective clk drivers to keep the shared
header files in sync.
- The Renesas r8a7796 (R-Car M3-W) platform gets added, this is an
automotive SoC similar to the ⅹ8a7795 chip we already support, but
the dts changes rely on a clock driver change that has been merged
for v4.9 through the clk tree.
- The Amlogic meson-gxbb (S905) platform gains support for a few
drivers merged through our tree, in particular the network and usb
driver changes are required and included here, and also the clk
tree changes.
- The Allwinner platforms have seen a large-scale change to their clk
drivers and the dts file updates must come after that. This
includes the newly added Nextthing GR8 platform, which is derived
from sun5i/A13.
- Some integrator (arm32) changes rely on clk driver changes.
- A single patch for lpc32xx has no such dependency but wasn't added
until just before the merge window"
* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (99 commits)
ARM: dts: lpc32xx: add device node for IRAM on-chip memory
ARM: dts: sun8i: Add accelerometer to polaroid-mid2407pxe03
ARM: dts: sun8i: enable UART1 for iNet D978 Rev2 board
ARM: dts: sun8i: add pinmux for UART1 at PG
dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC
dts: sun8i-h3: add pinmux definitions for I2C0-2
dts: sun8i-h3: associate exposed UARTs on Orange Pi Boards
dts: sun8i-h3: split off RTS/CTS for UART1 in seperate pinmux
dts: sun8i-h3: add pinmux definitions for UART2-3
ARM: dts: sun9i: a80-optimus: Disable EHCI1
ARM: dts: sun9i: cubieboard4: Add AXP806 PMIC device node and regulators
ARM: dts: sun9i: a80-optimus: Add AXP806 PMIC device node and regulators
ARM: dts: sun9i: cubieboard4: Declare AXP809 SW regulator as unused
ARM: dts: sun9i: a80-optimus: Declare AXP809 SW regulator as unused
ARM: dts: sun8i: Add touchscreen node for sun8i-a33-ga10h
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-polaroid-mid2809pxe04
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-polaroid-mid2407pxe03
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-inet86dz
ARM: dts: sun8i: Add touchscreen node for sun8i-a23-gt90h
ARM64: dts: meson-gxbb-vega-s95: Enable USB Nodes
...
This commit is contained in:
Linus Torvalds
commit
c913fc4146
51 changed files with 4153 additions and 870 deletions
|
|
@ -87,3 +87,14 @@
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|||
pinctrl-names = "default";
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||||
};
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||||
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||||
&ir {
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||||
status = "okay";
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||||
pinctrl-0 = <&remote_input_ao_pins>;
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pinctrl-names = "default";
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||||
};
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||||
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||||
&i2c_A {
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||||
status = "okay";
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pinctrl-0 = <&i2c_a_pins>;
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pinctrl-names = "default";
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};
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|
|
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|||
|
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@ -50,3 +50,9 @@
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compatible = "amlogic,p200", "amlogic,meson-gxbb";
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model = "Amlogic Meson GXBB P200 Development Board";
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};
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&i2c_B {
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status = "okay";
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pinctrl-0 = <&i2c_b_pins>;
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pinctrl-names = "default";
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};
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|
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|||
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@ -57,6 +57,19 @@
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x40000000>;
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};
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usb_pwr: regulator-usb-pwrs {
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compatible = "regulator-fixed";
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regulator-name = "USB_PWR";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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/* signal name in schematic: USB_PWR_EN */
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gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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/* This UART is brought out to the DB9 connector */
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@ -72,3 +85,25 @@
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pinctrl-names = "default";
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};
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&ir {
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status = "okay";
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pinctrl-0 = <&remote_input_ao_pins>;
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pinctrl-names = "default";
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};
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&usb0_phy {
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status = "okay";
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phy-supply = <&usb_pwr>;
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};
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&usb1_phy {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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};
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&usb1 {
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status = "okay";
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};
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@ -52,6 +52,19 @@
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chosen {
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stdout-path = "serial0:115200n8";
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};
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usb_vbus: regulator-usb0-vbus {
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compatible = "regulator-fixed";
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regulator-name = "USB0_VBUS";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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&uart_AO {
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@ -60,3 +73,32 @@
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pinctrl-names = "default";
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};
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&ir {
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status = "okay";
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pinctrl-0 = <&remote_input_ao_pins>;
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pinctrl-names = "default";
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};
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ðmac {
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status = "okay";
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pinctrl-0 = <ð_pins>;
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pinctrl-names = "default";
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};
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&usb0_phy {
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status = "okay";
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phy-supply = <&usb_vbus>;
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};
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&usb1_phy {
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status = "okay";
|
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};
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&usb0 {
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status = "okay";
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};
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&usb1 {
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status = "okay";
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};
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|
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|||
|
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@ -45,6 +45,9 @@
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/gpio/meson-gxbb-gpio.h>
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#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
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#include <dt-bindings/clock/gxbb-clkc.h>
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#include <dt-bindings/clock/gxbb-aoclkc.h>
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#include <dt-bindings/reset/gxbb-aoclkc.h>
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/ {
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compatible = "amlogic,meson-gxbb";
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|
|
@ -99,6 +102,30 @@
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method = "smc";
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};
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firmware {
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sm: secure-monitor {
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compatible = "amlogic,meson-gxbb-sm";
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};
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};
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efuse: efuse {
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compatible = "amlogic,meson-gxbb-efuse";
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#address-cells = <1>;
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#size-cells = <1>;
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sn: sn@14 {
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reg = <0x14 0x10>;
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};
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eth_mac: eth_mac@34 {
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reg = <0x34 0x10>;
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};
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bid: bid@46 {
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reg = <0x46 0x30>;
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||||
};
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||||
};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13
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|
@ -124,6 +151,25 @@
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#size-cells = <2>;
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ranges;
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usb0_phy: phy@c0000000 {
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compatible = "amlogic,meson-gxbb-usb2-phy";
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#phy-cells = <0>;
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reg = <0x0 0xc0000000 0x0 0x20>;
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resets = <&reset RESET_USB_OTG>;
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clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
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clock-names = "usb_general", "usb";
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status = "disabled";
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};
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usb1_phy: phy@c0000020 {
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compatible = "amlogic,meson-gxbb-usb2-phy";
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#phy-cells = <0>;
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reg = <0x0 0xc0000020 0x0 0x20>;
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clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
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clock-names = "usb_general", "usb";
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status = "disabled";
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};
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cbus: cbus@c1100000 {
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compatible = "simple-bus";
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reg = <0x0 0xc1100000 0x0 0x100000>;
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@ -153,6 +199,27 @@
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status = "disabled";
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};
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pwm_ab: pwm@8550 {
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compatible = "amlogic,meson-gxbb-pwm";
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reg = <0x0 0x08550 0x0 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm_cd: pwm@8650 {
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compatible = "amlogic,meson-gxbb-pwm";
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reg = <0x0 0x08650 0x0 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm_ef: pwm@86c0 {
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compatible = "amlogic,meson-gxbb-pwm";
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reg = <0x0 0x086c0 0x0 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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uart_C: serial@8700 {
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compatible = "amlogic,meson-uart";
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reg = <0x0 0x8700 0x0 0x14>;
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@ -160,6 +227,51 @@
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clocks = <&xtal>;
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status = "disabled";
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||||
};
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watchdog@98d0 {
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compatible = "amlogic,meson-gxbb-wdt";
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reg = <0x0 0x098d0 0x0 0x10>;
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clocks = <&xtal>;
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};
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spifc: spi@8c80 {
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compatible = "amlogic,meson-gxbb-spifc";
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reg = <0x0 0x08c80 0x0 0x80>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clkc CLKID_SPI>;
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status = "disabled";
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};
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i2c_A: i2c@8500 {
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compatible = "amlogic,meson-gxbb-i2c";
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reg = <0x0 0x08500 0x0 0x20>;
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interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc CLKID_I2C>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c_B: i2c@87c0 {
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compatible = "amlogic,meson-gxbb-i2c";
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reg = <0x0 0x087c0 0x0 0x20>;
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interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc CLKID_I2C>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c_C: i2c@87e0 {
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compatible = "amlogic,meson-gxbb-i2c";
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reg = <0x0 0x087e0 0x0 0x20>;
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interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc CLKID_I2C>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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||||
};
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||||
};
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gic: interrupt-controller@c4301000 {
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|
|
@ -203,6 +315,56 @@
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function = "uart_ao";
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||||
};
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||||
};
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remote_input_ao_pins: remote_input_ao {
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mux {
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groups = "remote_input_ao";
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function = "remote_input_ao";
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};
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||||
};
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|
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i2c_ao_pins: i2c_ao {
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mux {
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groups = "i2c_sck_ao",
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"i2c_sda_ao";
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function = "i2c_ao";
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||||
};
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||||
};
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pwm_ao_a_3_pins: pwm_ao_a_3 {
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mux {
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||||
groups = "pwm_ao_a_3";
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function = "pwm_ao_a_3";
|
||||
};
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||||
};
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||||
|
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pwm_ao_a_6_pins: pwm_ao_a_6 {
|
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mux {
|
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groups = "pwm_ao_a_6";
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function = "pwm_ao_a_6";
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};
|
||||
};
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||||
|
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pwm_ao_a_12_pins: pwm_ao_a_12 {
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mux {
|
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groups = "pwm_ao_a_12";
|
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function = "pwm_ao_a_12";
|
||||
};
|
||||
};
|
||||
|
||||
pwm_ao_b_pins: pwm_ao_b {
|
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mux {
|
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groups = "pwm_ao_b";
|
||||
function = "pwm_ao_b";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
clkc_AO: clock-controller@040 {
|
||||
compatible = "amlogic,gxbb-aoclkc";
|
||||
reg = <0x0 0x00040 0x0 0x4>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
uart_AO: serial@4c0 {
|
||||
|
|
@ -212,6 +374,30 @@
|
|||
clocks = <&xtal>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ir: ir@580 {
|
||||
compatible = "amlogic,meson-gxbb-ir";
|
||||
reg = <0x0 0x00580 0x0 0x40>;
|
||||
interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm_ab_AO: pwm@550 {
|
||||
compatible = "amlogic,meson-gxbb-pwm";
|
||||
reg = <0x0 0x0550 0x0 0x10>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c_AO: i2c@500 {
|
||||
compatible = "amlogic,meson-gxbb-i2c";
|
||||
reg = <0x0 0x500 0x0 0x20>;
|
||||
interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
|
||||
clocks = <&clkc CLKID_AO_I2C>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
periphs: periphs@c8834000 {
|
||||
|
|
@ -251,6 +437,16 @@
|
|||
};
|
||||
};
|
||||
|
||||
nor_pins: nor {
|
||||
mux {
|
||||
groups = "nor_d",
|
||||
"nor_q",
|
||||
"nor_c",
|
||||
"nor_cs";
|
||||
function = "nor";
|
||||
};
|
||||
};
|
||||
|
||||
sdcard_pins: sdcard {
|
||||
mux {
|
||||
groups = "sdcard_d0",
|
||||
|
|
@ -263,6 +459,25 @@
|
|||
};
|
||||
};
|
||||
|
||||
sdio_pins: sdio {
|
||||
mux {
|
||||
groups = "sdio_d0",
|
||||
"sdio_d1",
|
||||
"sdio_d2",
|
||||
"sdio_d3",
|
||||
"sdio_cmd",
|
||||
"sdio_clk";
|
||||
function = "sdio";
|
||||
};
|
||||
};
|
||||
|
||||
sdio_irq_pins: sdio_irq {
|
||||
mux {
|
||||
groups = "sdio_irq";
|
||||
function = "sdio";
|
||||
};
|
||||
};
|
||||
|
||||
uart_a_pins: uart_a {
|
||||
mux {
|
||||
groups = "uart_tx_a",
|
||||
|
|
@ -287,6 +502,30 @@
|
|||
};
|
||||
};
|
||||
|
||||
i2c_a_pins: i2c_a {
|
||||
mux {
|
||||
groups = "i2c_sck_a",
|
||||
"i2c_sda_a";
|
||||
function = "i2c_a";
|
||||
};
|
||||
};
|
||||
|
||||
i2c_b_pins: i2c_b {
|
||||
mux {
|
||||
groups = "i2c_sck_b",
|
||||
"i2c_sda_b";
|
||||
function = "i2c_b";
|
||||
};
|
||||
};
|
||||
|
||||
i2c_c_pins: i2c_c {
|
||||
mux {
|
||||
groups = "i2c_sck_c",
|
||||
"i2c_sda_c";
|
||||
function = "i2c_c";
|
||||
};
|
||||
};
|
||||
|
||||
eth_pins: eth_c {
|
||||
mux {
|
||||
groups = "eth_mdio",
|
||||
|
|
@ -306,6 +545,55 @@
|
|||
function = "eth";
|
||||
};
|
||||
};
|
||||
|
||||
pwm_a_x_pins: pwm_a_x {
|
||||
mux {
|
||||
groups = "pwm_a_x";
|
||||
function = "pwm_a_x";
|
||||
};
|
||||
};
|
||||
|
||||
pwm_a_y_pins: pwm_a_y {
|
||||
mux {
|
||||
groups = "pwm_a_y";
|
||||
function = "pwm_a_y";
|
||||
};
|
||||
};
|
||||
|
||||
pwm_b_pins: pwm_b {
|
||||
mux {
|
||||
groups = "pwm_b";
|
||||
function = "pwm_b";
|
||||
};
|
||||
};
|
||||
|
||||
pwm_d_pins: pwm_d {
|
||||
mux {
|
||||
groups = "pwm_d";
|
||||
function = "pwm_d";
|
||||
};
|
||||
};
|
||||
|
||||
pwm_e_pins: pwm_e {
|
||||
mux {
|
||||
groups = "pwm_e";
|
||||
function = "pwm_e";
|
||||
};
|
||||
};
|
||||
|
||||
pwm_f_x_pins: pwm_f_x {
|
||||
mux {
|
||||
groups = "pwm_f_x";
|
||||
function = "pwm_f_x";
|
||||
};
|
||||
};
|
||||
|
||||
pwm_f_y_pins: pwm_f_y {
|
||||
mux {
|
||||
groups = "pwm_f_y";
|
||||
function = "pwm_f_y";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -321,6 +609,15 @@
|
|||
#clock-cells = <1>;
|
||||
reg = <0x0 0x0 0x0 0x3db>;
|
||||
};
|
||||
|
||||
mailbox: mailbox@404 {
|
||||
compatible = "amlogic,meson-gxbb-mhu";
|
||||
reg = <0 0x404 0 0x4c>;
|
||||
interrupts = <0 208 IRQ_TYPE_EDGE_RISING>,
|
||||
<0 209 IRQ_TYPE_EDGE_RISING>,
|
||||
<0 210 IRQ_TYPE_EDGE_RISING>;
|
||||
#mbox-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
apb: apb@d0000000 {
|
||||
|
|
@ -331,14 +628,40 @@
|
|||
ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
|
||||
};
|
||||
|
||||
usb0: usb@c9000000 {
|
||||
compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
|
||||
reg = <0x0 0xc9000000 0x0 0x40000>;
|
||||
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
|
||||
clock-names = "otg";
|
||||
phys = <&usb0_phy>;
|
||||
phy-names = "usb2-phy";
|
||||
dr_mode = "host";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb1: usb@c9100000 {
|
||||
compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
|
||||
reg = <0x0 0xc9100000 0x0 0x40000>;
|
||||
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
|
||||
clock-names = "otg";
|
||||
phys = <&usb1_phy>;
|
||||
phy-names = "usb2-phy";
|
||||
dr_mode = "host";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ethmac: ethernet@c9410000 {
|
||||
compatible = "amlogic,meson6-dwmac", "snps,dwmac";
|
||||
compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac";
|
||||
reg = <0x0 0xc9410000 0x0 0x10000
|
||||
0x0 0xc8834540 0x0 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
interrupt-names = "macirq";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "stmmaceth";
|
||||
clocks = <&clkc CLKID_ETH>,
|
||||
<&clkc CLKID_FCLK_DIV2>,
|
||||
<&clkc CLKID_MPLL2>;
|
||||
clock-names = "stmmaceth", "clkin0", "clkin1";
|
||||
phy-mode = "rgmii";
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb
|
||||
dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb
|
||||
dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb
|
||||
|
||||
always := $(dtb-y)
|
||||
|
|
|
|||
328
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
Normal file
328
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
Normal file
|
|
@ -0,0 +1,328 @@
|
|||
/*
|
||||
* Device Tree Source for the H3ULCB board
|
||||
*
|
||||
* Copyright (C) 2016 Renesas Electronics Corp.
|
||||
* Copyright (C) 2016 Cogent Embedded, Inc.
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public License
|
||||
* version 2. This program is licensed "as is" without any warranty of any
|
||||
* kind, whether express or implied.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "r8a7795.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
/ {
|
||||
model = "Renesas H3ULCB board based on r8a7795";
|
||||
compatible = "renesas,h3ulcb", "renesas,r8a7795";
|
||||
|
||||
aliases {
|
||||
serial0 = &scif2;
|
||||
ethernet0 = &avb;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@48000000 {
|
||||
device_type = "memory";
|
||||
/* first 128MB is reserved for secure area. */
|
||||
reg = <0x0 0x48000000 0x0 0x38000000>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led5 {
|
||||
gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
led6 {
|
||||
gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
keyboard {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
key-1 {
|
||||
linux,code = <KEY_1>;
|
||||
label = "SW3";
|
||||
wakeup-source;
|
||||
debounce-interval = <20>;
|
||||
gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
x12_clk: x12 {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <24576000>;
|
||||
};
|
||||
|
||||
vcc_sdhi0: regulator-vcc-sdhi0 {
|
||||
compatible = "regulator-fixed";
|
||||
|
||||
regulator-name = "SDHI0 Vcc";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
vccq_sdhi0: regulator-vccq-sdhi0 {
|
||||
compatible = "regulator-gpio";
|
||||
|
||||
regulator-name = "SDHI0 VccQ";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
|
||||
gpios-states = <1>;
|
||||
states = <3300000 1
|
||||
1800000 0>;
|
||||
};
|
||||
|
||||
audio_clkout: audio-clkout {
|
||||
/*
|
||||
* This is same as <&rcar_sound 0>
|
||||
* but needed to avoid cs2000/rcar_sound probe dead-lock
|
||||
*/
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <11289600>;
|
||||
};
|
||||
|
||||
rsnd_ak4613: sound {
|
||||
compatible = "simple-audio-card";
|
||||
|
||||
simple-audio-card,format = "left_j";
|
||||
simple-audio-card,bitclock-master = <&sndcpu>;
|
||||
simple-audio-card,frame-master = <&sndcpu>;
|
||||
|
||||
sndcpu: simple-audio-card,cpu {
|
||||
sound-dai = <&rcar_sound>;
|
||||
};
|
||||
|
||||
sndcodec: simple-audio-card,codec {
|
||||
sound-dai = <&ak4613>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&extal_clk {
|
||||
clock-frequency = <16666666>;
|
||||
};
|
||||
|
||||
&extalr_clk {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
&pfc {
|
||||
pinctrl-0 = <&scif_clk_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
scif2_pins: scif2 {
|
||||
groups = "scif2_data_a";
|
||||
function = "scif2";
|
||||
};
|
||||
|
||||
scif_clk_pins: scif_clk {
|
||||
groups = "scif_clk_a";
|
||||
function = "scif_clk";
|
||||
};
|
||||
|
||||
i2c2_pins: i2c2 {
|
||||
groups = "i2c2_a";
|
||||
function = "i2c2";
|
||||
};
|
||||
|
||||
avb_pins: avb {
|
||||
groups = "avb_mdc";
|
||||
function = "avb";
|
||||
};
|
||||
|
||||
sdhi0_pins_3v3: sd0_3v3 {
|
||||
groups = "sdhi0_data4", "sdhi0_ctrl";
|
||||
function = "sdhi0";
|
||||
power-source = <3300>;
|
||||
};
|
||||
|
||||
sdhi0_pins_1v8: sd0_1v8 {
|
||||
groups = "sdhi0_data4", "sdhi0_ctrl";
|
||||
function = "sdhi0";
|
||||
power-source = <1800>;
|
||||
};
|
||||
|
||||
sound_pins: sound {
|
||||
groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
|
||||
function = "ssi";
|
||||
};
|
||||
|
||||
sound_clk_pins: sound-clk {
|
||||
groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
|
||||
"audio_clkout_a", "audio_clkout3_a";
|
||||
function = "audio_clk";
|
||||
};
|
||||
|
||||
usb1_pins: usb1 {
|
||||
groups = "usb1";
|
||||
function = "usb1";
|
||||
};
|
||||
};
|
||||
|
||||
&scif2 {
|
||||
pinctrl-0 = <&scif2_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&scif_clk {
|
||||
clock-frequency = <14745600>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
|
||||
clock-frequency = <100000>;
|
||||
|
||||
ak4613: codec@10 {
|
||||
compatible = "asahi-kasei,ak4613";
|
||||
#sound-dai-cells = <0>;
|
||||
reg = <0x10>;
|
||||
clocks = <&rcar_sound 3>;
|
||||
|
||||
asahi-kasei,in1-single-end;
|
||||
asahi-kasei,in2-single-end;
|
||||
asahi-kasei,out1-single-end;
|
||||
asahi-kasei,out2-single-end;
|
||||
asahi-kasei,out3-single-end;
|
||||
asahi-kasei,out4-single-end;
|
||||
asahi-kasei,out5-single-end;
|
||||
asahi-kasei,out6-single-end;
|
||||
};
|
||||
|
||||
cs2000: clk-multiplier@4f {
|
||||
#clock-cells = <0>;
|
||||
compatible = "cirrus,cs2000-cp";
|
||||
reg = <0x4f>;
|
||||
clocks = <&audio_clkout>, <&x12_clk>;
|
||||
clock-names = "clk_in", "ref_clk";
|
||||
|
||||
assigned-clocks = <&cs2000>;
|
||||
assigned-clock-rates = <24576000>; /* 1/1 divide */
|
||||
};
|
||||
};
|
||||
|
||||
&rcar_sound {
|
||||
pinctrl-0 = <&sound_pins &sound_clk_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
/* Single DAI */
|
||||
#sound-dai-cells = <0>;
|
||||
|
||||
/* audio_clkout0/1/2/3 */
|
||||
#clock-cells = <1>;
|
||||
clock-frequency = <11289600>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
/* update <audio_clk_b> to <cs2000> */
|
||||
clocks = <&cpg CPG_MOD 1005>,
|
||||
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
|
||||
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
|
||||
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
|
||||
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
|
||||
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
|
||||
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
|
||||
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
|
||||
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
|
||||
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
|
||||
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
|
||||
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
|
||||
<&audio_clk_a>, <&cs2000>,
|
||||
<&audio_clk_c>,
|
||||
<&cpg CPG_CORE R8A7795_CLK_S0D4>;
|
||||
|
||||
rcar_sound,dai {
|
||||
dai0 {
|
||||
playback = <&ssi0 &src0 &dvc0>;
|
||||
capture = <&ssi1 &src1 &dvc1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&sdhi0 {
|
||||
pinctrl-0 = <&sdhi0_pins_3v3>;
|
||||
pinctrl-1 = <&sdhi0_pins_1v8>;
|
||||
pinctrl-names = "default", "state_uhs";
|
||||
|
||||
vmmc-supply = <&vcc_sdhi0>;
|
||||
vqmmc-supply = <&vccq_sdhi0>;
|
||||
cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
|
||||
bus-width = <4>;
|
||||
sd-uhs-sdr50;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ssi1 {
|
||||
shared-pin;
|
||||
};
|
||||
|
||||
&wdt0 {
|
||||
timeout-sec = <60>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&audio_clk_a {
|
||||
clock-frequency = <22579200>;
|
||||
};
|
||||
|
||||
&avb {
|
||||
pinctrl-0 = <&avb_pins>;
|
||||
pinctrl-names = "default";
|
||||
renesas,no-ether-link;
|
||||
phy-handle = <&phy0>;
|
||||
status = "okay";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
rxc-skew-ps = <900>;
|
||||
rxdv-skew-ps = <0>;
|
||||
rxd0-skew-ps = <0>;
|
||||
rxd1-skew-ps = <0>;
|
||||
rxd2-skew-ps = <0>;
|
||||
rxd3-skew-ps = <0>;
|
||||
txc-skew-ps = <900>;
|
||||
txen-skew-ps = <0>;
|
||||
txd0-skew-ps = <0>;
|
||||
txd1-skew-ps = <0>;
|
||||
txd2-skew-ps = <0>;
|
||||
txd3-skew-ps = <0>;
|
||||
reg = <0>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&usb2_phy1 {
|
||||
pinctrl-0 = <&usb1_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ehci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ohci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -110,6 +110,17 @@
|
|||
1800000 0>;
|
||||
};
|
||||
|
||||
vbus0_usb2: regulator-vbus0-usb2 {
|
||||
compatible = "regulator-fixed";
|
||||
|
||||
regulator-name = "USB20_VBUS0";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
|
||||
gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
audio_clkout: audio_clkout {
|
||||
/*
|
||||
* This is same as <&rcar_sound 0>
|
||||
|
|
@ -135,6 +146,52 @@
|
|||
sound-dai = <&ak4613>;
|
||||
};
|
||||
};
|
||||
|
||||
vga-encoder {
|
||||
compatible = "adi,adv7123";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
adv7123_in: endpoint {
|
||||
remote-endpoint = <&du_out_rgb>;
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
adv7123_out: endpoint {
|
||||
remote-endpoint = <&vga_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
vga {
|
||||
compatible = "vga-connector";
|
||||
|
||||
port {
|
||||
vga_in: endpoint {
|
||||
remote-endpoint = <&adv7123_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&du {
|
||||
pinctrl-0 = <&du_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
port@0 {
|
||||
endpoint {
|
||||
remote-endpoint = <&adv7123_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&extal_clk {
|
||||
|
|
@ -172,6 +229,11 @@
|
|||
function = "avb";
|
||||
};
|
||||
|
||||
du_pins: du {
|
||||
groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0";
|
||||
function = "du";
|
||||
};
|
||||
|
||||
sdhi0_pins: sd0 {
|
||||
groups = "sdhi0_data4", "sdhi0_ctrl";
|
||||
function = "sdhi0";
|
||||
|
|
@ -193,6 +255,11 @@
|
|||
function = "audio_clk";
|
||||
};
|
||||
|
||||
usb0_pins: usb0 {
|
||||
groups = "usb0";
|
||||
function = "usb0";
|
||||
};
|
||||
|
||||
usb1_pins: usb1 {
|
||||
groups = "usb1";
|
||||
function = "usb1";
|
||||
|
|
@ -369,6 +436,14 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2_phy0 {
|
||||
pinctrl-0 = <&usb0_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
vbus-supply = <&vbus0_usb2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2_phy1 {
|
||||
pinctrl-0 = <&usb1_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
|
@ -383,6 +458,10 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&ehci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ehci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -391,6 +470,10 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&ohci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ohci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -399,6 +482,10 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&hsusb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie_bus_clk {
|
||||
clock-frequency = <100000000>;
|
||||
status = "okay";
|
||||
|
|
|
|||
|
|
@ -328,7 +328,8 @@
|
|||
};
|
||||
|
||||
audma0: dma-controller@ec700000 {
|
||||
compatible = "renesas,rcar-dmac";
|
||||
compatible = "renesas,dmac-r8a7795",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xec700000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
|
||||
|
|
@ -360,7 +361,8 @@
|
|||
};
|
||||
|
||||
audma1: dma-controller@ec720000 {
|
||||
compatible = "renesas,rcar-dmac";
|
||||
compatible = "renesas,dmac-r8a7795",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xec720000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
|
||||
|
|
@ -1098,6 +1100,7 @@
|
|||
reg = <0 0xee100000 0 0x2000>;
|
||||
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 314>;
|
||||
max-frequency = <200000000>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -1107,6 +1110,7 @@
|
|||
reg = <0 0xee120000 0 0x2000>;
|
||||
interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 313>;
|
||||
max-frequency = <200000000>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -1116,8 +1120,8 @@
|
|||
reg = <0 0xee140000 0 0x2000>;
|
||||
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 312>;
|
||||
max-frequency = <200000000>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
cap-mmc-highspeed;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -1126,8 +1130,8 @@
|
|||
reg = <0 0xee160000 0 0x2000>;
|
||||
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 311>;
|
||||
max-frequency = <200000000>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
cap-mmc-highspeed;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -1224,6 +1228,23 @@
|
|||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hsusb: usb@e6590000 {
|
||||
compatible = "renesas,usbhs-r8a7795",
|
||||
"renesas,rcar-gen3-usbhs";
|
||||
reg = <0 0xe6590000 0 0x100>;
|
||||
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 704>;
|
||||
dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
|
||||
<&usb_dmac1 0>, <&usb_dmac1 1>;
|
||||
dma-names = "ch0", "ch1", "ch2", "ch3";
|
||||
renesas,buswait = <11>;
|
||||
phys = <&usb2_phy0>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pciec0: pcie@fe000000 {
|
||||
compatible = "renesas,pcie-r8a7795";
|
||||
reg = <0 0xfe000000 0 0x80000>;
|
||||
|
|
@ -1273,5 +1294,252 @@
|
|||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
vspbc: vsp@fe920000 {
|
||||
compatible = "renesas,vsp2";
|
||||
reg = <0 0xfe920000 0 0x8000>;
|
||||
interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 624>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
|
||||
renesas,fcp = <&fcpvb1>;
|
||||
};
|
||||
|
||||
fcpvb1: fcp@fe92f000 {
|
||||
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
|
||||
reg = <0 0xfe92f000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 606>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
};
|
||||
|
||||
fcpf0: fcp@fe950000 {
|
||||
compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
|
||||
reg = <0 0xfe950000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 615>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
};
|
||||
|
||||
fcpf1: fcp@fe951000 {
|
||||
compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
|
||||
reg = <0 0xfe951000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 614>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
};
|
||||
|
||||
fcpf2: fcp@fe952000 {
|
||||
compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
|
||||
reg = <0 0xfe952000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 613>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
};
|
||||
|
||||
vspbd: vsp@fe960000 {
|
||||
compatible = "renesas,vsp2";
|
||||
reg = <0 0xfe960000 0 0x8000>;
|
||||
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 626>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
|
||||
renesas,fcp = <&fcpvb0>;
|
||||
};
|
||||
|
||||
fcpvb0: fcp@fe96f000 {
|
||||
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
|
||||
reg = <0 0xfe96f000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 607>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
};
|
||||
|
||||
vspi0: vsp@fe9a0000 {
|
||||
compatible = "renesas,vsp2";
|
||||
reg = <0 0xfe9a0000 0 0x8000>;
|
||||
interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 631>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
|
||||
renesas,fcp = <&fcpvi0>;
|
||||
};
|
||||
|
||||
fcpvi0: fcp@fe9af000 {
|
||||
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
|
||||
reg = <0 0xfe9af000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 611>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
};
|
||||
|
||||
vspi1: vsp@fe9b0000 {
|
||||
compatible = "renesas,vsp2";
|
||||
reg = <0 0xfe9b0000 0 0x8000>;
|
||||
interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 630>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
|
||||
renesas,fcp = <&fcpvi1>;
|
||||
};
|
||||
|
||||
fcpvi1: fcp@fe9bf000 {
|
||||
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
|
||||
reg = <0 0xfe9bf000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 610>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
};
|
||||
|
||||
vspi2: vsp@fe9c0000 {
|
||||
compatible = "renesas,vsp2";
|
||||
reg = <0 0xfe9c0000 0 0x8000>;
|
||||
interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 629>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
|
||||
renesas,fcp = <&fcpvi2>;
|
||||
};
|
||||
|
||||
fcpvi2: fcp@fe9cf000 {
|
||||
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
|
||||
reg = <0 0xfe9cf000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 609>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
};
|
||||
|
||||
vspd0: vsp@fea20000 {
|
||||
compatible = "renesas,vsp2";
|
||||
reg = <0 0xfea20000 0 0x4000>;
|
||||
interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 623>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
|
||||
renesas,fcp = <&fcpvd0>;
|
||||
};
|
||||
|
||||
fcpvd0: fcp@fea27000 {
|
||||
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
|
||||
reg = <0 0xfea27000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 603>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
};
|
||||
|
||||
vspd1: vsp@fea28000 {
|
||||
compatible = "renesas,vsp2";
|
||||
reg = <0 0xfea28000 0 0x4000>;
|
||||
interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 622>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
|
||||
renesas,fcp = <&fcpvd1>;
|
||||
};
|
||||
|
||||
fcpvd1: fcp@fea2f000 {
|
||||
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
|
||||
reg = <0 0xfea2f000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 602>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
};
|
||||
|
||||
vspd2: vsp@fea30000 {
|
||||
compatible = "renesas,vsp2";
|
||||
reg = <0 0xfea30000 0 0x4000>;
|
||||
interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 621>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
|
||||
renesas,fcp = <&fcpvd2>;
|
||||
};
|
||||
|
||||
fcpvd2: fcp@fea37000 {
|
||||
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
|
||||
reg = <0 0xfea37000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 601>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
};
|
||||
|
||||
vspd3: vsp@fea38000 {
|
||||
compatible = "renesas,vsp2";
|
||||
reg = <0 0xfea38000 0 0x4000>;
|
||||
interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 620>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
|
||||
renesas,fcp = <&fcpvd3>;
|
||||
};
|
||||
|
||||
fcpvd3: fcp@fea3f000 {
|
||||
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
|
||||
reg = <0 0xfea3f000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 600>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
};
|
||||
|
||||
fdp1@fe940000 {
|
||||
compatible = "renesas,fdp1";
|
||||
reg = <0 0xfe940000 0 0x2400>;
|
||||
interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 119>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
renesas,fcp = <&fcpf0>;
|
||||
};
|
||||
|
||||
fdp1@fe944000 {
|
||||
compatible = "renesas,fdp1";
|
||||
reg = <0 0xfe944000 0 0x2400>;
|
||||
interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 118>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
renesas,fcp = <&fcpf1>;
|
||||
};
|
||||
|
||||
fdp1@fe948000 {
|
||||
compatible = "renesas,fdp1";
|
||||
reg = <0 0xfe948000 0 0x2400>;
|
||||
interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 117>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
renesas,fcp = <&fcpf2>;
|
||||
};
|
||||
|
||||
du: display@feb00000 {
|
||||
compatible = "renesas,du-r8a7795";
|
||||
reg = <0 0xfeb00000 0 0x80000>,
|
||||
<0 0xfeb90000 0 0x14>;
|
||||
reg-names = "du", "lvds.0";
|
||||
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 724>,
|
||||
<&cpg CPG_MOD 723>,
|
||||
<&cpg CPG_MOD 722>,
|
||||
<&cpg CPG_MOD 721>,
|
||||
<&cpg CPG_MOD 727>;
|
||||
clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
|
||||
status = "disabled";
|
||||
|
||||
vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
du_out_rgb: endpoint {
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
du_out_hdmi0: endpoint {
|
||||
};
|
||||
};
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
du_out_hdmi1: endpoint {
|
||||
};
|
||||
};
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
du_out_lvds0: endpoint {
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -31,11 +31,27 @@
|
|||
};
|
||||
};
|
||||
|
||||
&pfc {
|
||||
pinctrl-0 = <&scif_clk_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
scif2_pins: scif2 {
|
||||
groups = "scif2_data_a";
|
||||
function = "scif2";
|
||||
};
|
||||
scif_clk_pins: scif_clk {
|
||||
groups = "scif_clk_a";
|
||||
function = "scif_clk";
|
||||
};
|
||||
};
|
||||
|
||||
&extal_clk {
|
||||
clock-frequency = <16666666>;
|
||||
};
|
||||
|
||||
&scif2 {
|
||||
pinctrl-0 = <&scif2_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -107,6 +107,123 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
gpio0: gpio@e6050000 {
|
||||
compatible = "renesas,gpio-r8a7796",
|
||||
"renesas,gpio-rcar";
|
||||
reg = <0 0xe6050000 0 0x50>;
|
||||
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&pfc 0 0 16>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
clocks = <&cpg CPG_MOD 912>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
};
|
||||
|
||||
gpio1: gpio@e6051000 {
|
||||
compatible = "renesas,gpio-r8a7796",
|
||||
"renesas,gpio-rcar";
|
||||
reg = <0 0xe6051000 0 0x50>;
|
||||
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&pfc 0 32 29>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
clocks = <&cpg CPG_MOD 911>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
};
|
||||
|
||||
gpio2: gpio@e6052000 {
|
||||
compatible = "renesas,gpio-r8a7796",
|
||||
"renesas,gpio-rcar";
|
||||
reg = <0 0xe6052000 0 0x50>;
|
||||
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&pfc 0 64 15>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
clocks = <&cpg CPG_MOD 910>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
};
|
||||
|
||||
gpio3: gpio@e6053000 {
|
||||
compatible = "renesas,gpio-r8a7796",
|
||||
"renesas,gpio-rcar";
|
||||
reg = <0 0xe6053000 0 0x50>;
|
||||
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&pfc 0 96 16>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
clocks = <&cpg CPG_MOD 909>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
};
|
||||
|
||||
gpio4: gpio@e6054000 {
|
||||
compatible = "renesas,gpio-r8a7796",
|
||||
"renesas,gpio-rcar";
|
||||
reg = <0 0xe6054000 0 0x50>;
|
||||
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&pfc 0 128 18>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
clocks = <&cpg CPG_MOD 908>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
};
|
||||
|
||||
gpio5: gpio@e6055000 {
|
||||
compatible = "renesas,gpio-r8a7796",
|
||||
"renesas,gpio-rcar";
|
||||
reg = <0 0xe6055000 0 0x50>;
|
||||
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&pfc 0 160 26>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
clocks = <&cpg CPG_MOD 907>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
};
|
||||
|
||||
gpio6: gpio@e6055400 {
|
||||
compatible = "renesas,gpio-r8a7796",
|
||||
"renesas,gpio-rcar";
|
||||
reg = <0 0xe6055400 0 0x50>;
|
||||
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&pfc 0 192 32>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
clocks = <&cpg CPG_MOD 906>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
};
|
||||
|
||||
gpio7: gpio@e6055800 {
|
||||
compatible = "renesas,gpio-r8a7796",
|
||||
"renesas,gpio-rcar";
|
||||
reg = <0 0xe6055800 0 0x50>;
|
||||
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&pfc 0 224 4>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
clocks = <&cpg CPG_MOD 905>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
};
|
||||
|
||||
pfc: pin-controller@e6060000 {
|
||||
compatible = "renesas,pfc-r8a7796";
|
||||
reg = <0 0xe6060000 0 0x50c>;
|
||||
};
|
||||
|
||||
cpg: clock-controller@e6150000 {
|
||||
compatible = "renesas,r8a7796-cpg-mssr";
|
||||
reg = <0 0xe6150000 0 0x1000>;
|
||||
|
|
|
|||
Loading…
Reference in a new issue