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drm/amdgpu: add PTE defines for MTYPE
New on SOC-15 asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -67,6 +67,10 @@ struct amdgpu_bo_list_entry;
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#define AMDGPU_PTE_PRT (1ULL << 63)
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/* VEGA10 only */
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#define AMDGPU_PTE_MTYPE(a) ((uint64_t)a << 57)
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#define AMDGPU_PTE_MTYPE_MASK AMDGPU_PTE_MTYPE(3ULL)
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/* How to programm VM fault handling */
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#define AMDGPU_VM_FAULT_STOP_NEVER 0
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#define AMDGPU_VM_FAULT_STOP_FIRST 1
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