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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 18:51:56 -04:00
arm64 updates for 4.11:
- Errata workarounds for Qualcomm's Falkor CPU - Qualcomm L2 Cache PMU driver - Qualcomm SMCCC firmware quirk - Support for DEBUG_VIRTUAL - CPU feature detection for userspace via MRS emulation - Preliminary work for the Statistical Profiling Extension - Misc cleanups and non-critical fixes -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABCgAGBQJYpIxqAAoJELescNyEwWM0xdwH/AsTYAXPZDMdRnrQUyV0Fd2H /9pMzww6dHXEmCMKkImf++otUD6S+gTCJTsj7kEAXT5sZzLk27std5lsW7R9oPjc bGQMalZy+ovLR1gJ6v072seM3In4xph/qAYOpD8Q0AfYCLHjfMMArQfoLa8Esgru eSsrAgzVAkrK7XHi3sYycUjr9Hac9tvOOuQ3SaZkDz4MfFIbI4b43+c1SCF7wgT9 tQUHLhhxzGmgxjViI2lLYZuBWsIWsE+algvOe1qocvA9JEIXF+W8NeOuCjdL8WwX 3aoqYClC+qD/9+/skShFv5gM5fo0/IweLTUNIHADXpB6OkCYDyg+sxNM+xnEWQU= =YrPg -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Will Deacon: - Errata workarounds for Qualcomm's Falkor CPU - Qualcomm L2 Cache PMU driver - Qualcomm SMCCC firmware quirk - Support for DEBUG_VIRTUAL - CPU feature detection for userspace via MRS emulation - Preliminary work for the Statistical Profiling Extension - Misc cleanups and non-critical fixes * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (74 commits) arm64/kprobes: consistently handle MRS/MSR with XZR arm64: cpufeature: correctly handle MRS to XZR arm64: traps: correctly handle MRS/MSR with XZR arm64: ptrace: add XZR-safe regs accessors arm64: include asm/assembler.h in entry-ftrace.S arm64: fix warning about swapper_pg_dir overflow arm64: Work around Falkor erratum 1003 arm64: head.S: Enable EL1 (host) access to SPE when entered at EL2 arm64: arch_timer: document Hisilicon erratum 161010101 arm64: use is_vmalloc_addr arm64: use linux/sizes.h for constants arm64: uaccess: consistently check object sizes perf: add qcom l2 cache perf events driver arm64: remove wrong CONFIG_PROC_SYSCTL ifdef ARM: smccc: Update HVC comment to describe new quirk parameter arm64: do not trace atomic operations ACPI/IORT: Fix the error return code in iort_add_smmu_platform_device() ACPI/IORT: Fix iort_node_get_id() mapping entries indexing arm64: mm: enable CONFIG_HOLES_IN_ZONE for NUMA perf: xgene: Include module.h ...
This commit is contained in:
commit
ca78d3173c
85 changed files with 2396 additions and 439 deletions
15
mm/cma.c
15
mm/cma.c
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@ -235,18 +235,13 @@ int __init cma_declare_contiguous(phys_addr_t base,
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phys_addr_t highmem_start;
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int ret = 0;
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#ifdef CONFIG_X86
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/*
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* high_memory isn't direct mapped memory so retrieving its physical
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* address isn't appropriate. But it would be useful to check the
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* physical address of the highmem boundary so it's justifiable to get
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* the physical address from it. On x86 there is a validation check for
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* this case, so the following workaround is needed to avoid it.
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* We can't use __pa(high_memory) directly, since high_memory
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* isn't a valid direct map VA, and DEBUG_VIRTUAL will (validly)
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* complain. Find the boundary by adding one to the last valid
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* address.
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*/
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highmem_start = __pa_nodebug(high_memory);
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#else
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highmem_start = __pa(high_memory);
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#endif
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highmem_start = __pa(high_memory - 1) + 1;
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pr_debug("%s(size %pa, base %pa, limit %pa alignment %pa)\n",
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__func__, &size, &base, &limit, &alignment);
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@ -15,6 +15,7 @@
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#include <linux/kasan.h>
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#include <linux/kernel.h>
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#include <linux/memblock.h>
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#include <linux/mm.h>
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#include <linux/pfn.h>
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#include <asm/page.h>
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@ -49,7 +50,7 @@ static void __init zero_pte_populate(pmd_t *pmd, unsigned long addr,
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pte_t *pte = pte_offset_kernel(pmd, addr);
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pte_t zero_pte;
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zero_pte = pfn_pte(PFN_DOWN(__pa(kasan_zero_page)), PAGE_KERNEL);
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zero_pte = pfn_pte(PFN_DOWN(__pa_symbol(kasan_zero_page)), PAGE_KERNEL);
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zero_pte = pte_wrprotect(zero_pte);
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while (addr + PAGE_SIZE <= end) {
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@ -69,7 +70,7 @@ static void __init zero_pmd_populate(pud_t *pud, unsigned long addr,
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next = pmd_addr_end(addr, end);
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if (IS_ALIGNED(addr, PMD_SIZE) && end - addr >= PMD_SIZE) {
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pmd_populate_kernel(&init_mm, pmd, kasan_zero_pte);
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pmd_populate_kernel(&init_mm, pmd, lm_alias(kasan_zero_pte));
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continue;
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}
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@ -92,9 +93,9 @@ static void __init zero_pud_populate(pgd_t *pgd, unsigned long addr,
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if (IS_ALIGNED(addr, PUD_SIZE) && end - addr >= PUD_SIZE) {
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pmd_t *pmd;
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pud_populate(&init_mm, pud, kasan_zero_pmd);
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pud_populate(&init_mm, pud, lm_alias(kasan_zero_pmd));
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pmd = pmd_offset(pud, addr);
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pmd_populate_kernel(&init_mm, pmd, kasan_zero_pte);
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pmd_populate_kernel(&init_mm, pmd, lm_alias(kasan_zero_pte));
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continue;
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}
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@ -135,11 +136,11 @@ void __init kasan_populate_zero_shadow(const void *shadow_start,
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* puds,pmds, so pgd_populate(), pud_populate()
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* is noops.
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*/
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pgd_populate(&init_mm, pgd, kasan_zero_pud);
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pgd_populate(&init_mm, pgd, lm_alias(kasan_zero_pud));
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pud = pud_offset(pgd, addr);
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pud_populate(&init_mm, pud, kasan_zero_pmd);
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pud_populate(&init_mm, pud, lm_alias(kasan_zero_pmd));
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pmd = pmd_offset(pud, addr);
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pmd_populate_kernel(&init_mm, pmd, kasan_zero_pte);
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pmd_populate_kernel(&init_mm, pmd, lm_alias(kasan_zero_pte));
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continue;
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}
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@ -108,13 +108,13 @@ static inline const char *check_kernel_text_object(const void *ptr,
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* __pa() is not just the reverse of __va(). This can be detected
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* and checked:
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*/
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textlow_linear = (unsigned long)__va(__pa(textlow));
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textlow_linear = (unsigned long)lm_alias(textlow);
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/* No different mapping: we're done. */
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if (textlow_linear == textlow)
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return NULL;
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/* Check the secondary mapping... */
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texthigh_linear = (unsigned long)__va(__pa(texthigh));
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texthigh_linear = (unsigned long)lm_alias(texthigh);
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if (overlaps(ptr, n, textlow_linear, texthigh_linear))
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return "<linear kernel text>";
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