diff --git a/qcom/sdxlemur-1024mb.dtsi b/qcom/sdxlemur-1024mb.dtsi
new file mode 100644
index 000000000000..86fae265cfbd
--- /dev/null
+++ b/qcom/sdxlemur-1024mb.dtsi
@@ -0,0 +1,9 @@
+#include "sdxlemur-512mb.dtsi"
+
+&mpss_adsp_mem {
+	reg = <0x90800000 0x10000000>;
+};
+
+&access_control_mem {
+	reg = <0x8fd80000 0x80000>;
+};
diff --git a/qcom/sdxlemur-512mb.dtsi b/qcom/sdxlemur-512mb.dtsi
new file mode 100644
index 000000000000..4e48c97523d0
--- /dev/null
+++ b/qcom/sdxlemur-512mb.dtsi
@@ -0,0 +1,53 @@
+&reserved_memory {
+	mpss_adsp_mem: mpss_adsp_region@90800000 {
+		no-map;
+		reg = <0x90800000 0xF800000>;
+	};
+
+	tz_mem: tz_mem_region@8ff00000 {
+		no-map;
+		reg = <0x8ff00000 0x600000>;
+	};
+
+	cmd_db: reserved-memory@8fee0000 {
+		compatible = "qcom,cmd-db";
+		no-map;
+		reg = <0x8fee0000 0x20000>;
+	};
+
+	smem_mem: smem_region@8fe20000 {
+		no-map;
+		reg = <0x8fe20000 0xc0000>;
+		label = "smem_mem";
+	};
+
+	aop_mem: aop_regions@0x8fe00000 {
+		no-map;
+		reg = <0x8fe00000 0x20000>;
+	};
+
+	access_control_mem: access_control_region@8fd80000 {
+		no-map;
+		reg = <0x8fd80000 0x40000>;
+	};
+
+	hyp_mem: hyp_region@8fd00000 {
+		no-map;
+		reg = <0x8fd00000 0x80000>;
+	};
+
+	secdata_mem: secdata_region@0x8fcfd000 {
+		no-map;
+		reg = <0x8fcfd000 0x1000>;
+	};
+
+	ipa_fw_mem: ipa_fw_region@0x8fced000 {
+		no-map;
+		reg = <0x8fced000 0x10000>;
+	};
+
+	mpss_dsm: mpss_dsm_region@8c400000 {
+		no-map;
+		reg = <0x8c400000 0x3200000>;
+	};
+};
diff --git a/qcom/sdxlemur-cdp.dts b/qcom/sdxlemur-cdp.dts
index 963cb1d1f502..93cd0f92dd66 100644
--- a/qcom/sdxlemur-cdp.dts
+++ b/qcom/sdxlemur-cdp.dts
@@ -2,7 +2,7 @@
 
 #include "sdxlemur.dtsi"
 #include "sdxlemur-cdp.dtsi"
-
+#include "sdxlemur-1024mb.dtsi"
 / {
 	model = "Qualcomm Technologies, Inc. SDXLEMUR CDP";
 	compatible = "qcom,sdxlemur-cdp",
diff --git a/qcom/sdxlemur-mtp-cpe.dts b/qcom/sdxlemur-mtp-cpe.dts
index 696b1ab58713..0e48eebc0c2f 100644
--- a/qcom/sdxlemur-mtp-cpe.dts
+++ b/qcom/sdxlemur-mtp-cpe.dts
@@ -2,6 +2,7 @@
 
 #include "sdxlemur.dtsi"
 #include "sdxlemur-mtp-cpe.dtsi"
+#include "sdxlemur-1024mb.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. SDXLEMUR MTP CPE";
diff --git a/qcom/sdxlemur-mtp-mbb-ntn3-pcie.dts b/qcom/sdxlemur-mtp-mbb-ntn3-pcie.dts
index ead998c52e3c..e8afacb3c415 100644
--- a/qcom/sdxlemur-mtp-mbb-ntn3-pcie.dts
+++ b/qcom/sdxlemur-mtp-mbb-ntn3-pcie.dts
@@ -2,6 +2,7 @@
 
 #include "sdxlemur.dtsi"
 #include "sdxlemur-mtp-mbb-ntn3-pcie.dtsi"
+#include "sdxlemur-1024mb.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. SDXLEMUR MTP MBB NTN3 PCIE";
diff --git a/qcom/sdxlemur-mtp-mbb-pcie-ep.dts b/qcom/sdxlemur-mtp-mbb-pcie-ep.dts
index 615f5c59659c..eb4521abbe69 100644
--- a/qcom/sdxlemur-mtp-mbb-pcie-ep.dts
+++ b/qcom/sdxlemur-mtp-mbb-pcie-ep.dts
@@ -2,6 +2,7 @@
 
 #include "sdxlemur.dtsi"
 #include "sdxlemur-mtp-mbb-pcie-ep.dtsi"
+#include "sdxlemur-512mb.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. SDXLEMUR MTP MBB PCIE-EP";
diff --git a/qcom/sdxlemur-mtp-mbb-pcie-rc-ep.dts b/qcom/sdxlemur-mtp-mbb-pcie-rc-ep.dts
index c849ed133087..ac65ac0913e2 100644
--- a/qcom/sdxlemur-mtp-mbb-pcie-rc-ep.dts
+++ b/qcom/sdxlemur-mtp-mbb-pcie-rc-ep.dts
@@ -2,6 +2,7 @@
 
 #include "sdxlemur.dtsi"
 #include "sdxlemur-mtp-mbb-pcie-rc-ep.dtsi"
+#include "sdxlemur-512mb.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. SDXLEMUR MTP MBB RC PCIE-EP";
diff --git a/qcom/sdxlemur-mtp-mbb.dts b/qcom/sdxlemur-mtp-mbb.dts
index 117c1bb3719b..e9bc21eb4200 100644
--- a/qcom/sdxlemur-mtp-mbb.dts
+++ b/qcom/sdxlemur-mtp-mbb.dts
@@ -2,6 +2,7 @@
 
 #include "sdxlemur.dtsi"
 #include "sdxlemur-mtp-mbb.dtsi"
+#include "sdxlemur-1024mb.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. SDXLEMUR MTP MBB";
diff --git a/qcom/sdxlemur-mtp.dts b/qcom/sdxlemur-mtp.dts
index f826463910c2..dfbdf23171f0 100644
--- a/qcom/sdxlemur-mtp.dts
+++ b/qcom/sdxlemur-mtp.dts
@@ -2,6 +2,7 @@
 
 #include "sdxlemur.dtsi"
 #include "sdxlemur-mtp.dtsi"
+#include "sdxlemur-1024mb.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. SDXLEMUR MTP";
diff --git a/qcom/sdxlemur-rcm-pcie-ep.dts b/qcom/sdxlemur-rcm-pcie-ep.dts
index 11a14dc88bef..43e60bca2eca 100644
--- a/qcom/sdxlemur-rcm-pcie-ep.dts
+++ b/qcom/sdxlemur-rcm-pcie-ep.dts
@@ -2,6 +2,7 @@
 
 #include "sdxlemur.dtsi"
 #include "sdxlemur-rcm-pcie-ep.dtsi"
+#include "sdxlemur-512mb.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. SDXLEMUR RCM PCIe-EP";
diff --git a/qcom/sdxlemur-rcm-rc.dts b/qcom/sdxlemur-rcm-rc.dts
index f061c22ed532..990224dd464a 100644
--- a/qcom/sdxlemur-rcm-rc.dts
+++ b/qcom/sdxlemur-rcm-rc.dts
@@ -2,6 +2,7 @@
 
 #include "sdxlemur.dtsi"
 #include "sdxlemur-rcm-rc.dtsi"
+#include "sdxlemur-1024mb.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. SDXLEMUR RCM Root Complex";
diff --git a/qcom/sdxlemur-rumi.dts b/qcom/sdxlemur-rumi.dts
index 59a28ebbef55..d0b471e1379f 100644
--- a/qcom/sdxlemur-rumi.dts
+++ b/qcom/sdxlemur-rumi.dts
@@ -2,6 +2,7 @@
 
 #include "sdxlemur.dtsi"
 #include "sdxlemur-rumi.dtsi"
+#include "sdxlemur-1024mb.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. SDXLEMUR RUMI";
diff --git a/qcom/sdxlemur.dtsi b/qcom/sdxlemur.dtsi
index f7026ee36267..a3294e016f86 100644
--- a/qcom/sdxlemur.dtsi
+++ b/qcom/sdxlemur.dtsi
@@ -32,48 +32,6 @@
 		#size-cells = <1>;
 		ranges;
 
-	cmd_db: reserved-memory@8fee0000 {
-		compatible = "qcom,cmd-db";
-		no-map;
-		reg = <0x8fee0000 0x20000>;
-	};
-
-		mpss_adsp_mem: mpss_adsp_region@90800000 {
-			no-map;
-			reg = <0x90800000 0x10000000>;
-		};
-
-		tz_mem: tz_mem_region@8ff00000 {
-			no-map;
-			reg = <0x8ff00000 0x600000>;
-		};
-
-		smem_mem: smem_region@8fe40000 {
-			no-map;
-			reg = <0x8fe40000 0xc0000>;
-			label = "smem_mem";
-		};
-
-		peripheral_mem: peripheral_region@8fd00000 {
-			no-map;
-			reg = <0x8fd00000 0x140000>;
-		};
-
-		/*
-		 * The exact size of this region may vary based on DDR size.
-		 * 0x100000 will be valid for all DDR sizes at the cost of
-		 * slightly reducing the memory available for HLOS.
-		 */
-		peripheral_mem2: peripheral_region2@8fb00000 {
-			no-map;
-			reg = <0x8fb00000 0x100000>;
-		};
-
-		mpss_dsm: mpss_dsm_region@8c400000 {
-			no-map;
-			reg = <0x8c400000 0x3200000>;
-		};
-
 		dump_mem: mem_dump_region {
 			compatible = "shared-dma-pool";
 			alloc-ranges = <0x00000000 0xffffffff>;