From 7a99e2e0d8e037a81ee7312e21e4b27cf4b454c5 Mon Sep 17 00:00:00 2001
From: Jagadeesh Kona <jkona@qti.qualcomm.com>
Date: Mon, 14 Sep 2020 16:40:38 +0530
Subject: [PATCH] dt-bindings: clock: Add support for YUPIK clock controllers

Update the GCC, GPUCC, CAMCC, DISPCC, VIDEOCC and debug
clock controller bindings for YUPIK device.

Change-Id: Id5e12fa1671030dc183b7a9cabda7a9dca198f52
---
 bindings/clock/qcom,camcc.txt   |  1 +
 bindings/clock/qcom,debugcc.txt |  1 +
 bindings/clock/qcom,dispcc.txt  |  1 +
 bindings/clock/qcom,gcc.txt     |  1 +
 bindings/clock/qcom,gpucc.txt   | 11 ++++++-----
 bindings/clock/qcom,videocc.txt |  1 +
 6 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/bindings/clock/qcom,camcc.txt b/bindings/clock/qcom,camcc.txt
index b9e3105751a5..cc72c85575d0 100644
--- a/bindings/clock/qcom,camcc.txt
+++ b/bindings/clock/qcom,camcc.txt
@@ -11,6 +11,7 @@ Required properties :
 			"qcom,sm8150-camcc-v2"
 			"qcom,sa8155-camcc"
 			"qcom,sa8155-camcc-v2"
+			"qcom,yupik-camcc"
 
 - reg : shall contain base register location and length.
 - reg-names: names of registers listed in the same order as in
diff --git a/bindings/clock/qcom,debugcc.txt b/bindings/clock/qcom,debugcc.txt
index c7d82f90a3c8..59290aa6d1a4 100644
--- a/bindings/clock/qcom,debugcc.txt
+++ b/bindings/clock/qcom,debugcc.txt
@@ -9,6 +9,7 @@ Required properties :
 			"qcom,holi-debugcc"
 			"qcom,sdxlemur-debugcc"
 			"qcom,sm8150-debugcc"
+			"qcom,yupik-debugcc"
 
 - qcom,gcc: phandle to the GCC device node.
 - qcom,videocc: phandle to the Video CC device node.
diff --git a/bindings/clock/qcom,dispcc.txt b/bindings/clock/qcom,dispcc.txt
index 80bbef3710ec..8341e8b8c742 100644
--- a/bindings/clock/qcom,dispcc.txt
+++ b/bindings/clock/qcom,dispcc.txt
@@ -11,6 +11,7 @@ Required properties :
 			"qcom,holi-dispcc"
 			"qcom,sm8150-dispcc"
 			"qcom,sm8150-dispcc-v2"
+			"qcom,yupik-dispcc"
 
 - reg : shall contain base register location and length.
 - #clock-cells : from common clock binding, shall contain 1.
diff --git a/bindings/clock/qcom,gcc.txt b/bindings/clock/qcom,gcc.txt
index f72a8ff537e6..c15e9b6800b7 100644
--- a/bindings/clock/qcom,gcc.txt
+++ b/bindings/clock/qcom,gcc.txt
@@ -31,6 +31,7 @@ Required properties :
 			"qcom,shima-gcc"
 			"qcom,holi-gcc"
 			"qcom,sdxlemur-gcc"
+			"qcom,yupik-gcc"
 
 - reg : shall contain base register location and length
 - vdd_cx-supply: The vdd_cx logic rail supply.
diff --git a/bindings/clock/qcom,gpucc.txt b/bindings/clock/qcom,gpucc.txt
index 726c24257d24..efd611826979 100644
--- a/bindings/clock/qcom,gpucc.txt
+++ b/bindings/clock/qcom,gpucc.txt
@@ -3,11 +3,12 @@ Qualcomm Technologies, Inc. Graphics Clock & Reset Controller Binding
 
 Required properties :
 - compatible : shall contain "qcom,sdm845-gpucc" or "qcom,msm8998-gpucc",
-		"qcom,lahaina-gpucc",
-		"qcom,shima-gpucc",
-		"qcom,holi-gpucc",
-		"qcom,sm8150-gpucc",
-		"qcom,sa8155-gpucc".
+		"qcom,lahaina-gpucc"
+		"qcom,shima-gpucc"
+		"qcom,holi-gpucc"
+		"qcom,sm8150-gpucc"
+		"qcom,sa8155-gpucc"
+		"qcom,yupik-gpucc"
 
 - reg: shall contain base register offset and size.
 - reg-names: names of registers listed in the same order as in the reg property.
diff --git a/bindings/clock/qcom,videocc.txt b/bindings/clock/qcom,videocc.txt
index e46fa2db829b..64f41ad07942 100644
--- a/bindings/clock/qcom,videocc.txt
+++ b/bindings/clock/qcom,videocc.txt
@@ -11,6 +11,7 @@ Required properties :
 			"qcom,sm8150-videocc-v2"
 			"qcom,sa8155-videocc"
 			"qcom,sa8155-videocc-v2"
+			"qcom,yupik-videocc"
 
 - reg : shall contain base register location and length
 - #clock-cells : from common clock binding, shall contain 1.