From 386df4e611f2d43747bfefa5e87caccabf85e9d1 Mon Sep 17 00:00:00 2001
From: Prasad Kumpatla <nkumpat@codeaurora.org>
Date: Fri, 11 Oct 2019 18:23:16 +0530
Subject: [PATCH] soc: soundwire: Add delay to over come race condition

Switch b/w 44.1Khz to 48Khz and vice versa,mux switch on
HPH path is unable to take place.Add sufficient delay to
happen clock release.

Change-Id: I80c40772c03bbbd3a57a4e6de270de4779f882a7
Signed-off-by: Prasad Kumpatla <nkumpat@codeaurora.org>
---
 soc/swr-mstr-ctrl.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/soc/swr-mstr-ctrl.c b/soc/swr-mstr-ctrl.c
index ead3c9baaa8c..e1ec36f0597a 100644
--- a/soc/swr-mstr-ctrl.c
+++ b/soc/swr-mstr-ctrl.c
@@ -2847,6 +2847,12 @@ int swrm_wcd_notify(struct platform_device *pdev, u32 id, void *data)
 						__func__, swrm->state);
 				else
 					swrm_device_suspend(&pdev->dev);
+				/*
+				 * add delay to ensure clk release happen
+				 * if interrupt triggered for clk stop,
+				 * wait for it to exit
+				 */
+				usleep_range(10000, 10500);
 			}
 			swrm->mclk_freq = *(int *)data;
 			mutex_unlock(&swrm->mlock);