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qcacmn: add support to clear the consumed HW descriptors
Add support to clear/reset the consumed HW descriptors to zero. Change-Id: Idccb120afa448c4f958a3177f27cab9b1197ac3e CRs-Fixed: 2978850
This commit is contained in:
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00ac04113c
commit
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4 changed files with 91 additions and 0 deletions
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@ -1562,6 +1562,36 @@ dp_tx_hw_desc_update_evt(uint8_t *hal_tx_desc_cached,
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}
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#endif
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#if defined(CLEAR_SW2TCL_CONSUMED_DESC)
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/**
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* dp_tx_clear_consumed_hw_descs - Reset all the consumed Tx ring descs to 0
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*
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* @soc: DP soc handle
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* @hal_ring_hdl: Source ring pointer
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*
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* Return: void
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*/
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static inline
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void dp_tx_clear_consumed_hw_descs(struct dp_soc *soc,
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hal_ring_handle_t hal_ring_hdl)
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{
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void *desc = hal_srng_src_get_next_consumed(soc->hal_soc, hal_ring_hdl);
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while (desc) {
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hal_tx_desc_clear(desc);
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desc = hal_srng_src_get_next_consumed(soc->hal_soc,
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hal_ring_hdl);
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}
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}
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#else
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static inline
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void dp_tx_clear_consumed_hw_descs(struct dp_soc *soc,
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hal_ring_handle_t hal_ring_hdl)
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{
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}
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#endif /* CLEAR_SW2TCL_CONSUMED_DESC */
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/**
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* dp_tx_hw_enqueue() - Enqueue to TCL HW for transmit
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* @soc: DP Soc Handle
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@ -1697,6 +1727,8 @@ dp_tx_hw_enqueue(struct dp_soc *soc, struct dp_vdev *vdev,
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return status;
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}
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dp_tx_clear_consumed_hw_descs(soc, hal_ring_hdl);
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/* Sync cached descriptor with HW */
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hal_tx_desc = hal_srng_src_get_next(soc->hal_soc, hal_ring_hdl);
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@ -1764,6 +1764,48 @@ void hal_get_sw_hptp(void *hal_soc, hal_ring_handle_t hal_ring_hdl,
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}
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}
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#if defined(CLEAR_SW2TCL_CONSUMED_DESC)
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/**
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* hal_srng_src_get_next_consumed - Get the next desc if consumed by HW
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*
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* @hal_soc: Opaque HAL SOC handle
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* @hal_ring_hdl: Source ring pointer
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*
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* Return: pointer to descriptor if consumed by HW, else NULL
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*/
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static inline
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void *hal_srng_src_get_next_consumed(void *hal_soc,
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hal_ring_handle_t hal_ring_hdl)
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{
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struct hal_srng *srng = (struct hal_srng *)hal_ring_hdl;
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uint32_t *desc = NULL;
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/* TODO: Using % is expensive, but we have to do this since
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* size of some SRNG rings is not power of 2 (due to descriptor
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* sizes). Need to create separate API for rings used
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* per-packet, with sizes power of 2 (TCL2SW, REO2SW,
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* SW2RXDMA and CE rings)
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*/
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uint32_t next_entry = (srng->last_desc_cleared + srng->entry_size) %
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srng->ring_size;
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if (next_entry != (srng->u.src_ring.cached_tp + srng->entry_size) %
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srng->ring_size) {
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desc = &srng->ring_base_vaddr[next_entry];
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srng->last_desc_cleared = next_entry;
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}
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return desc;
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}
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#else
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static inline
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void *hal_srng_src_get_next_consumed(void *hal_soc,
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hal_ring_handle_t hal_ring_hdl)
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{
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return NULL;
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}
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#endif /* CLEAR_SW2TCL_CONSUMED_DESC */
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/**
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* hal_srng_src_get_next - Get next entry from a source ring and move cached tail pointer
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*
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@ -472,6 +472,10 @@ struct hal_srng {
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unsigned long srng_event;
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/* last flushed time stamp */
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uint64_t last_flush_ts;
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#if defined(CLEAR_SW2TCL_CONSUMED_DESC)
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/* last ring desc entry cleared */
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uint32_t last_desc_cleared;
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#endif
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#if defined(FEATURE_HAL_DELAYED_REG_WRITE) || \
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defined(FEATURE_HAL_DELAYED_REG_WRITE_V2)
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/* Previous hp/tp (based on ring dir) value written to the reg */
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@ -463,6 +463,19 @@ static inline void hal_tx_desc_set_hlos_tid(void *desc,
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HAL_SET_FLD(desc, TCL_DATA_CMD_4, HLOS_TID_OVERWRITE) |=
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HAL_TX_SM(TCL_DATA_CMD_4, HLOS_TID_OVERWRITE, 1);
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}
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/**
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* hal_tx_desc_clear - Clear the HW descriptor entry
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* @hw_desc: Hardware descriptor to be cleared
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*
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* Return: void
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*/
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static inline void hal_tx_desc_clear(void *hw_desc)
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{
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qdf_mem_set(hw_desc + sizeof(struct tlv_32_hdr),
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HAL_TX_DESC_LEN_BYTES, 0);
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}
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/**
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* hal_tx_desc_sync - Commit the descriptor to Hardware
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* @hal_tx_des_cached: Cached descriptor that software maintains
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