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msm: kgsl: Separate out reset sequence for a6xx gmu targets
Now that we have a6xx gmu specific gpudev, we can dissociate the gmu reset sequence from the generic a6xx_reset function. Change-Id: Ib56456d5390fc059fc34407941f805c06cdfe42a Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
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8508ab4292
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3 changed files with 42 additions and 18 deletions
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@ -1080,23 +1080,15 @@ static int64_t a6xx_read_throttling_counters(struct adreno_device *adreno_dev)
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* a6xx_reset() - Helper function to reset the GPU
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* @device: Pointer to the KGSL device structure for the GPU
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*
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* Try to reset the GPU to recover from a fault. First, try to do a low latency
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* soft reset. If the soft reset fails for some reason, then bring out the big
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* guns and toggle the footswitch.
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* Try to reset the GPU to recover from a fault for targets without
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* a GMU.
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*/
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static int a6xx_reset(struct kgsl_device *device)
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{
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struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
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int ret;
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/*
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* GMU devices transition to KGSL_STATE_RESET, non GMU devices go
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* directly to KGSL_STATE_INIT
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*/
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if (gmu_core_isenabled(device))
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kgsl_pwrctrl_change_state(device, KGSL_STATE_RESET);
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else
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kgsl_pwrctrl_change_state(device, KGSL_STATE_INIT);
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kgsl_pwrctrl_change_state(device, KGSL_STATE_INIT);
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/* since device is officially off now clear start bit */
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clear_bit(ADRENO_DEVICE_STARTED, &adreno_dev->priv);
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@ -2702,7 +2694,7 @@ struct adreno_gpudev adreno_a6xx_gmu_gpudev = {
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.gpu_keepalive = a6xx_gpu_keepalive,
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.hw_isidle = a6xx_hw_isidle,
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.iommu_fault_block = a6xx_iommu_fault_block,
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.reset = a6xx_reset,
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.reset = a6xx_gmu_restart,
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.preemption_pre_ibsubmit = a6xx_preemption_pre_ibsubmit,
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.preemption_post_ibsubmit = a6xx_preemption_post_ibsubmit,
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.preemption_init = a6xx_preemption_init,
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@ -2098,12 +2098,15 @@ static int a6xx_gmu_first_boot(struct adreno_device *adreno_dev)
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icc_set_bw(pwr->icc_path, 0, 0);
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gmu->fault = false;
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return 0;
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err:
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a6xx_gmu_suspend(adreno_dev);
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return ret;
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if (gmu->fault) {
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a6xx_gmu_suspend(adreno_dev);
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return ret;
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}
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clks_gdsc_off:
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clk_bulk_disable_unprepare(gmu->num_clks, gmu->clks);
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@ -2168,12 +2171,15 @@ static int a6xx_gmu_boot(struct adreno_device *adreno_dev)
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if (ret)
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goto err;
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gmu->fault = false;
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return 0;
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err:
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a6xx_gmu_suspend(adreno_dev);
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return ret;
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if (gmu->fault) {
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a6xx_gmu_suspend(adreno_dev);
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return ret;
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}
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clks_gdsc_off:
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clk_bulk_disable_unprepare(gmu->num_clks, gmu->clks);
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@ -3144,6 +3150,24 @@ int a6xx_gmu_device_probe(struct platform_device *pdev,
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return 0;
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}
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int a6xx_gmu_restart(struct kgsl_device *device)
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{
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struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
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struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);
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a6xx_hfi_stop(adreno_dev);
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disable_gpu_irq(adreno_dev);
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/* Hard reset the gmu and gpu */
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a6xx_gmu_suspend(adreno_dev);
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clear_bit(GMU_PRIV_GPU_STARTED, &gmu->flags);
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/* Attempt to reboot the gmu and gpu */
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return a6xx_boot(adreno_dev);
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}
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static int a6xx_gmu_bind(struct device *dev, struct device *master, void *data)
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{
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struct kgsl_device *device = dev_get_drvdata(master);
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@ -266,4 +266,12 @@ void a6xx_gmu_device_snapshot(struct kgsl_device *device,
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*/
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int a6xx_gmu_device_probe(struct platform_device *pdev,
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u32 chipid, const struct adreno_gpu_core *gpucore);
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/**
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* a6xx_gmu_restart - Reset and restart the gmu
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* @device: Pointer to the kgsl device
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*
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* Return: 0 on success or negative error on failure
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*/
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int a6xx_gmu_restart(struct kgsl_device *device);
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#endif
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