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mmc: sdhci-esdhc: Add SDHCI_QUIRK_32BIT_DMA_ADDR

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The eSDHC can only DMA from 32-bit-aligned addresses.

This fixes the following test cases of mmc_test:
  11:	Badly aligned write
  12:	Badly aligned read
  13:	Badly aligned multi-block write
  14:	Badly aligned multi-block read

Signed-off-by: Benoît Thébaudeau <[email protected]>
Acked-by: Adrian Hunter <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Ulf Hansson <[email protected]>
This commit is contained in:
Benoît Thébaudeau 2017-05-30 11:14:08 +02:00 • committed by Ulf Hansson
commit cbb4509374
1 changed files with 1 additions and 0 deletions
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1
drivers/mmc/host/sdhci-esdhc.h
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@ -19,6 +19,7 @@
*/
#define ESDHC_DEFAULT_QUIRKS (SDHCI_QUIRK_FORCE_BLK_SZ_2048 | \
SDHCI_QUIRK_32BIT_DMA_ADDR | \
SDHCI_QUIRK_NO_BUSY_IRQ | \
SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | \
SDHCI_QUIRK_PIO_NEEDS_DELAY | \