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ARM: SoC: driver changes
These changes are mostly for ARM specific device drivers that either don't have an upstream maintainer, or that had the maintainer ask us to pick up the changes to avoid conflicts. A large chunk of this are clock drivers (bcm281xx, exynos, versatile, shmobile), aside from that, reset controllers for STi as well as a large rework of the Marvell Orion/EBU watchdog driver are notable. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAUz/1+GCrR//JCVInAQJmfg/9GyqHatDjjUPUBjUQRIEtKgGdmQwdbDqF x+OrS/q5B5zYbpIWkbkt1IUYJfU+89Z5ev9jxI4rV824Nu9Y92mHPDnv+N/ptkIh q2OVP3bQDpWs3aEVV2B1HBNcWrNUuwco9BJu05eegEePii/cto0/wKwWIgUmrmjy xOLthsnp2YmeplGs7ctC6Dz8XbmELebpawejTGylARXei/SwmzB/YYDgJbYjRL2I WSCVa8Vo+MZaGC/yxdKVTtvsKVQenxGoMO3ojikJeRdvuVRJds48Cw+UBdzWYNeJ 3Ssvbdx6Xltf9jy/7H0btOUgxPetZuUV+2XpbWfGu0Zr9FcGDv3q9hrxA+UYKnkY GIGU0otSsmpHnX5Ms3E2xnHiV/fihxA3qohqts5kYRBDr5uc+IpW6SbDymQliCGG OO4XmIVM3pmsqAqP3Zuseemt9CeSW2yC0XlfXkzjO74yY39c+WLBbtGI40Z5W6i0 mM1C8RD3QSNijYCEC8eqz06BQfRImsPs+jllsnJTZaHfbOsib718uvandjfG26lN 616YMcqq0Sp51HIQ4qW7f2dQr7vOyNqbukdkrwF5JgkY/nVki5kdciRg/yeipRy6 Ey80a+OTq0GQljM0F2dcH/A1eHH9KsuI1L6NdSMJsl0h6guIBORPTwTw3qJ13OkR wpJyM+Gm+Fk= =u/FI -----END PGP SIGNATURE----- Merge tag 'drivers-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver changes from Arnd Bergmann: "These changes are mostly for ARM specific device drivers that either don't have an upstream maintainer, or that had the maintainer ask us to pick up the changes to avoid conflicts. A large chunk of this are clock drivers (bcm281xx, exynos, versatile, shmobile), aside from that, reset controllers for STi as well as a large rework of the Marvell Orion/EBU watchdog driver are notable" * tag 'drivers-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (99 commits) Revert "dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac." Revert "net: stmmac: Add SOCFPGA glue driver" ARM: shmobile: r8a7791: Fix SCIFA3-5 clocks ARM: STi: Add reset controller support to mach-sti Kconfig drivers: reset: stih416: add softreset controller drivers: reset: stih415: add softreset controller drivers: reset: Reset controller driver for STiH416 drivers: reset: Reset controller driver for STiH415 drivers: reset: STi SoC system configuration reset controller support dts: socfpga: Add sysmgr node so the gmac can use to reference dts: socfpga: Add support for SD/MMC on the SOCFPGA platform reset: Add optional resets and stubs ARM: shmobile: r7s72100: fix bus clock calculation Power: Reset: Generalize qnap-poweroff to work on Synology devices. dts: socfpga: Update clock entry to support multiple parents ARM: socfpga: Update socfpga_defconfig dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac. net: stmmac: Add SOCFPGA glue driver watchdog: orion_wdt: Use %pa to print 'phys_addr_t' drivers: cci: Export CCI PMU revision ...
This commit is contained in:
commit
cbda94e039
107 changed files with 5490 additions and 699 deletions
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@ -31,7 +31,6 @@
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#define DRIVER_NAME "CCI-400"
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#define DRIVER_NAME_PMU DRIVER_NAME " PMU"
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#define PMU_NAME "CCI_400"
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#define CCI_PORT_CTRL 0x0
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#define CCI_CTRL_STATUS 0xc
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@ -88,8 +87,7 @@ static unsigned long cci_ctrl_phys;
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#define CCI_REV_R0 0
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#define CCI_REV_R1 1
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#define CCI_REV_R0_P4 4
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#define CCI_REV_R1_P2 6
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#define CCI_REV_R1_PX 5
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#define CCI_PMU_EVT_SEL 0x000
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#define CCI_PMU_CNTR 0x004
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@ -163,6 +161,15 @@ static struct pmu_port_event_ranges port_event_range[] = {
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},
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};
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/*
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* Export different PMU names for the different revisions so userspace knows
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* because the event ids are different
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*/
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static char *const pmu_names[] = {
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[CCI_REV_R0] = "CCI_400",
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[CCI_REV_R1] = "CCI_400_r1",
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};
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struct cci_pmu_drv_data {
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void __iomem *base;
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struct arm_pmu *cci_pmu;
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@ -193,21 +200,16 @@ static int probe_cci_revision(void)
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rev = readl_relaxed(cci_ctrl_base + CCI_PID2) & CCI_PID2_REV_MASK;
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rev >>= CCI_PID2_REV_SHIFT;
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if (rev <= CCI_REV_R0_P4)
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if (rev < CCI_REV_R1_PX)
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return CCI_REV_R0;
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else if (rev <= CCI_REV_R1_P2)
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else
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return CCI_REV_R1;
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return -ENOENT;
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}
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static struct pmu_port_event_ranges *port_range_by_rev(void)
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{
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int rev = probe_cci_revision();
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if (rev < 0)
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return NULL;
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return &port_event_range[rev];
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}
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@ -526,7 +528,7 @@ static void pmu_write_counter(struct perf_event *event, u32 value)
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static int cci_pmu_init(struct arm_pmu *cci_pmu, struct platform_device *pdev)
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{
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*cci_pmu = (struct arm_pmu){
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.name = PMU_NAME,
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.name = pmu_names[probe_cci_revision()],
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.max_period = (1LLU << 32) - 1,
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.get_hw_events = pmu_get_hw_events,
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.get_event_idx = pmu_get_event_idx,
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@ -890,13 +890,12 @@ int __init mvebu_mbus_dt_init(void)
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const __be32 *prop;
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int ret;
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np = of_find_matching_node(NULL, of_mvebu_mbus_ids);
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np = of_find_matching_node_and_match(NULL, of_mvebu_mbus_ids, &of_id);
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if (!np) {
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pr_err("could not find a matching SoC family\n");
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return -ENODEV;
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}
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of_id = of_match_node(of_mvebu_mbus_ids, np);
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mbus_state.soc = of_id->data;
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prop = of_get_property(np, "controller", NULL);
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