From d5e7f51c74d3ad691f7e349ca1f1160d47157341 Mon Sep 17 00:00:00 2001 From: Anant Goel Date: Thu, 6 May 2021 20:52:01 -0700 Subject: [PATCH] ARM: dts: msm: Add GPIO support for the PCIe RCs on the Direwolf platform Add the GPIO definitions for PCIe RCs 2a, 2b, 3a, 3b, and 4, for the Direwolf platform. Change-Id: I9f2467e0f49f36cb27f81544d668e93f518277f7 --- qcom/direwolf-pinctrl.dtsi | 270 +++++++++++++++++++++++++++++++++++++ 1 file changed, 270 insertions(+) diff --git a/qcom/direwolf-pinctrl.dtsi b/qcom/direwolf-pinctrl.dtsi index e3fb955590ac..742c12f51810 100644 --- a/qcom/direwolf-pinctrl.dtsi +++ b/qcom/direwolf-pinctrl.dtsi @@ -1577,4 +1577,274 @@ }; }; }; + + pcie0 { + pcie2a_perst_default: pcie2a_perst_default { + mux { + pins = "gpio143"; + function = "gpio"; + }; + + config { + pins = "gpio143"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + pcie2a_clkreq_default: pcie2a_clkreq_default { + mux { + pins = "gpio142"; + function = "pcie2a_clkreq"; + }; + + config { + pins = "gpio142"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pcie2a_wake_default: pcie2a_wake_default { + mux { + pins = "gpio145"; + function = "gpio"; + }; + + config { + pins = "gpio145"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pcie2a_clkreq_sleep: pcie2a_clkreq_sleep { + mux { + pins = "gpio142"; + function = "gpio"; + }; + + config { + pins = "gpio142"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + pcie1 { + pcie2b_perst_default: pcie2b_perst_default { + mux { + pins = "gpio147"; + function = "gpio"; + }; + + config { + pins = "gpio147"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + pcie2b_clkreq_default: pcie2b_clkreq_default { + mux { + pins = "gpio144"; + function = "pcie2b_clkreq"; + }; + + config { + pins = "gpio144"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pcie2b_wake_default: pcie2b_wake_default { + mux { + pins = "gpio146"; + function = "gpio"; + }; + + config { + pins = "gpio146"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pcie2b_clkreq_sleep: pcie2b_clkreq_sleep { + mux { + pins = "gpio144"; + function = "gpio"; + }; + + config { + pins = "gpio144"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + pcie2 { + pcie3a_perst_default: pcie3a_perst_default { + mux { + pins = "gpio151"; + function = "gpio"; + }; + + config { + pins = "gpio151"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + pcie3a_clkreq_default: pcie3a_clkreq_default { + mux { + pins = "gpio150"; + function = "pcie3a_clkreq"; + }; + + config { + pins = "gpio150"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pcie3a_wake_default: pcie3a_wake_default { + mux { + pins = "gpio56"; + function = "gpio"; + }; + + config { + pins = "gpio56"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pcie3a_clkreq_sleep: pcie3a_clkreq_sleep { + mux { + pins = "gpio150"; + function = "gpio"; + }; + + config { + pins = "gpio150"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + pcie3 { + pcie3b_perst_default: pcie3b_perst_default { + mux { + pins = "gpio153"; + function = "gpio"; + }; + + config { + pins = "gpio153"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + pcie3b_clkreq_default: pcie3b_clkreq_default { + mux { + pins = "gpio152"; + function = "pcie3b_clkreq"; + }; + + config { + pins = "gpio152"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pcie3b_wake_default: pcie3b_wake_default { + mux { + pins = "gpio130"; + function = "gpio"; + }; + + config { + pins = "gpio130"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pcie3b_clkreq_sleep: pcie3b_clkreq_sleep { + mux { + pins = "gpio152"; + function = "gpio"; + }; + + config { + pins = "gpio152"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + pcie4 { + pcie4_perst_default: pcie4_perst_default { + mux { + pins = "gpio141"; + function = "gpio"; + }; + + config { + pins = "gpio141"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + pcie4_clkreq_default: pcie4_clkreq_default { + mux { + pins = "gpio140"; + function = "pcie4_clkreq"; + }; + + config { + pins = "gpio140"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pcie4_wake_default: pcie4_wake_default { + mux { + pins = "gpio139"; + function = "gpio"; + }; + + config { + pins = "gpio139"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pcie4_clkreq_sleep: pcie4_clkreq_sleep { + mux { + pins = "gpio140"; + function = "gpio"; + }; + + config { + pins = "gpio140"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; };