mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-09 13:49:24 -04:00
Merge "ARM: dts: msm: create sde-display-common device tree on Holi"
This commit is contained in:
qctecmdr
Gerrit - the friendly Code Review server
commit
cd0197aa0d
2 changed files with 172 additions and 158 deletions
148
display/holi-sde-display-common.dtsi
Normal file
148
display/holi-sde-display-common.dtsi
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@ -0,0 +1,148 @@
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#include "dsi-panel-sim-video.dtsi"
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#include "dsi-panel-rm69299-visionox-fhd-plus-video.dtsi"
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#include "dsi-panel-rm69299-visionox-fhd-plus-cmd.dtsi"
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#include "dsi-panel-r66451-dsc-fhd-plus-cmd.dtsi"
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#include "dsi-panel-r66451-dsc-fhd-plus-video.dtsi"
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#include <dt-bindings/clock/mdss-10nm-pll-clk.h>
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&soc {
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dsi_panel_pwr_supply: dsi_panel_pwr_supply {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,panel-supply-entry@0 {
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reg = <0>;
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qcom,supply-name = "vddio";
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qcom,supply-min-voltage = <1800000>;
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qcom,supply-max-voltage = <1800000>;
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qcom,supply-enable-load = <62000>;
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qcom,supply-disable-load = <80>;
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qcom,supply-post-on-sleep = <20>;
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};
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qcom,panel-supply-entry@1 {
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reg = <1>;
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qcom,supply-name = "vdd";
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qcom,supply-min-voltage = <3000000>;
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qcom,supply-max-voltage = <3000000>;
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qcom,supply-enable-load = <857000>;
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qcom,supply-disable-load = <0>;
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qcom,supply-post-on-sleep = <0>;
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};
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qcom,panel-supply-entry@2 {
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reg = <2>;
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qcom,supply-name = "lab";
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qcom,supply-min-voltage = <4600000>;
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qcom,supply-max-voltage = <6000000>;
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qcom,supply-enable-load = <0>;
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qcom,supply-disable-load = <0>;
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};
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qcom,panel-supply-entry@3 {
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reg = <3>;
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qcom,supply-name = "ibb";
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qcom,supply-min-voltage = <4600000>;
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qcom,supply-max-voltage = <6000000>;
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qcom,supply-enable-load = <0>;
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qcom,supply-disable-load = <0>;
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qcom,supply-post-on-sleep = <20>;
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};
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};
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sde_dsi: qcom,dsi-display-primary {
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compatible = "qcom,dsi-display";
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label = "primary";
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qcom,dsi-ctrl = <&mdss_dsi0>;
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qcom,dsi-phy = <&mdss_dsi_phy0>;
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qcom,mdp = <&mdss_mdp>;
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qcom,dsi-default-panel = <&dsi_rm69299_visionox_amoled_video>;
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};
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};
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&dsi_sim_vid {
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qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
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qcom,mdss-dsi-display-timings {
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timing@0 {
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qcom,mdss-dsi-panel-phy-timings = [01 05 01 01 03 03 01
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01 01 02 04 00 06 06];
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qcom,display-topology = <1 0 1>;
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qcom,default-topology-index = <0>;
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};
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};
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};
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&dsi_rm69299_visionox_amoled_video {
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qcom,dsi-supported-dfps-list = <60 55 48>;
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qcom,mdss-dsi-pan-enable-dynamic-fps;
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qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
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qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
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qcom,mdss-dsi-t-clk-post = <0x0E>;
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qcom,mdss-dsi-t-clk-pre = <0x31>;
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qcom,mdss-dsi-display-timings {
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timing@0 {
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qcom,mdss-dsi-panel-phy-timings = [00 20 08 08 24 23 08
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08 05 02 04 00];
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qcom,display-topology = <1 0 1>;
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qcom,default-topology-index = <0>;
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};
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};
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};
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&dsi_rm69299_visionox_amoled_cmd {
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qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
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qcom,mdss-dsi-t-clk-post = <0x0E>;
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qcom,mdss-dsi-t-clk-pre = <0x31>;
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qcom,mdss-dsi-display-timings {
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timing@0 {
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qcom,mdss-dsi-panel-phy-timings = [00 20 08 08 24 23 08
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08 05 02 04 00];
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qcom,display-topology = <1 0 1>;
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qcom,default-topology-index = <0>;
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};
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};
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};
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&dsi_r66451_amoled_cmd {
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qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
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qcom,mdss-dsi-t-clk-post = <0x0A>;
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qcom,mdss-dsi-t-clk-pre = <0x1D>;
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qcom,mdss-dsi-display-timings {
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timing@0 {
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qcom,mdss-dsi-panel-phy-timings = [00 10 04 04 1E 1E 04
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04 03 02 04 00];
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qcom,display-topology = <1 1 1>;
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qcom,default-topology-index = <0>;
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};
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timing@1 {
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qcom,mdss-dsi-panel-phy-timings = [00 16 06 05 20 1F 06
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06 06 02 04 00];
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qcom,display-topology = <1 1 1>;
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qcom,default-topology-index = <0>;
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};
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timing@2 {
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qcom,mdss-dsi-panel-phy-timings = [00 1C 08 07 23 22 07
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07 08 02 04 00];
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qcom,display-topology = <1 1 1>;
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qcom,default-topology-index = <0>;
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};
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};
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};
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&dsi_r66451_amoled_video {
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qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
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qcom,mdss-dsi-t-clk-post = <0x0B>;
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qcom,mdss-dsi-t-clk-pre = <0x27>;
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qcom,mdss-dsi-display-timings {
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timing@0 {
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qcom,mdss-dsi-panel-phy-timings = [00 16 06 05 20 1F 06
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06 06 02 04 00];
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qcom,display-topology = <1 1 1>;
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qcom,default-topology-index = <0>;
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};
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};
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};
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@ -1,9 +1,4 @@
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#include "dsi-panel-sim-video.dtsi"
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#include "dsi-panel-rm69299-visionox-fhd-plus-video.dtsi"
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#include "dsi-panel-rm69299-visionox-fhd-plus-cmd.dtsi"
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#include "dsi-panel-r66451-dsc-fhd-plus-cmd.dtsi"
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#include "dsi-panel-r66451-dsc-fhd-plus-video.dtsi"
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#include <dt-bindings/clock/mdss-10nm-pll-clk.h>
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#include "holi-sde-display-common.dtsi"
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&pm6150l_gpios {
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disp_pins {
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@ -18,102 +13,35 @@
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};
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};
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&soc {
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dsi_panel_pwr_supply: dsi_panel_pwr_supply {
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#address-cells = <1>;
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#size-cells = <0>;
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&sde_dsi {
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clocks = <&mdss_dsi_phy0 BYTECLK_MUX_0_CLK>,
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<&mdss_dsi_phy0 PCLK_MUX_0_CLK>,
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<&mdss_dsi_phy0 BYTECLK_SRC_0_CLK>,
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<&mdss_dsi_phy0 PCLK_SRC_0_CLK>,
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<&mdss_dsi_phy0 SHADOW_BYTECLK_SRC_0_CLK>,
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<&mdss_dsi_phy0 SHADOW_PCLK_SRC_0_CLK>;
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clock-names = "mux_byte_clk0", "mux_pixel_clk0",
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"src_byte_clk0", "src_pixel_clk0",
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"shadow_byte_clk0", "shadow_pixel_clk0";
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qcom,panel-supply-entry@0 {
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reg = <0>;
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qcom,supply-name = "vddio";
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qcom,supply-min-voltage = <1800000>;
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qcom,supply-max-voltage = <1800000>;
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qcom,supply-enable-load = <62000>;
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qcom,supply-disable-load = <80>;
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qcom,supply-post-on-sleep = <20>;
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};
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pinctrl-names = "panel_active", "panel_suspend";
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pinctrl-0 = <&sde_te_active &disp_pins_default>;
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pinctrl-1 = <&sde_te_suspend>;
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qcom,panel-supply-entry@1 {
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reg = <1>;
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qcom,supply-name = "vdd";
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qcom,supply-min-voltage = <3000000>;
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qcom,supply-max-voltage = <3000000>;
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qcom,supply-enable-load = <857000>;
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qcom,supply-disable-load = <0>;
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qcom,supply-post-on-sleep = <0>;
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};
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qcom,platform-te-gpio = <&tlmm 23 0>;
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qcom,panel-te-source = <0>;
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qcom,panel-supply-entry@2 {
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reg = <2>;
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qcom,supply-name = "lab";
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qcom,supply-min-voltage = <4600000>;
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qcom,supply-max-voltage = <6000000>;
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qcom,supply-enable-load = <0>;
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qcom,supply-disable-load = <0>;
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};
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vddio-supply = <&L1E>;
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vdd-supply = <&L8A>;
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qcom,panel-supply-entry@3 {
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reg = <3>;
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qcom,supply-name = "ibb";
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qcom,supply-min-voltage = <4600000>;
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qcom,supply-max-voltage = <6000000>;
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qcom,supply-enable-load = <0>;
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qcom,supply-disable-load = <0>;
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qcom,supply-post-on-sleep = <20>;
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};
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};
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sde_dsi: qcom,dsi-display-primary {
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compatible = "qcom,dsi-display";
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label = "primary";
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qcom,dsi-ctrl = <&mdss_dsi0>;
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qcom,dsi-phy = <&mdss_dsi_phy0>;
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clocks = <&mdss_dsi_phy0 BYTECLK_MUX_0_CLK>,
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<&mdss_dsi_phy0 PCLK_MUX_0_CLK>,
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<&mdss_dsi_phy0 BYTECLK_SRC_0_CLK>,
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<&mdss_dsi_phy0 PCLK_SRC_0_CLK>,
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<&mdss_dsi_phy0 SHADOW_BYTECLK_SRC_0_CLK>,
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<&mdss_dsi_phy0 SHADOW_PCLK_SRC_0_CLK>;
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clock-names = "mux_byte_clk0", "mux_pixel_clk0",
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"src_byte_clk0", "src_pixel_clk0",
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"shadow_byte_clk0", "shadow_pixel_clk0";
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pinctrl-names = "panel_active", "panel_suspend";
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pinctrl-0 = <&sde_te_active &disp_pins_default>;
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pinctrl-1 = <&sde_te_suspend>;
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qcom,platform-te-gpio = <&tlmm 23 0>;
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qcom,panel-te-source = <0>;
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vddio-supply = <&L1E>;
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vdd-supply = <&L8A>;
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lab-supply = <&ab_vreg>;
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ibb-supply = <&ibb_vreg>;
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qcom,mdp = <&mdss_mdp>;
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qcom,dsi-default-panel = <&dsi_rm69299_visionox_amoled_video>;
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};
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lab-supply = <&ab_vreg>;
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ibb-supply = <&ibb_vreg>;
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};
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&mdss_mdp {
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connectors = <&smmu_sde_unsec &smmu_sde_sec &sde_dsi>;
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};
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&dsi_sim_vid {
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qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
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qcom,mdss-dsi-display-timings {
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timing@0 {
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qcom,mdss-dsi-panel-phy-timings = [01 05 01 01 03 03 01
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01 01 02 04 00 06 06];
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qcom,display-topology = <1 0 1>;
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qcom,default-topology-index = <0>;
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};
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};
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};
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&dsi_rm69299_visionox_amoled_video {
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qcom,esd-check-enabled;
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qcom,mdss-dsi-panel-status-check-mode = "reg_read";
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@ -122,20 +50,6 @@
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qcom,mdss-dsi-panel-status-value = <0x9c>;
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qcom,mdss-dsi-panel-on-check-value = <0x9c>;
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qcom,mdss-dsi-panel-status-read-length = <1>;
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qcom,dsi-supported-dfps-list = <60 55 48>;
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qcom,mdss-dsi-pan-enable-dynamic-fps;
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qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
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qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
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qcom,mdss-dsi-t-clk-post = <0x0E>;
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qcom,mdss-dsi-t-clk-pre = <0x31>;
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qcom,mdss-dsi-display-timings {
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timing@0 {
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qcom,mdss-dsi-panel-phy-timings = [00 20 08 08 24 23 08
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08 05 02 04 00];
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qcom,display-topology = <1 0 1>;
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qcom,default-topology-index = <0>;
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};
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};
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};
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&dsi_rm69299_visionox_amoled_cmd {
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@ -146,17 +60,6 @@
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qcom,mdss-dsi-panel-status-value = <0x9c>;
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qcom,mdss-dsi-panel-on-check-value = <0x9c>;
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qcom,mdss-dsi-panel-status-read-length = <1>;
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qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
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qcom,mdss-dsi-t-clk-post = <0x0E>;
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qcom,mdss-dsi-t-clk-pre = <0x31>;
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qcom,mdss-dsi-display-timings {
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timing@0 {
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qcom,mdss-dsi-panel-phy-timings = [00 20 08 08 24 23 08
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08 05 02 04 00];
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qcom,display-topology = <1 0 1>;
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qcom,default-topology-index = <0>;
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};
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};
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};
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&dsi_r66451_amoled_cmd {
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@ -167,31 +70,6 @@
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qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
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qcom,mdss-dsi-panel-status-value = <0x1c>;
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qcom,mdss-dsi-panel-status-read-length = <1>;
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qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
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qcom,mdss-dsi-t-clk-post = <0x0A>;
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qcom,mdss-dsi-t-clk-pre = <0x1D>;
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qcom,mdss-dsi-display-timings {
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timing@0 {
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qcom,mdss-dsi-panel-phy-timings = [00 10 04 04 1E 1E 04
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04 03 02 04 00];
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qcom,display-topology = <1 1 1>;
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qcom,default-topology-index = <0>;
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};
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timing@1 {
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qcom,mdss-dsi-panel-phy-timings = [00 16 06 05 20 1F 06
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06 06 02 04 00];
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qcom,display-topology = <1 1 1>;
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qcom,default-topology-index = <0>;
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};
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timing@2 {
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qcom,mdss-dsi-panel-phy-timings = [00 1C 08 07 23 22 07
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07 08 02 04 00];
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qcom,display-topology = <1 1 1>;
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qcom,default-topology-index = <0>;
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};
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};
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};
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&dsi_r66451_amoled_video {
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@ -201,16 +79,4 @@
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qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
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qcom,mdss-dsi-panel-status-value = <0x1c>;
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qcom,mdss-dsi-panel-status-read-length = <1>;
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qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
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qcom,mdss-dsi-t-clk-post = <0x0B>;
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qcom,mdss-dsi-t-clk-pre = <0x27>;
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qcom,mdss-dsi-display-timings {
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timing@0 {
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qcom,mdss-dsi-panel-phy-timings = [00 16 06 05 20 1F 06
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06 06 02 04 00];
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qcom,display-topology = <1 1 1>;
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qcom,default-topology-index = <0>;
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};
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};
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};
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