From cd247a1b3ab146b31322ad924e1e33f9ea66adc3 Mon Sep 17 00:00:00 2001 From: Stanley Chu Date: Sat, 7 Dec 2019 20:22:00 +0800 Subject: [PATCH] UPSTREAM: scsi: ufs: disable irq before disabling clocks During suspend flow, interrupt shall be disabled before disabling clocks to avoid potential system hang due to accessing host registers after host clocks are disabled. For example, if an interrupt comes with IRQF_IRQPOLL flag configured with the misrouted interrupt recovery feature enabled, ufshcd ISR may be triggered even if nothing shall be done for UFS. In this case, system hang may happen if UFS interrupt status register is accessed with host clocks disabled. Bug: 149040610 Change-Id: I93ddde3063dc0e9642792247b2e11204233cc49c (cherry picked from commit dcb6cec508277807f57422dc07084e3a78890946) Link: https://lore.kernel.org/r/1575721321-8071-2-git-send-email-stanley.chu@mediatek.com Reviewed-by: Avri Altman Signed-off-by: Stanley Chu Signed-off-by: Martin K. Petersen --- drivers/scsi/ufs/ufshcd.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index 23de4c1cd941..2b362ac027e5 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -7979,6 +7979,11 @@ disable_clks: ret = ufshcd_vops_suspend(hba, pm_op); if (ret) goto set_link_active; + /* + * Disable the host irq as host controller as there won't be any + * host controller transaction expected till resume. + */ + ufshcd_disable_irq(hba); if (!ufshcd_is_link_active(hba)) ufshcd_setup_clocks(hba, false); @@ -7988,11 +7993,7 @@ disable_clks: hba->clk_gating.state = CLKS_OFF; trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state); - /* - * Disable the host irq as host controller as there won't be any - * host controller transaction expected till resume. - */ - ufshcd_disable_irq(hba); + /* Put the host controller in low power mode if possible */ ufshcd_hba_vreg_set_lpm(hba); goto out;