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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Merge branch 'for-linus' of git://www.atmel.no/~hskinnemoen/linux/kernel/avr32
* 'for-linus' of git://www.atmel.no/~hskinnemoen/linux/kernel/avr32: [AVR32] Add missing #include <linux/param.h> to delay.c [AVR32] Pass dev parameter to dma_cache_sync() [AVR32] Implement intc_get_pending() [AVR32] Don't include <asm/delay.h> [AVR32] Put the chip in "stop" mode when halting the system [AVR32] Set flow handler for external interrupts [AVR32] Remove unused file [AVR32] Remove mii_phy_addr and eth_addr from eth_platform_data [AVR32] Move ethernet tag parsing to board-specific code [AVR32] Add macb1 platform_device [AVR32] Portmux API update
This commit is contained in:
commit
cd39301a68
14 changed files with 341 additions and 420 deletions
33
include/asm-avr32/arch-at32ap/at32ap7000.h
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33
include/asm-avr32/arch-at32ap/at32ap7000.h
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@ -0,0 +1,33 @@
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/*
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* Pin definitions for AT32AP7000.
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*
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* Copyright (C) 2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_AT32AP7000_H__
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#define __ASM_ARCH_AT32AP7000_H__
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#define GPIO_PERIPH_A 0
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#define GPIO_PERIPH_B 1
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#define NR_GPIO_CONTROLLERS 4
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/*
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* Pin numbers identifying specific GPIO pins on the chip. They can
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* also be converted to IRQ numbers by passing them through
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* gpio_to_irq().
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*/
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#define GPIO_PIOA_BASE (0)
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#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
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#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
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#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
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#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N))
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#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N))
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#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N))
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#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N))
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#endif /* __ASM_ARCH_AT32AP7000_H__ */
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@ -21,10 +21,7 @@ void at32_map_usart(unsigned int hw_id, unsigned int line);
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struct platform_device *at32_add_device_usart(unsigned int id);
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struct eth_platform_data {
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u8 valid;
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u8 mii_phy_addr;
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u8 is_rmii;
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u8 hw_addr[6];
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};
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struct platform_device *
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at32_add_device_eth(unsigned int id, struct eth_platform_data *data);
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@ -7,10 +7,20 @@
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_AVR32_AT32_PORTMUX_H__
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#define __ASM_AVR32_AT32_PORTMUX_H__
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#ifndef __ASM_ARCH_PORTMUX_H__
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#define __ASM_ARCH_PORTMUX_H__
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void portmux_set_func(unsigned int portmux_id, unsigned int pin_id,
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unsigned int function_id);
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/*
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* Set up pin multiplexing, called from board init only.
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*
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* The following flags determine the initial state of the pin.
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*/
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#define AT32_GPIOF_PULLUP 0x00000001 /* Enable pull-up */
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#define AT32_GPIOF_OUTPUT 0x00000002 /* Enable output driver */
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#define AT32_GPIOF_HIGH 0x00000004 /* Set output high */
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#endif /* __ASM_AVR32_AT32_PORTMUX_H__ */
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void at32_select_periph(unsigned int pin, unsigned int periph,
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unsigned long flags);
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void at32_select_gpio(unsigned int pin, unsigned long flags);
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#endif /* __ASM_ARCH_PORTMUX_H__ */
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@ -109,7 +109,7 @@ static inline dma_addr_t
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dma_map_single(struct device *dev, void *cpu_addr, size_t size,
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enum dma_data_direction direction)
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{
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dma_cache_sync(cpu_addr, size, direction);
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dma_cache_sync(dev, cpu_addr, size, direction);
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return virt_to_bus(cpu_addr);
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}
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@ -211,7 +211,7 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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sg[i].dma_address = page_to_bus(sg[i].page) + sg[i].offset;
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virt = page_address(sg[i].page) + sg[i].offset;
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dma_cache_sync(virt, sg[i].length, direction);
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dma_cache_sync(dev, virt, sg[i].length, direction);
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}
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return nents;
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@ -256,14 +256,14 @@ static inline void
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dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction direction)
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{
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dma_cache_sync(bus_to_virt(dma_handle), size, direction);
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dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction);
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}
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static inline void
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dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction direction)
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{
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dma_cache_sync(bus_to_virt(dma_handle), size, direction);
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dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction);
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}
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/**
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@ -286,7 +286,7 @@ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
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int i;
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for (i = 0; i < nents; i++) {
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dma_cache_sync(page_address(sg[i].page) + sg[i].offset,
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dma_cache_sync(dev, page_address(sg[i].page) + sg[i].offset,
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sg[i].length, direction);
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}
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}
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@ -298,7 +298,7 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
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int i;
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for (i = 0; i < nents; i++) {
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dma_cache_sync(page_address(sg[i].page) + sg[i].offset,
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dma_cache_sync(dev, page_address(sg[i].page) + sg[i].offset,
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sg[i].length, direction);
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}
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}
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