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ARM: dts: qcom: Add HS-I2S device tree support on SA8195

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1. Add device nodes for HS-I2S interface.
2. Correct gpio function in sleep state.

Change-Id: If1c986f64f314c0fb0134dee831236739e4a1d02
This commit is contained in:
Jayadev K 2021-04-29 13:06:51 +05:30
commit cdd5fbc8ea
3 changed files with 103 additions and 2 deletions
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101
qcom/sa8195p.dtsi
View file

@ -29,6 +29,107 @@
read-only;
ranges;
};
hsi2s: qcom,hsi2s {
compatible = "qcom,sa8195-hsi2s", "qcom,hsi2s";
number-of-interfaces = <3>;
reg = <0x172C0000 0x28000>,
<0x17080000 0xE000>;
reg-names = "lpa_if", "lpass_tcsr";
interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
number-of-rate-detectors = <2>;
rate-detector-interfaces = <0 1>;
iommus = <&apps_smmu 0x1B5C 0x1>,
<&apps_smmu 0x1B5E 0x0>;
qcom,iommu-dma-addr-pool = <0x0 0xFFFFFFFF>;
sdr0: qcom,hs0_i2s {
compatible = "qcom,hsi2s-interface";
minor-number = <0>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&hs1_i2s_mclk_active &hs1_i2s_sck_active
&hs1_i2s_ws_active &hs1_i2s_data0_active
&hs1_i2s_data1_active>;
pinctrl-1 = <&hs1_i2s_mclk_sleep &hs1_i2s_sck_sleep
&hs1_i2s_ws_sleep &hs1_i2s_data0_sleep
&hs1_i2s_data1_sleep>;
bit-clock-hz = <12288000>;
data-buffer-ms = <10>;
bit-depth = <32>;
spkr-channel-count = <2>;
mic-channel-count = <2>;
pcm-rate = <2>;
pcm-sync-src = <0>;
aux-mode = <0>;
rpcm-width = <1>;
tpcm-width = <1>;
enable-tdm = <1>;
tdm-rate = <32>;
tdm-rpcm-width = <16>;
tdm-tpcm-width = <16>;
tdm-sync-delay = <2>;
tdm-inv-sync = <0>;
pcm-lane-config = <1>;
};
sdr1: qcom,hs1_i2s {
compatible = "qcom,hsi2s-interface";
minor-number = <1>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&hs2_i2s_mclk_active &hs2_i2s_sck_active
&hs2_i2s_ws_active &hs2_i2s_data0_active
&hs2_i2s_data1_active>;
pinctrl-1 = <&hs2_i2s_mclk_sleep &hs2_i2s_sck_sleep
&hs2_i2s_ws_sleep &hs2_i2s_data0_sleep
&hs2_i2s_data1_sleep>;
bit-clock-hz = <12288000>;
data-buffer-ms = <10>;
bit-depth = <32>;
spkr-channel-count = <2>;
mic-channel-count = <2>;
pcm-rate = <2>;
pcm-sync-src = <0>;
aux-mode = <0>;
rpcm-width = <1>;
tpcm-width = <1>;
enable-tdm = <1>;
tdm-rate = <32>;
tdm-rpcm-width = <16>;
tdm-tpcm-width = <16>;
tdm-sync-delay = <2>;
tdm-inv-sync = <0>;
pcm-lane-config = <1>;
};
sdr2: qcom,hs2_i2s {
compatible = "qcom,hsi2s-interface";
minor-number = <2>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&hs3_i2s_mclk_active &hs3_i2s_sck_active
&hs3_i2s_ws_active &hs3_i2s_data0_active
&hs3_i2s_data1_active>;
pinctrl-1 = <&hs3_i2s_mclk_sleep &hs3_i2s_sck_sleep
&hs3_i2s_ws_sleep &hs3_i2s_data0_sleep
&hs3_i2s_data1_sleep>;
bit-clock-hz = <12288000>;
data-buffer-ms = <10>;
bit-depth = <32>;
spkr-channel-count = <2>;
mic-channel-count = <2>;
pcm-rate = <2>;
pcm-sync-src = <0>;
aux-mode = <0>;
rpcm-width = <1>;
tpcm-width = <1>;
enable-tdm = <1>;
tdm-rate = <32>;
tdm-rpcm-width = <16>;
tdm-tpcm-width = <16>;
tdm-sync-delay = <2>;
tdm-inv-sync = <0>;
pcm-lane-config = <1>;
};
};
};
&scc {

2
qcom/sdmshrike-pinctrl.dtsi
View file

@ -2996,7 +2996,7 @@
hs1_i2s_data0_sleep: hs1_i2s_data0_sleep {
mux {
pins = "gpio158";
function = "sleep";
function = "gpio";
};
config {

2
qcom/sm8150-pinctrl.dtsi
View file

@ -4454,7 +4454,7 @@
hs1_i2s_data0_sleep: hs1_i2s_data0_sleep {
mux {
pins = "gpio158";
function = "sleep";
function = "gpio";
};
config {