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phy: qcom-ufs: add optional ref aux clk
Newer platforms need an additional ref aux clk to be enabled, add support for the new ref aux clk and make it optional as its not needed by other phy versions. Change-Id: I5e04980eb451b193e9c024bfe35383d10d17feff Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> [cang@codeaurora.org: resolved trivial merge conflicts] Signed-off-by: Can Guo <cang@codeaurora.org>
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2 changed files with 33 additions and 0 deletions
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@ -66,6 +66,7 @@ struct ufs_qcom_phy {
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struct clk *ref_clk_src;
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struct clk *ref_clk_parent;
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struct clk *ref_clk;
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struct clk *ref_aux_clk;
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bool is_ref_clk_enabled;
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bool is_dev_ref_clk_enabled;
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struct ufs_qcom_phy_vreg vdda_pll;
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@ -211,7 +211,15 @@ skip_txrx_clk:
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err = ufs_qcom_phy_clk_get(phy_common->dev, "ref_clk",
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&phy_common->ref_clk);
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if (err)
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goto out;
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/*
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* "ref_aux_clk" is optional and only supported by certain
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* phy versions, don't abort init if it's not found.
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*/
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__ufs_qcom_phy_clk_get(phy_common->dev, "ref_aux_clk",
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&phy_common->ref_aux_clk, false);
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out:
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return err;
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}
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@ -389,9 +397,26 @@ static int ufs_qcom_phy_enable_ref_clk(struct ufs_qcom_phy *phy)
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goto out_disable_parent;
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}
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/*
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* "ref_aux_clk" is optional clock and only supported by certain
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* phy versions, hence make sure that clk reference is available
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* before trying to enable the clock.
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*/
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if (phy->ref_aux_clk) {
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ret = clk_prepare_enable(phy->ref_aux_clk);
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if (ret) {
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dev_err(phy->dev, "%s: ref_aux_clk enable failed %d\n",
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__func__, ret);
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goto out_disable_ref;
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}
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}
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phy->is_ref_clk_enabled = true;
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goto out;
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out_disable_ref:
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if (phy->ref_clk)
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clk_disable_unprepare(phy->ref_clk);
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out_disable_parent:
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if (phy->ref_clk_parent)
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clk_disable_unprepare(phy->ref_clk_parent);
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@ -426,6 +451,13 @@ out:
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static void ufs_qcom_phy_disable_ref_clk(struct ufs_qcom_phy *phy)
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{
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if (phy->is_ref_clk_enabled) {
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/*
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* "ref_aux_clk" is optional clock and only supported by
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* certain phy versions, hence make sure that clk reference
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* is available before trying to disable the clock.
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*/
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if (phy->ref_aux_clk)
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clk_disable_unprepare(phy->ref_aux_clk);
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clk_disable_unprepare(phy->ref_clk);
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/*
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* "ref_clk_parent" is optional clock hence make sure that clk
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