From cecd0dc415461328b022991c21ceed8ba01e9cf2 Mon Sep 17 00:00:00 2001
From: Jack Pham <jackp@quicinc.com>
Date: Wed, 29 Jan 2020 15:59:41 -0800
Subject: [PATCH] ARM: dts: msm: Specify address/size cells for &soc on
 lahaina-rumi

When lahaina-rumi is compiled as a separate overlay, it does
not explicitly include the definition of the &soc node. Without
the #address-cells and #size-cells specifiers, the compiler uses
default values of 2 and 1, respectively, which results in the
following warnings when compiling lahaina-rumi-overlay.dtb:

  Warning (reg_format): "reg" property in
/fragment@15/__overlay__/usb_emu_phy@a720000 has invalid length (8
bytes) (#address-cells == 2, #size-cells == 1) Warning
(avoid_default_addr_size): Relying on default #address-cells value for
/fragment@15/__overlay__/usb_emu_phy@a720000
  Warning (avoid_default_addr_size): Relying on default #size-cells
value for /fragment@15/__overlay__/usb_emu_phy@a720000

As the &soc node is referenced here only for the purpose of adding
a new child node, usb_emu_phy, address the warnings by explicitly
defining the {address,size}-cells values.

Change-Id: I8b5ebcd53c060eeea3c55bf9fb8e55093e7862f2
---
 qcom/lahaina-rumi.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/qcom/lahaina-rumi.dtsi b/qcom/lahaina-rumi.dtsi
index 35a5b6e51454..45591677d0f4 100644
--- a/qcom/lahaina-rumi.dtsi
+++ b/qcom/lahaina-rumi.dtsi
@@ -59,6 +59,9 @@
 };
 
 &soc {
+	#address-cells = <1>;
+	#size-cells = <1>;
+
 	usb_emu_phy_0: usb_emu_phy@a720000 {
 		compatible = "qcom,usb-emu-phy";
 		reg = <0x0a720000 0x9500>;