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ARM: SoC driver updates for v4.15
This branch contains platform-related driver updates for ARM and ARM64,
these are the areas that bring the changes:
New drivers:
- Driver support for Renesas R-Car V3M (R8A77970)
- Power management support for Amlogic GX
- A new driver for the Tegra BPMP thermal sensor
- A new bus driver for Technologic Systems NBUS
Changes for subsystems that prefer to merge through arm-soc:
- The usual updates for reset controller drivers from Philipp Zabel,
with five added drivers for SoCs in the arc, meson, socfpa, uniphier
and mediatek families.
- Updates to the ARM SCPI and PSCI frameworks, from Sudeep Holla,
Heiner Kallweit and Lorenzo Pieralisi.
Changes specific to some ARM-based SoC
- The Freescale/NXP DPAA QBMan drivers from PowerPC can now work
on ARM as well.
- Several changes for power management on Broadcom SoCs
- Various improvements on Qualcomm, Broadcom, Amlogic, Atmel, Mediatek
- Minor Cleanups for Samsung, TI OMAP SoCs
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"This branch contains platform-related driver updates for ARM and
ARM64, these are the areas that bring the changes:
New drivers:
- driver support for Renesas R-Car V3M (R8A77970)
- power management support for Amlogic GX
- a new driver for the Tegra BPMP thermal sensor
- a new bus driver for Technologic Systems NBUS
Changes for subsystems that prefer to merge through arm-soc:
- the usual updates for reset controller drivers from Philipp Zabel,
with five added drivers for SoCs in the arc, meson, socfpa,
uniphier and mediatek families
- updates to the ARM SCPI and PSCI frameworks, from Sudeep Holla,
Heiner Kallweit and Lorenzo Pieralisi
Changes specific to some ARM-based SoC
- the Freescale/NXP DPAA QBMan drivers from PowerPC can now work on
ARM as well
- several changes for power management on Broadcom SoCs
- various improvements on Qualcomm, Broadcom, Amlogic, Atmel,
Mediatek
- minor Cleanups for Samsung, TI OMAP SoCs"
[ NOTE! This doesn't work without the previous ARM SoC device-tree pull,
because the R8A77970 driver is missing a header file that came from
that pull.
The fact that this got merged afterwards only fixes it at this point,
and bisection of that driver will fail if/when you walk into the
history of that driver. - Linus ]
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (96 commits)
soc: amlogic: meson-gx-pwrc-vpu: fix power-off when powered by bootloader
bus: add driver for the Technologic Systems NBUS
memory: omap-gpmc: Remove deprecated gpmc_update_nand_reg()
soc: qcom: remove unused label
soc: amlogic: gx pm domain: add PM and OF dependencies
drivers/firmware: psci_checker: Add missing destroy_timer_on_stack()
dt-bindings: power: add amlogic meson power domain bindings
soc: amlogic: add Meson GX VPU Domains driver
soc: qcom: Remote filesystem memory driver
dt-binding: soc: qcom: Add binding for rmtfs memory
of: reserved_mem: Accessor for acquiring reserved_mem
of/platform: Generalize /reserved-memory handling
soc: mediatek: pwrap: fix fatal compiler error
soc: mediatek: pwrap: fix compiler errors
arm64: mediatek: cleanup message for platform selection
soc: Allow test-building of MediaTek drivers
soc: mediatek: place Kconfig for all SoC drivers under menu
soc: mediatek: pwrap: add support for MT7622 SoC
soc: mediatek: pwrap: add common way for setup CS timing extenstion
soc: mediatek: pwrap: add MediaTek MT6380 as one slave of pwrap
..
This commit is contained in:
commit
cf9b0772f2
110 changed files with 6933 additions and 996 deletions
94
include/dt-bindings/reset/mt7622-reset.h
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94
include/dt-bindings/reset/mt7622-reset.h
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/*
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* Copyright (c) 2017 MediaTek Inc.
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* Author: Sean Wang <sean.wang@mediatek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT7622
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#define _DT_BINDINGS_RESET_CONTROLLER_MT7622
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/* INFRACFG resets */
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#define MT7622_INFRA_EMI_REG_RST 0
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#define MT7622_INFRA_DRAMC0_A0_RST 1
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#define MT7622_INFRA_APCIRQ_EINT_RST 3
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#define MT7622_INFRA_APXGPT_RST 4
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#define MT7622_INFRA_SCPSYS_RST 5
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#define MT7622_INFRA_PMIC_WRAP_RST 7
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#define MT7622_INFRA_IRRX_RST 9
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#define MT7622_INFRA_EMI_RST 16
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#define MT7622_INFRA_WED0_RST 17
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#define MT7622_INFRA_DRAMC_RST 18
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#define MT7622_INFRA_CCI_INTF_RST 19
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#define MT7622_INFRA_TRNG_RST 21
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#define MT7622_INFRA_SYSIRQ_RST 22
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#define MT7622_INFRA_WED1_RST 25
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/* PERICFG Subsystem resets */
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#define MT7622_PERI_UART0_SW_RST 0
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#define MT7622_PERI_UART1_SW_RST 1
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#define MT7622_PERI_UART2_SW_RST 2
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#define MT7622_PERI_UART3_SW_RST 3
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#define MT7622_PERI_UART4_SW_RST 4
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#define MT7622_PERI_BTIF_SW_RST 6
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#define MT7622_PERI_PWM_SW_RST 8
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#define MT7622_PERI_AUXADC_SW_RST 10
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#define MT7622_PERI_DMA_SW_RST 11
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#define MT7622_PERI_IRTX_SW_RST 13
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#define MT7622_PERI_NFI_SW_RST 14
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#define MT7622_PERI_THERM_SW_RST 16
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#define MT7622_PERI_MSDC0_SW_RST 19
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#define MT7622_PERI_MSDC1_SW_RST 20
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#define MT7622_PERI_I2C0_SW_RST 22
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#define MT7622_PERI_I2C1_SW_RST 23
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#define MT7622_PERI_I2C2_SW_RST 24
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#define MT7622_PERI_SPI0_SW_RST 33
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#define MT7622_PERI_SPI1_SW_RST 34
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#define MT7622_PERI_FLASHIF_SW_RST 36
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/* TOPRGU resets */
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#define MT7622_TOPRGU_INFRA_RST 0
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#define MT7622_TOPRGU_ETHDMA_RST 1
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#define MT7622_TOPRGU_DDRPHY_RST 6
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#define MT7622_TOPRGU_INFRA_AO_RST 8
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#define MT7622_TOPRGU_CONN_RST 9
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#define MT7622_TOPRGU_APMIXED_RST 10
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#define MT7622_TOPRGU_CONN_MCU_RST 12
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/* PCIe/SATA Subsystem resets */
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#define MT7622_SATA_PHY_REG_RST 12
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#define MT7622_SATA_PHY_SW_RST 13
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#define MT7622_SATA_AXI_BUS_RST 15
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#define MT7622_PCIE1_CORE_RST 19
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#define MT7622_PCIE1_MMIO_RST 20
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#define MT7622_PCIE1_HRST 21
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#define MT7622_PCIE1_USER_RST 22
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#define MT7622_PCIE1_PIPE_RST 23
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#define MT7622_PCIE0_CORE_RST 27
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#define MT7622_PCIE0_MMIO_RST 28
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#define MT7622_PCIE0_HRST 29
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#define MT7622_PCIE0_USER_RST 30
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#define MT7622_PCIE0_PIPE_RST 31
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/* SSUSB Subsystem resets */
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#define MT7622_SSUSB_PHY_PWR_RST 3
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#define MT7622_SSUSB_MAC_PWR_RST 4
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/* ETHSYS Subsystem resets */
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#define MT7622_ETHSYS_SYS_RST 0
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#define MT7622_ETHSYS_MCM_RST 2
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#define MT7622_ETHSYS_HSDMA_RST 5
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#define MT7622_ETHSYS_FE_RST 6
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#define MT7622_ETHSYS_GMAC_RST 23
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#define MT7622_ETHSYS_EPHY_RST 24
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#define MT7622_ETHSYS_CRYPTO_RST 29
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#define MT7622_ETHSYS_PPE_RST 31
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#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT7622 */
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