mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-25 14:13:01 -04:00
Merge master.kernel.org:/home/rmk/linux-2.6-arm
This commit is contained in:
commit
cfa024f4e4
13 changed files with 250 additions and 57 deletions
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@ -80,9 +80,9 @@ __ixp4xx_iounmap(void __iomem *addr)
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#define __arch_ioremap(a, s, f, x) __ixp4xx_ioremap(a, s, f, x)
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#define __arch_iounmap(a) __ixp4xx_iounmap(a)
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#define writeb(p, v) __ixp4xx_writeb(p, v)
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#define writew(p, v) __ixp4xx_writew(p, v)
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#define writel(p, v) __ixp4xx_writel(p, v)
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#define writeb(v, p) __ixp4xx_writeb(v, p)
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#define writew(v, p) __ixp4xx_writew(v, p)
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#define writel(v, p) __ixp4xx_writel(v, p)
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#define writesb(p, v, l) __ixp4xx_writesb(p, v, l)
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#define writesw(p, v, l) __ixp4xx_writesw(p, v, l)
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@ -97,8 +97,9 @@ __ixp4xx_iounmap(void __iomem *addr)
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#define readsl(p, v, l) __ixp4xx_readsl(p, v, l)
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static inline void
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__ixp4xx_writeb(u8 value, u32 addr)
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__ixp4xx_writeb(u8 value, volatile void __iomem *p)
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{
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u32 addr = (u32)p;
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u32 n, byte_enables, data;
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if (addr >= VMALLOC_START) {
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@ -113,15 +114,16 @@ __ixp4xx_writeb(u8 value, u32 addr)
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}
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static inline void
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__ixp4xx_writesb(u32 bus_addr, const u8 *vaddr, int count)
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__ixp4xx_writesb(volatile void __iomem *bus_addr, const u8 *vaddr, int count)
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{
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while (count--)
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writeb(*vaddr++, bus_addr);
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}
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static inline void
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__ixp4xx_writew(u16 value, u32 addr)
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__ixp4xx_writew(u16 value, volatile void __iomem *p)
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{
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u32 addr = (u32)p;
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u32 n, byte_enables, data;
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if (addr >= VMALLOC_START) {
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@ -136,15 +138,16 @@ __ixp4xx_writew(u16 value, u32 addr)
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}
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static inline void
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__ixp4xx_writesw(u32 bus_addr, const u16 *vaddr, int count)
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__ixp4xx_writesw(volatile void __iomem *bus_addr, const u16 *vaddr, int count)
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{
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while (count--)
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writew(*vaddr++, bus_addr);
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}
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static inline void
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__ixp4xx_writel(u32 value, u32 addr)
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__ixp4xx_writel(u32 value, volatile void __iomem *p)
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{
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u32 addr = (u32)p;
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if (addr >= VMALLOC_START) {
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__raw_writel(value, addr);
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return;
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@ -154,15 +157,16 @@ __ixp4xx_writel(u32 value, u32 addr)
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}
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static inline void
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__ixp4xx_writesl(u32 bus_addr, const u32 *vaddr, int count)
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__ixp4xx_writesl(volatile void __iomem *bus_addr, const u32 *vaddr, int count)
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{
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while (count--)
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writel(*vaddr++, bus_addr);
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}
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static inline unsigned char
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__ixp4xx_readb(u32 addr)
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__ixp4xx_readb(const volatile void __iomem *p)
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{
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u32 addr = (u32)p;
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u32 n, byte_enables, data;
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if (addr >= VMALLOC_START)
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@ -177,15 +181,16 @@ __ixp4xx_readb(u32 addr)
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}
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static inline void
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__ixp4xx_readsb(u32 bus_addr, u8 *vaddr, u32 count)
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__ixp4xx_readsb(const volatile void __iomem *bus_addr, u8 *vaddr, u32 count)
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{
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while (count--)
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*vaddr++ = readb(bus_addr);
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}
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static inline unsigned short
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__ixp4xx_readw(u32 addr)
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__ixp4xx_readw(const volatile void __iomem *p)
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{
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u32 addr = (u32)p;
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u32 n, byte_enables, data;
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if (addr >= VMALLOC_START)
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@ -200,15 +205,16 @@ __ixp4xx_readw(u32 addr)
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}
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static inline void
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__ixp4xx_readsw(u32 bus_addr, u16 *vaddr, u32 count)
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__ixp4xx_readsw(const volatile void __iomem *bus_addr, u16 *vaddr, u32 count)
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{
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while (count--)
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*vaddr++ = readw(bus_addr);
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}
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static inline unsigned long
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__ixp4xx_readl(u32 addr)
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__ixp4xx_readl(const volatile void __iomem *p)
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{
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u32 addr = (u32)p;
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u32 data;
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if (addr >= VMALLOC_START)
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@ -221,7 +227,7 @@ __ixp4xx_readl(u32 addr)
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}
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static inline void
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__ixp4xx_readsl(u32 bus_addr, u32 *vaddr, u32 count)
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__ixp4xx_readsl(const volatile void __iomem *bus_addr, u32 *vaddr, u32 count)
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{
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while (count--)
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*vaddr++ = readl(bus_addr);
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@ -239,7 +245,7 @@ __ixp4xx_readsl(u32 bus_addr, u32 *vaddr, u32 count)
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eth_copy_and_sum((s),__mem_pci(c),(l),(b))
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static inline int
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check_signature(unsigned long bus_addr, const unsigned char *signature,
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check_signature(const unsigned char __iomem *bus_addr, const unsigned char *signature,
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int length)
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{
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int retval = 0;
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@ -389,7 +395,7 @@ __ixp4xx_insl(u32 io_addr, u32 *vaddr, u32 count)
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#define __is_io_address(p) (((unsigned long)p >= PIO_OFFSET) && \
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((unsigned long)p <= (PIO_MASK + PIO_OFFSET)))
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static inline unsigned int
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__ixp4xx_ioread8(void __iomem *addr)
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__ixp4xx_ioread8(const void __iomem *addr)
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{
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unsigned long port = (unsigned long __force)addr;
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if (__is_io_address(port))
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@ -398,12 +404,12 @@ __ixp4xx_ioread8(void __iomem *addr)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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return (unsigned int)__raw_readb(port);
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#else
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return (unsigned int)__ixp4xx_readb(port);
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return (unsigned int)__ixp4xx_readb(addr);
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#endif
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}
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static inline void
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__ixp4xx_ioread8_rep(void __iomem *addr, void *vaddr, u32 count)
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__ixp4xx_ioread8_rep(const void __iomem *addr, void *vaddr, u32 count)
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{
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unsigned long port = (unsigned long __force)addr;
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if (__is_io_address(port))
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@ -412,12 +418,12 @@ __ixp4xx_ioread8_rep(void __iomem *addr, void *vaddr, u32 count)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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__raw_readsb(addr, vaddr, count);
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#else
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__ixp4xx_readsb(port, vaddr, count);
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__ixp4xx_readsb(addr, vaddr, count);
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#endif
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}
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static inline unsigned int
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__ixp4xx_ioread16(void __iomem *addr)
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__ixp4xx_ioread16(const void __iomem *addr)
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{
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unsigned long port = (unsigned long __force)addr;
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if (__is_io_address(port))
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@ -426,12 +432,12 @@ __ixp4xx_ioread16(void __iomem *addr)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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return le16_to_cpu(__raw_readw((u32)port));
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#else
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return (unsigned int)__ixp4xx_readw((u32)port);
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return (unsigned int)__ixp4xx_readw(addr);
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#endif
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}
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static inline void
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__ixp4xx_ioread16_rep(void __iomem *addr, void *vaddr, u32 count)
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__ixp4xx_ioread16_rep(const void __iomem *addr, void *vaddr, u32 count)
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{
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unsigned long port = (unsigned long __force)addr;
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if (__is_io_address(port))
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@ -440,12 +446,12 @@ __ixp4xx_ioread16_rep(void __iomem *addr, void *vaddr, u32 count)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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__raw_readsw(addr, vaddr, count);
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#else
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__ixp4xx_readsw(port, vaddr, count);
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__ixp4xx_readsw(addr, vaddr, count);
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#endif
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}
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static inline unsigned int
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__ixp4xx_ioread32(void __iomem *addr)
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__ixp4xx_ioread32(const void __iomem *addr)
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{
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unsigned long port = (unsigned long __force)addr;
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if (__is_io_address(port))
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@ -454,13 +460,13 @@ __ixp4xx_ioread32(void __iomem *addr)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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return le32_to_cpu(__raw_readl((u32)port));
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#else
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return (unsigned int)__ixp4xx_readl((u32)port);
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return (unsigned int)__ixp4xx_readl(addr);
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#endif
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}
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}
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static inline void
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__ixp4xx_ioread32_rep(void __iomem *addr, void *vaddr, u32 count)
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__ixp4xx_ioread32_rep(const void __iomem *addr, void *vaddr, u32 count)
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{
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unsigned long port = (unsigned long __force)addr;
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if (__is_io_address(port))
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@ -469,7 +475,7 @@ __ixp4xx_ioread32_rep(void __iomem *addr, void *vaddr, u32 count)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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__raw_readsl(addr, vaddr, count);
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#else
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__ixp4xx_readsl(port, vaddr, count);
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__ixp4xx_readsl(addr, vaddr, count);
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#endif
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}
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@ -483,7 +489,7 @@ __ixp4xx_iowrite8(u8 value, void __iomem *addr)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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__raw_writeb(value, port);
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#else
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__ixp4xx_writeb(value, port);
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__ixp4xx_writeb(value, addr);
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#endif
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}
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@ -497,7 +503,7 @@ __ixp4xx_iowrite8_rep(void __iomem *addr, const void *vaddr, u32 count)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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__raw_writesb(addr, vaddr, count);
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#else
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__ixp4xx_writesb(port, vaddr, count);
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__ixp4xx_writesb(addr, vaddr, count);
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#endif
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}
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@ -511,7 +517,7 @@ __ixp4xx_iowrite16(u16 value, void __iomem *addr)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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__raw_writew(cpu_to_le16(value), addr);
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#else
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__ixp4xx_writew(value, port);
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__ixp4xx_writew(value, addr);
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#endif
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}
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@ -525,7 +531,7 @@ __ixp4xx_iowrite16_rep(void __iomem *addr, const void *vaddr, u32 count)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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__raw_writesw(addr, vaddr, count);
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#else
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__ixp4xx_writesw(port, vaddr, count);
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__ixp4xx_writesw(addr, vaddr, count);
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#endif
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}
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@ -539,7 +545,7 @@ __ixp4xx_iowrite32(u32 value, void __iomem *addr)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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__raw_writel(cpu_to_le32(value), port);
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#else
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__ixp4xx_writel(value, port);
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__ixp4xx_writel(value, addr);
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#endif
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}
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@ -553,7 +559,7 @@ __ixp4xx_iowrite32_rep(void __iomem *addr, const void *vaddr, u32 count)
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#ifndef CONFIG_IXP4XX_INDIRECT_PCI
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__raw_writesl(addr, vaddr, count);
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#else
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__ixp4xx_writesl(port, vaddr, count);
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__ixp4xx_writesl(addr, vaddr, count);
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#endif
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}
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@ -23,7 +23,7 @@
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/*
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* Physical DRAM offset.
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*/
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#define PHYS_OFFSET (0x00000000UL)
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#define PHYS_OFFSET UL(0x00000000)
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/*
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* Virtual view <-> DMA view memory address translations
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@ -16,6 +16,7 @@
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struct cpuinfo_arm {
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struct cpu cpu;
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#ifdef CONFIG_SMP
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struct task_struct *idle;
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unsigned int loops_per_jiffy;
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#endif
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};
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@ -47,5 +47,6 @@ struct irqaction;
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struct pt_regs;
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int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *);
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extern void migrate_irqs(void);
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#endif
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@ -66,4 +66,14 @@ struct secondary_data {
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};
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extern struct secondary_data secondary_data;
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extern int __cpu_disable(void);
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extern int mach_cpu_disable(unsigned int cpu);
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extern void __cpu_die(unsigned int cpu);
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extern void cpu_die(void);
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extern void platform_cpu_die(unsigned int cpu);
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extern int platform_cpu_kill(unsigned int cpu);
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extern void platform_cpu_enable(unsigned int cpu);
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#endif /* ifndef __ASM_ARM_SMP_H */
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@ -80,7 +80,7 @@ static inline void __raw_spin_unlock(raw_spinlock_t *lock)
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*/
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#define rwlock_is_locked(x) (*((volatile unsigned int *)(x)) != 0)
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static inline void __raw_write_lock(rwlock_t *rw)
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static inline void __raw_write_lock(raw_rwlock_t *rw)
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{
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unsigned long tmp;
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@ -97,7 +97,7 @@ static inline void __raw_write_lock(rwlock_t *rw)
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smp_mb();
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}
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static inline int __raw_write_trylock(rwlock_t *rw)
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static inline int __raw_write_trylock(raw_rwlock_t *rw)
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{
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unsigned long tmp;
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@ -157,7 +157,7 @@ static inline void __raw_read_lock(raw_rwlock_t *rw)
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smp_mb();
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}
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static inline void __raw_read_unlock(rwlock_t *rw)
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static inline void __raw_read_unlock(raw_rwlock_t *rw)
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{
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unsigned long tmp, tmp2;
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