diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
index 8a1451a93ea1..4fce62a76d0f 100644
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -601,6 +601,13 @@ int qcom_mdf_assign_memory_to_subsys(u64 start_addr, u64 end_addr,
 }
 EXPORT_SYMBOL(qcom_mdf_assign_memory_to_subsys);
 
+int qcom_scm_get_feat_version_cp(u64 *version)
+{
+	return __qcom_scm_get_feat_version(__scm->dev, QCOM_SCM_MP_CP_FEAT_ID,
+						version);
+}
+EXPORT_SYMBOL(qcom_scm_get_feat_version_cp);
+
 /**
  * qcom_scm_dcvs_core_available() - check if core DCVS operations are available
  */
diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h
index 3608bb27f84b..ddf022702836 100644
--- a/drivers/firmware/qcom_scm.h
+++ b/drivers/firmware/qcom_scm.h
@@ -62,6 +62,7 @@ extern int __qcom_scm_is_call_available(struct device *dev, u32 svc_id,
 extern int __qcom_scm_get_feat_version(struct device *dev, u64 feat_id,
 					u64 *version);
 #define QCOM_SCM_TZ_DBG_ETM_FEAT_ID		0x08
+#define QCOM_SCM_MP_CP_FEAT_ID			0x0c
 
 #define QCOM_SCM_SVC_PWR			0x09
 #define QCOM_SCM_PWR_MMU_SYNC			0x08
diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig
index 288f8d33d01d..73a33eafceb6 100644
--- a/drivers/soc/qcom/Kconfig
+++ b/drivers/soc/qcom/Kconfig
@@ -380,7 +380,7 @@ config QCOM_SECURE_CHAN_MANAGER
 
 config QCOM_SECURE_BUFFER
 	tristate "Helper functions for secure buffers through TZ"
-	depends on QCOM_SECURE_CHAN_MANAGER
+	depends on QCOM_SCM
 	help
 	  Enable for targets that need to call into TZ to secure
 	  memory buffers. This ensures that only the correct clients can
diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h
index 5eb2c7be417f..5be160ea3a8e 100644
--- a/include/linux/qcom_scm.h
+++ b/include/linux/qcom_scm.h
@@ -116,6 +116,7 @@ extern int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
 			       unsigned int dest_cnt);
 extern int qcom_scm_mem_protect_sd_ctrl(u32 devid, phys_addr_t mem_addr,
 					u64 mem_size, u32 vmid);
+extern int qcom_scm_get_feat_version_cp(u64 *version);
 extern bool qcom_scm_kgsl_set_smmu_aperture_available(void);
 extern int qcom_scm_kgsl_set_smmu_aperture(
 				unsigned int num_context_bank);
@@ -246,6 +247,8 @@ static inline int qcom_scm_smmu_prepare_atos_id(u64 dev_id, int cb_num,
 static inline int qcom_mdf_assign_memory_to_subsys(struct device *dev,
 		u64 start_addr, u64 end_addr, phys_addr_t paddr, u64 size)
 		{ return -ENODEV; }
+static inline int qcom_scm_get_feat_version_cp(u64 *version)
+		{ return -ENODEV; }
 static inline bool qcom_scm_dcvs_core_available(void) { return false; }
 static inline bool qcom_scm_dcvs_ca_available(void) { return false; }
 static inline int qcom_scm_dcvs_init_v2(phys_addr_t addr, size_t size,