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Merge "bindings: clock: Add support for SHIMA clock controllers"
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commit
d1069f73af
6 changed files with 8 additions and 3 deletions
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@ -2,7 +2,8 @@ Qualcomm Technologies, Inc. Camera Clock & Reset Controller Binding
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-------------------------------------------------------------------
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Required properties :
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- compatible : shall contain "qcom,sdm845-camcc" or "qcom,lahaina-camcc".
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- compatible : shall contain "qcom,sdm845-camcc" or "qcom,lahaina-camcc",
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"qcom,shima-camcc".
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- reg : shall contain base register location and length.
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- reg-names: names of registers listed in the same order as in
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the reg property.
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@ -2,7 +2,7 @@ Qualcomm Technologies, Inc. Debug Clock Controller Binding
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----------------------------------------------------------
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Required properties :
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- compatible: Shall contain "qcom,lahaina-debugcc".
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- compatible: Shall contain "qcom,lahaina-debugcc" or "qcom,shima-debugcc".
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- qcom,gcc: phandle to the GCC device node.
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- qcom,videocc: phandle to the Video CC device node.
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- qcom,camcc: phandle to the Camera CC device node.
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@ -7,6 +7,7 @@ Required properties :
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"qcom,sdm845-dispcc"
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"qcom,lahaina-dispcc"
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"qcom,shima-dispcc"
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- reg : shall contain base register location and length.
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- #clock-cells : from common clock binding, shall contain 1.
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@ -28,6 +28,7 @@ Required properties :
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"qcom,gcc-sm8150-v2"
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"qcom,gcc-sa8155"
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"qcom,gcc-sa8155-v2"
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"qcom,shima-gcc"
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- reg : shall contain base register location and length
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@ -3,7 +3,8 @@ Qualcomm Technologies, Inc. Graphics Clock & Reset Controller Binding
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Required properties :
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- compatible : shall contain "qcom,sdm845-gpucc" or "qcom,msm8998-gpucc",
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"qcom,lahaina-gpucc.
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"qcom,lahaina-gpucc",
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"qcom,shima-gpucc".
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- reg: shall contain base register offset and size.
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- reg-names: names of registers listed in the same order as in the reg property.
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Must contain "cc_base".
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@ -6,6 +6,7 @@ Required properties :
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"qcom,sdm845-videocc"
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"qcom,lahaina-videocc"
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"qcom,shima-videocc"
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- reg : shall contain base register location and length
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- #clock-cells : from common clock binding, shall contain 1.
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