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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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dma-mapping: add i/o coherency support for 32bit
Add the I/O coherency support for devices that can issue a cache coherent transactions. Change-Id: I01b1dca4d72395df41ac5b882dcd3fd75a682b8c Signed-off-by: Charan Teja Reddy <charante@codeaurora.org> Signed-off-by: Vishwanath Raju K <vishk@codeaurora.org> Signed-off-by: Qingqing Zhou <qqzhou@codeaurora.org>
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parent
cce1d3c648
commit
d18971d0d4
1 changed files with 72 additions and 27 deletions
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@ -111,6 +111,30 @@ static void __dma_page_cpu_to_dev(struct page *, unsigned long,
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static void __dma_page_dev_to_cpu(struct page *, unsigned long,
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size_t, enum dma_data_direction);
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static inline pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot,
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bool coherent);
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static pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot,
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bool coherent)
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{
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if (!coherent || (attrs & DMA_ATTR_WRITE_COMBINE))
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return pgprot_writecombine(prot);
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return prot;
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}
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static bool is_dma_coherent(struct device *dev, unsigned long attrs,
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bool is_coherent)
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{
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if (attrs & DMA_ATTR_FORCE_COHERENT)
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is_coherent = true;
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else if (attrs & DMA_ATTR_FORCE_NON_COHERENT)
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is_coherent = false;
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else if (dev->archdata.dma_coherent)
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is_coherent = true;
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return is_coherent;
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}
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/**
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* arm_dma_map_page - map a portion of a page for streaming DMA
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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@ -603,17 +627,6 @@ static void __free_from_contiguous(struct device *dev, struct page *page,
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dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
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}
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static inline pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot)
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{
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if (attrs & DMA_ATTR_WRITE_COMBINE)
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prot = pgprot_writecombine(prot);
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/* if non-consistent just pass back what was given */
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else if ((attrs & DMA_ATTR_NON_CONSISTENT) == 0)
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prot = pgprot_dmacoherent(prot);
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return prot;
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}
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static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
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struct page **ret_page)
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{
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@ -788,7 +801,7 @@ static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
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void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
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gfp_t gfp, unsigned long attrs)
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{
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pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
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pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL, false);
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return __dma_alloc(dev, size, handle, gfp, prot, false,
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attrs, __builtin_return_address(0));
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@ -838,7 +851,8 @@ int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs)
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{
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vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
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vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot,
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false);
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return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
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}
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@ -1365,16 +1379,18 @@ static int __iommu_free_buffer(struct device *dev, struct page **pages,
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*/
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static dma_addr_t
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__iommu_create_mapping(struct device *dev, struct page **pages, size_t size,
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unsigned long attrs)
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int coherent_flag)
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{
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struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
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unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
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dma_addr_t dma_addr, iova;
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int i;
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int prot = IOMMU_READ | IOMMU_WRITE;
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dma_addr = __alloc_iova(mapping, size);
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if (dma_addr == DMA_MAPPING_ERROR)
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return dma_addr;
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prot |= coherent_flag ? IOMMU_CACHE : 0;
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iova = dma_addr;
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for (i = 0; i < count; ) {
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@ -1389,8 +1405,7 @@ __iommu_create_mapping(struct device *dev, struct page **pages, size_t size,
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break;
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len = (j - i) << PAGE_SHIFT;
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ret = iommu_map(mapping->domain, iova, phys, len,
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__dma_info_to_prot(DMA_BIDIRECTIONAL, attrs));
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ret = iommu_map(mapping->domain, iova, phys, len, prot);
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if (ret < 0)
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goto fail;
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iova += len;
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@ -1455,7 +1470,7 @@ static void *__iommu_alloc_simple(struct device *dev, size_t size, gfp_t gfp,
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if (!addr)
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return NULL;
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*handle = __iommu_create_mapping(dev, &page, size, attrs);
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*handle = __iommu_create_mapping(dev, &page, size, coherent_flag);
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if (*handle == DMA_MAPPING_ERROR)
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goto err_mapping;
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@ -1480,17 +1495,19 @@ static void *__arm_iommu_alloc_attrs(struct device *dev, size_t size,
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dma_addr_t *handle, gfp_t gfp, unsigned long attrs,
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int coherent_flag)
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{
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pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
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struct page **pages;
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void *addr = NULL;
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pgprot_t prot;
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*handle = DMA_MAPPING_ERROR;
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size = PAGE_ALIGN(size);
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if (coherent_flag == COHERENT || !gfpflags_allow_blocking(gfp))
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if (coherent_flag == COHERENT || !gfpflags_allow_blocking(gfp))
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return __iommu_alloc_simple(dev, size, gfp, handle,
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coherent_flag, attrs);
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coherent_flag = is_dma_coherent(dev, attrs, coherent_flag);
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prot = __get_dma_pgprot(attrs, PAGE_KERNEL, coherent_flag);
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/*
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* Following is a work-around (a.k.a. hack) to prevent pages
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* with __GFP_COMP being passed to split_page() which cannot
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@ -1504,7 +1521,7 @@ static void *__arm_iommu_alloc_attrs(struct device *dev, size_t size,
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if (!pages)
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return NULL;
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*handle = __iommu_create_mapping(dev, pages, size, attrs);
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*handle = __iommu_create_mapping(dev, pages, size, coherent_flag);
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if (*handle == DMA_MAPPING_ERROR)
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goto err_buffer;
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@ -1561,7 +1578,8 @@ static int arm_iommu_mmap_attrs(struct device *dev,
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struct vm_area_struct *vma, void *cpu_addr,
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dma_addr_t dma_addr, size_t size, unsigned long attrs)
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{
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vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
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vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot,
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is_dma_coherent(dev, attrs, NORMAL));
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return __arm_iommu_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, attrs);
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}
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@ -1604,7 +1622,8 @@ void __arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
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void arm_iommu_free_attrs(struct device *dev, size_t size,
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void *cpu_addr, dma_addr_t handle, unsigned long attrs)
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{
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__arm_iommu_free_attrs(dev, size, cpu_addr, handle, attrs, NORMAL);
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__arm_iommu_free_attrs(dev, size, cpu_addr, handle, attrs,
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is_dma_coherent(dev, attrs, NORMAL));
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}
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void arm_coherent_iommu_free_attrs(struct device *dev, size_t size,
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@ -1759,11 +1778,18 @@ int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
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unsigned int total_length = 0, current_offset = 0;
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dma_addr_t iova;
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int prot = __dma_info_to_prot(dir, attrs);
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bool coherent;
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for_each_sg(sg, s, nents, i)
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total_length += s->length;
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iova = __alloc_iova(mapping, total_length);
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if (iova == DMA_MAPPING_ERROR)
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return 0;
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coherent = of_dma_is_coherent(dev->of_node);
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prot |= is_dma_coherent(dev, attrs, coherent) ? IOMMU_CACHE : 0;
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ret = iommu_map_sg(mapping->domain, iova, sg, nents, prot);
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if (ret != total_length) {
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__free_iova(mapping, iova, total_length);
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@ -1853,6 +1879,12 @@ void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
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{
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struct scatterlist *s;
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int i;
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struct dma_iommu_mapping *mapping = dev->archdata.mapping;
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dma_addr_t iova = sg_dma_address(sg);
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bool iova_coherent = iommu_is_iova_coherent(mapping->domain, iova);
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if (iova_coherent)
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return;
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for_each_sg(sg, s, nents, i)
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__dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
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@ -1872,6 +1904,13 @@ void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
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struct scatterlist *s;
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int i;
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struct dma_iommu_mapping *mapping = dev->archdata.mapping;
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dma_addr_t iova = sg_dma_address(sg);
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bool iova_coherent = iommu_is_iova_coherent(mapping->domain, iova);
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if (iova_coherent)
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return;
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for_each_sg(sg, s, nents, i)
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__dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
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}
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@ -1930,7 +1969,8 @@ static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size, enum dma_data_direction dir,
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unsigned long attrs)
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{
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if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
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if (!is_dma_coherent(dev, attrs, false) &&
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!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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__dma_page_cpu_to_dev(page, offset, size, dir);
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return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);
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@ -1978,7 +2018,8 @@ static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
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if (!iova)
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return;
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if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
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if (!(is_dma_coherent(dev, attrs, false) ||
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(attrs & DMA_ATTR_SKIP_CPU_SYNC)))
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__dma_page_dev_to_cpu(page, offset, size, dir);
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iommu_unmap(mapping->domain, iova, len);
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@ -2049,8 +2090,10 @@ static void arm_iommu_sync_single_for_cpu(struct device *dev,
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dma_addr_t iova = handle & PAGE_MASK;
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struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
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unsigned int offset = handle & ~PAGE_MASK;
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bool iova_coherent = iommu_is_iova_coherent(mapping->domain, handle);
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__dma_page_dev_to_cpu(page, offset, size, dir);
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if (!iova_coherent)
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__dma_page_dev_to_cpu(page, offset, size, dir);
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}
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static void arm_iommu_sync_single_for_device(struct device *dev,
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@ -2060,8 +2103,10 @@ static void arm_iommu_sync_single_for_device(struct device *dev,
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dma_addr_t iova = handle & PAGE_MASK;
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struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
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unsigned int offset = handle & ~PAGE_MASK;
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bool iova_coherent = iommu_is_iova_coherent(mapping->domain, handle);
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__dma_page_cpu_to_dev(page, offset, size, dir);
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if (!iova_coherent)
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__dma_page_cpu_to_dev(page, offset, size, dir);
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}
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const struct dma_map_ops iommu_ops = {
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@ -2586,7 +2631,7 @@ void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t gfp, unsigned long attrs)
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{
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return __dma_alloc(dev, size, dma_handle, gfp,
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__get_dma_pgprot(attrs, PAGE_KERNEL), false,
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__get_dma_pgprot(attrs, PAGE_KERNEL, false), false,
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attrs, __builtin_return_address(0));
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}
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