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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Merge "scsi: ufs-qcom: Configure LPM timer settings"
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commit
d1f345796a
2 changed files with 28 additions and 0 deletions
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@ -6,6 +6,7 @@
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#include <linux/acpi.h>
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#include <linux/time.h>
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#include <linux/of.h>
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#include <linux/bitfield.h>
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#include <linux/platform_device.h>
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#include <linux/phy/phy.h>
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#include <linux/gpio/consumer.h>
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@ -1486,8 +1487,19 @@ out:
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static int ufs_qcom_apply_dev_quirks(struct ufs_hba *hba)
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{
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unsigned long flags;
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int err = 0;
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spin_lock_irqsave(hba->host->host_lock, flags);
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/* Set the rpm auto suspend delay to 3s */
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hba->host->hostt->rpm_autosuspend_delay = UFS_QCOM_AUTO_SUSPEND_DELAY;
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/* Set the default auto-hiberate idle timer value to 1ms */
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hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 1) |
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FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
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/* Set the clock gating delay to performance mode */
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hba->clk_gating.delay_ms = UFS_QCOM_CLK_GATING_DELAY_MS_PERF;
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spin_unlock_irqrestore(hba->host->host_lock, flags);
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if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME)
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err = ufs_qcom_quirk_host_pa_saveconfigtime(hba);
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@ -2352,6 +2364,12 @@ out:
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static int ufs_qcom_clk_scale_up_post_change(struct ufs_hba *hba)
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{
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unsigned long flags;
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spin_lock_irqsave(hba->host->host_lock, flags);
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hba->clk_gating.delay_ms = UFS_QCOM_CLK_GATING_DELAY_MS_PERF;
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spin_unlock_irqrestore(hba->host->host_lock, flags);
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return 0;
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}
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@ -2388,6 +2406,11 @@ static int ufs_qcom_clk_scale_down_post_change(struct ufs_hba *hba)
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struct ufs_clk_info *clki;
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struct list_head *head = &hba->clk_list_head;
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u32 curr_freq = 0;
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unsigned long flags;
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spin_lock_irqsave(hba->host->host_lock, flags);
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hba->clk_gating.delay_ms = UFS_QCOM_CLK_GATING_DELAY_MS_PWR_SAVE;
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spin_unlock_irqrestore(hba->host->host_lock, flags);
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if (!ufs_qcom_cap_qunipro(host))
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return 0;
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@ -52,6 +52,11 @@
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#define UFS_QCOM_LIMIT_DESIRED_MODE FAST
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#define UFS_QCOM_LIMIT_PHY_SUBMODE UFS_QCOM_PHY_SUBMODE_G4
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/* default value of auto suspend is 3 seconds */
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#define UFS_QCOM_AUTO_SUSPEND_DELAY 3000
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#define UFS_QCOM_CLK_GATING_DELAY_MS_PWR_SAVE 10
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#define UFS_QCOM_CLK_GATING_DELAY_MS_PERF 50
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/* QCOM UFS host controller vendor specific registers */
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enum {
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REG_UFS_SYS1CLK_1US = 0xC0,
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