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watchdog: aspeed: Fix translation of reset mode to ctrl register
Assert RESET_SYSTEM bit for any reset and set MODE field from reset
type.
The watchdog control register has a RESET_SYSTEM bit that is really
closer to activate a reset, and RESET_SYSTEM_MODE field that chooses
how much to reset.
Before this patch, a node without these optional property would do a
SOC reset, but a node with properties requesting a cpu or SOC reset
would do nothing and a node requesting a system reset would do a
SOC reset.
Fixes: b7f0b8ad25 ("drivers/watchdog: ASPEED reference dev tree properties for config")
Signed-off-by: Milton Miller <[email protected]>
Signed-off-by: Eddie James <[email protected]>
Reviewed-by: Guenter Roeck <[email protected]>
Signed-off-by: Guenter Roeck <[email protected]>
Signed-off-by: Wim Van Sebroeck <[email protected]>
This commit is contained in:
parent
977f6f6833
commit
d2fc8db691
1 changed files with 6 additions and 3 deletions
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@ -232,11 +232,14 @@ static int aspeed_wdt_probe(struct platform_device *pdev)
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wdt->ctrl |= WDT_CTRL_RESET_MODE_SOC | WDT_CTRL_RESET_SYSTEM;
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} else {
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if (!strcmp(reset_type, "cpu"))
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wdt->ctrl |= WDT_CTRL_RESET_MODE_ARM_CPU;
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wdt->ctrl |= WDT_CTRL_RESET_MODE_ARM_CPU |
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WDT_CTRL_RESET_SYSTEM;
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else if (!strcmp(reset_type, "soc"))
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wdt->ctrl |= WDT_CTRL_RESET_MODE_SOC;
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wdt->ctrl |= WDT_CTRL_RESET_MODE_SOC |
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WDT_CTRL_RESET_SYSTEM;
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else if (!strcmp(reset_type, "system"))
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wdt->ctrl |= WDT_CTRL_RESET_SYSTEM;
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wdt->ctrl |= WDT_CTRL_RESET_MODE_FULL_CHIP |
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WDT_CTRL_RESET_SYSTEM;
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else if (strcmp(reset_type, "none"))
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return -EINVAL;
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}
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