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Force Trustonic TEE schedule run in Silver cores.

Browse source 
Cherry-picked from (CR)
Probably on the Gold Core, Athene is not applicable to the nq
handler when Trustonic TEE sheduler is being called. As per the
test results, device will be hung if the tbase is working on e.g
core#6 which belongs to QC Kryto Gold core. workaround to bind
the TEE scheduler with CPU core #0, #1, #2, and #3.

Included logic to select silver CPU and clock mode based on device config:
- RSU_SELECT_SILVER_CORES is set to force Trustonic TEE schedule
run in Silver cores.

- RSU_INTERNAL_CLOCK is set for platforms that use internal clock for
qcom_seecom. Example: In lagoon.dtsi, node
"qcom_seecom: qseecom@c1700000" has entry "qcom,no-clock-support;"

Change-Id: I7d767d42070fbbbd26859ce1a9dca8ead0664dd6
Reviewed-on: https://gerrit.mot.com/1765894
SLTApproved: Slta Waiver
SME-Granted: SME Approvals Granted
Tested-by: Jira Key
Reviewed-by: Igor Kovalenko <igork@motorola.com>
Submit-Approved: Jira Key
This commit is contained in:
quebs2 2020-09-08 15:54:29 +08:00 • committed by Jefferson Rodrigo Capovilla
commit d35baa02e7
3 changed files with 30 additions and 4 deletions
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6
drivers/gud/MobiCoreDriver/Android.mk
View file

@ -5,4 +5,10 @@ include $(CLEAR_VARS)
LOCAL_MODULE := mcDrvModule.ko
LOCAL_MODULE_TAGS := optional
LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT)
ifeq ($(RSU_SELECT_SILVER_CORES), true)
KERNEL_CFLAGS += RSU_SELECT_SILVER_CORES=y
endif
ifeq ($(RSU_SELECT_INTERNAL_CLOCK), true)
KERNEL_CFLAGS += RSU_INTERNAL_CLOCK=y
endif
include $(DLKM_DIR)/AndroidKernelModule.mk

8
drivers/gud/MobiCoreDriver/Kbuild
View file

@ -22,6 +22,14 @@ EXTRA_CFLAGS += -DNDEBUG
EXTRA_CFLAGS += -Wno-declaration-after-statement
EXTRA_CFLAGS += -I$(TOP)/motorola/kernel/modules/drivers/gud/MobiCoreDriver
ifneq ($(filter m y,$(RSU_SELECT_SILVER_CORES)),)
EXTRA_CFLAGS += -DRSU_SELECT_SILVER_CORES
endif
ifneq ($(filter m y,$(RSU_INTERNAL_CLOCK)),)
EXTRA_CFLAGS += -DRSU_INTERNAL_CLOCK
endif
obj-m += mcDrvModule.o

20
drivers/gud/MobiCoreDriver/platform.h
View file

@ -115,9 +115,11 @@ static inline int smc_fastcall(void *fc_generic, size_t size)
* "core_clk"
* "iface_clk"
*/
#ifndef RSU_INTERNAL_CLOCK
#define MC_CRYPTO_CLOCK_MANAGEMENT
#endif
/*
* This should be defined only on SDM845
* This should be defined only on platforms without ICE clock e.g SDM845, SM6150, SM7225
* #define TT_CRYPTO_NO_CLOCK_SUPPORT_FEATURE "qcom,no-clock-support"
*/
#define MC_CRYPTO_CLOCK_CORESRC_PROPNAME "qcom,ce-opp-freq"
@ -140,10 +142,19 @@ static inline int smc_fastcall(void *fc_generic, size_t size)
/* All TZBSPv4 targets are using AARCH32_FC flag */
#define MC_AARCH32_FC
/* This should be defined only on SM8150
* Gold cores do not support TEE interfaces
* CPU_IDS should list only silver cores
/* This should be defined only on some platforms e.g SM8150, SM6150, SM7225
* from which the Gold cores do not support TEE interfaces
* so that CPU_IDS should list only Silver cores.
*/
#ifdef RSU_SELECT_SILVER_CORES
#define CPU_SELECTION
#if defined CPU_SELECTION
#define NB_CPU 4
#define CPU_IDS {0x0, 0x1, 0x2, 0x3}
#endif
#else
/* Enforce/restrict statically CPUs potentially running TEE
* (Customize to match platform CPU layout... 0xF0 for big cores only for ex).
* If not defined TEE dynamically using all platform CPUs (recommended)
@ -152,5 +163,6 @@ static inline int smc_fastcall(void *fc_generic, size_t size)
*/
#define PLAT_DEFAULT_TEE_AFFINITY_MASK (0xF)
#define BIG_CORE_SWITCH_AFFINITY_MASK (0xF)
#endif /* RSU_SELECT_SILVER_CORES */
#endif /* _MC_PLATFORM_H_ */