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fw-api: Update QCA8074 hw header files to wcss_v1_r27

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Update QCA8074 hardware header files to wcss_v1_r27
Only files which are changed from original version are only
updated.

Change-Id: I346286b607b8f005b53e648866239bbd87f53083
CRs-Fixed: 2091297
This commit is contained in:
Pratik Gandhi 2017-08-21 18:35:31 +05:30 • committed by snandini
commit d423d926c5
2 changed files with 33 additions and 32 deletions
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63
hw/qca8074/v1/wcss_seq_hwiobase.h
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@ -1,3 +1,4 @@
/*
* Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
*
@ -18,7 +19,7 @@
///////////////////////////////////////////////////////////////////////////////////////////////
//
// wcss_seq_hwiobase.h : automatically generated by Autoseq 3.1 2/3/2017
// wcss_seq_hwiobase.h : automatically generated by Autoseq 3.6 3/21/2017
// User Name:pgohil
//
// !! WARNING !! DO NOT MANUALLY EDIT THIS FILE.
@ -66,13 +67,12 @@
#define SEQ_WCSS_PHYA0_WFAX_PHYRF_REG_MAP_OFFSET 0x005a0000
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_OFFSET 0x005c0000
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_RFA_DIG_OFFSET 0x005c0000
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_RFA_DIG_OTP_OFFSET 0x005c0000
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_RFA_DIG_TLMM_OFFSET 0x005c4000
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_RFA_DIG_RFA_TLMM_OFFSET 0x005c0000
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_RFA_DIG_SYSCTRL_OFFSET 0x005c8000
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_RFA_CMN_OFFSET 0x005d4000
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_OFFSET 0x005d4000
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x005d4300
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x005d4400
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x005d4800
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x005d6000
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x005d6040
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x005d6080
@ -87,6 +87,7 @@
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x005d6900
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x005d6940
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x005d6a00
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_RFA_CMN_DRM_REG_OFFSET 0x005d7c00
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_RFA_WL_OFFSET 0x005e0000
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_CH0_OFFSET 0x005e0000
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_CH0_OFFSET 0x005e0400
@ -126,13 +127,12 @@
#define SEQ_WCSS_PHYA0_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_CH3_OFFSET 0x005fc000
#define SEQ_WCSS_IRONA0_OFFSET 0x005c0000
#define SEQ_WCSS_IRONA0_RFA_DIG_OFFSET 0x005c0000
#define SEQ_WCSS_IRONA0_RFA_DIG_OTP_OFFSET 0x005c0000
#define SEQ_WCSS_IRONA0_RFA_DIG_TLMM_OFFSET 0x005c4000
#define SEQ_WCSS_IRONA0_RFA_DIG_RFA_TLMM_OFFSET 0x005c0000
#define SEQ_WCSS_IRONA0_RFA_DIG_SYSCTRL_OFFSET 0x005c8000
#define SEQ_WCSS_IRONA0_RFA_CMN_OFFSET 0x005d4000
#define SEQ_WCSS_IRONA0_RFA_CMN_AON_OFFSET 0x005d4000
#define SEQ_WCSS_IRONA0_RFA_CMN_RFFE_M_OFFSET 0x005d4300
#define SEQ_WCSS_IRONA0_RFA_CMN_CLKGEN_OFFSET 0x005d4400
#define SEQ_WCSS_IRONA0_RFA_CMN_CLKGEN_OFFSET 0x005d4800
#define SEQ_WCSS_IRONA0_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x005d6000
#define SEQ_WCSS_IRONA0_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x005d6040
#define SEQ_WCSS_IRONA0_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x005d6080
@ -147,6 +147,7 @@
#define SEQ_WCSS_IRONA0_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x005d6900
#define SEQ_WCSS_IRONA0_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x005d6940
#define SEQ_WCSS_IRONA0_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x005d6a00
#define SEQ_WCSS_IRONA0_RFA_CMN_DRM_REG_OFFSET 0x005d7c00
#define SEQ_WCSS_IRONA0_RFA_WL_OFFSET 0x005e0000
#define SEQ_WCSS_IRONA0_RFA_WL_WL_MC_CH0_OFFSET 0x005e0000
#define SEQ_WCSS_IRONA0_RFA_WL_WL_RXBB_CH0_OFFSET 0x005e0400
@ -203,13 +204,12 @@
#define SEQ_WCSS_PHYA1_WFAX_PHYRF_REG_MAP_OFFSET 0x007a0000
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_OFFSET 0x007c0000
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_RFA_DIG_OFFSET 0x007c0000
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_RFA_DIG_OTP_OFFSET 0x007c0000
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_RFA_DIG_TLMM_OFFSET 0x007c4000
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_RFA_DIG_RFA_TLMM_OFFSET 0x007c0000
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_RFA_DIG_SYSCTRL_OFFSET 0x007c8000
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_RFA_CMN_OFFSET 0x007d4000
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_OFFSET 0x007d4000
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x007d4300
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x007d4400
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x007d4800
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x007d6000
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x007d6040
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x007d6080
@ -224,6 +224,7 @@
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x007d6900
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x007d6940
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x007d6a00
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_RFA_CMN_DRM_REG_OFFSET 0x007d7c00
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_RFA_WL_OFFSET 0x007e0000
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_CH0_OFFSET 0x007e0000
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_CH0_OFFSET 0x007e0400
@ -263,13 +264,12 @@
#define SEQ_WCSS_PHYA1_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MEM_CH3_OFFSET 0x007fc000
#define SEQ_WCSS_IRONA1_OFFSET 0x007c0000
#define SEQ_WCSS_IRONA1_RFA_DIG_OFFSET 0x007c0000
#define SEQ_WCSS_IRONA1_RFA_DIG_OTP_OFFSET 0x007c0000
#define SEQ_WCSS_IRONA1_RFA_DIG_TLMM_OFFSET 0x007c4000
#define SEQ_WCSS_IRONA1_RFA_DIG_RFA_TLMM_OFFSET 0x007c0000
#define SEQ_WCSS_IRONA1_RFA_DIG_SYSCTRL_OFFSET 0x007c8000
#define SEQ_WCSS_IRONA1_RFA_CMN_OFFSET 0x007d4000
#define SEQ_WCSS_IRONA1_RFA_CMN_AON_OFFSET 0x007d4000
#define SEQ_WCSS_IRONA1_RFA_CMN_RFFE_M_OFFSET 0x007d4300
#define SEQ_WCSS_IRONA1_RFA_CMN_CLKGEN_OFFSET 0x007d4400
#define SEQ_WCSS_IRONA1_RFA_CMN_CLKGEN_OFFSET 0x007d4800
#define SEQ_WCSS_IRONA1_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x007d6000
#define SEQ_WCSS_IRONA1_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x007d6040
#define SEQ_WCSS_IRONA1_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x007d6080
@ -284,6 +284,7 @@
#define SEQ_WCSS_IRONA1_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x007d6900
#define SEQ_WCSS_IRONA1_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x007d6940
#define SEQ_WCSS_IRONA1_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x007d6a00
#define SEQ_WCSS_IRONA1_RFA_CMN_DRM_REG_OFFSET 0x007d7c00
#define SEQ_WCSS_IRONA1_RFA_WL_OFFSET 0x007e0000
#define SEQ_WCSS_IRONA1_RFA_WL_WL_MC_CH0_OFFSET 0x007e0000
#define SEQ_WCSS_IRONA1_RFA_WL_WL_RXBB_CH0_OFFSET 0x007e0400
@ -340,13 +341,12 @@
#define SEQ_WCSS_PHYB_WFAX_PHYRF_B_REG_MAP_OFFSET 0x009a0000
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_OFFSET 0x009c0000
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_DIG_OFFSET 0x009c0000
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_DIG_OTP_OFFSET 0x009c0000
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_DIG_TLMM_OFFSET 0x009c4000
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_DIG_RFA_TLMM_OFFSET 0x009c0000
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_DIG_SYSCTRL_OFFSET 0x009c8000
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_OFFSET 0x009d4000
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_AON_OFFSET 0x009d4000
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x009d4300
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x009d4400
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x009d4800
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x009d6000
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x009d6040
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x009d6080
@ -361,6 +361,7 @@
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x009d6900
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x009d6940
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x009d6a00
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_CMN_DRM_REG_OFFSET 0x009d7c00
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_OFFSET 0x009e0000
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_CH0_OFFSET 0x009e0000
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_CH0_OFFSET 0x009e0400
@ -400,13 +401,12 @@
#define SEQ_WCSS_PHYB_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MEM_CH3_OFFSET 0x009fc000
#define SEQ_WCSS_IRONB_OFFSET 0x009c0000
#define SEQ_WCSS_IRONB_RFA_DIG_OFFSET 0x009c0000
#define SEQ_WCSS_IRONB_RFA_DIG_OTP_OFFSET 0x009c0000
#define SEQ_WCSS_IRONB_RFA_DIG_TLMM_OFFSET 0x009c4000
#define SEQ_WCSS_IRONB_RFA_DIG_RFA_TLMM_OFFSET 0x009c0000
#define SEQ_WCSS_IRONB_RFA_DIG_SYSCTRL_OFFSET 0x009c8000
#define SEQ_WCSS_IRONB_RFA_CMN_OFFSET 0x009d4000
#define SEQ_WCSS_IRONB_RFA_CMN_AON_OFFSET 0x009d4000
#define SEQ_WCSS_IRONB_RFA_CMN_RFFE_M_OFFSET 0x009d4300
#define SEQ_WCSS_IRONB_RFA_CMN_CLKGEN_OFFSET 0x009d4400
#define SEQ_WCSS_IRONB_RFA_CMN_CLKGEN_OFFSET 0x009d4800
#define SEQ_WCSS_IRONB_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x009d6000
#define SEQ_WCSS_IRONB_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x009d6040
#define SEQ_WCSS_IRONB_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x009d6080
@ -421,6 +421,7 @@
#define SEQ_WCSS_IRONB_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x009d6900
#define SEQ_WCSS_IRONB_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x009d6940
#define SEQ_WCSS_IRONB_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x009d6a00
#define SEQ_WCSS_IRONB_RFA_CMN_DRM_REG_OFFSET 0x009d7c00
#define SEQ_WCSS_IRONB_RFA_WL_OFFSET 0x009e0000
#define SEQ_WCSS_IRONB_RFA_WL_WL_MC_CH0_OFFSET 0x009e0000
#define SEQ_WCSS_IRONB_RFA_WL_WL_RXBB_CH0_OFFSET 0x009e0400
@ -791,13 +792,12 @@
#define SEQ_WFAX_TOP_WFAX_PHYRF_REG_MAP_OFFSET 0x001a0000
#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_OFFSET 0x001c0000
#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_DIG_OFFSET 0x001c0000
#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_DIG_OTP_OFFSET 0x001c0000
#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_DIG_TLMM_OFFSET 0x001c4000
#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_DIG_RFA_TLMM_OFFSET 0x001c0000
#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_DIG_SYSCTRL_OFFSET 0x001c8000
#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_OFFSET 0x001d4000
#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_OFFSET 0x001d4000
#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x001d4300
#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x001d4400
#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x001d4800
#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x001d6000
#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x001d6040
#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x001d6080
@ -812,6 +812,7 @@
#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x001d6900
#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x001d6940
#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x001d6a00
#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_DRM_REG_OFFSET 0x001d7c00
#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_OFFSET 0x001e0000
#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_MC_CH0_OFFSET 0x001e0000
#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_WL_WL_RXBB_CH0_OFFSET 0x001e0400
@ -856,13 +857,12 @@
///////////////////////////////////////////////////////////////////////////////////////////////
#define SEQ_IRON2G_RFA_DIG_OFFSET 0x00000000
#define SEQ_IRON2G_RFA_DIG_OTP_OFFSET 0x00000000
#define SEQ_IRON2G_RFA_DIG_TLMM_OFFSET 0x00004000
#define SEQ_IRON2G_RFA_DIG_RFA_TLMM_OFFSET 0x00000000
#define SEQ_IRON2G_RFA_DIG_SYSCTRL_OFFSET 0x00008000
#define SEQ_IRON2G_RFA_CMN_OFFSET 0x00014000
#define SEQ_IRON2G_RFA_CMN_AON_OFFSET 0x00014000
#define SEQ_IRON2G_RFA_CMN_RFFE_M_OFFSET 0x00014300
#define SEQ_IRON2G_RFA_CMN_CLKGEN_OFFSET 0x00014400
#define SEQ_IRON2G_RFA_CMN_CLKGEN_OFFSET 0x00014800
#define SEQ_IRON2G_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x00016000
#define SEQ_IRON2G_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x00016040
#define SEQ_IRON2G_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x00016080
@ -877,6 +877,7 @@
#define SEQ_IRON2G_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x00016900
#define SEQ_IRON2G_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x00016940
#define SEQ_IRON2G_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x00016a00
#define SEQ_IRON2G_RFA_CMN_DRM_REG_OFFSET 0x00017c00
#define SEQ_IRON2G_RFA_WL_OFFSET 0x00020000
#define SEQ_IRON2G_RFA_WL_WL_MC_CH0_OFFSET 0x00020000
#define SEQ_IRON2G_RFA_WL_WL_RXBB_CH0_OFFSET 0x00020400
@ -920,8 +921,7 @@
// Instance Relative Offsets from Block rfa_dig
///////////////////////////////////////////////////////////////////////////////////////////////
#define SEQ_RFA_DIG_OTP_OFFSET 0x00000000
#define SEQ_RFA_DIG_TLMM_OFFSET 0x00004000
#define SEQ_RFA_DIG_RFA_TLMM_OFFSET 0x00000000
#define SEQ_RFA_DIG_SYSCTRL_OFFSET 0x00008000
@ -931,7 +931,7 @@
#define SEQ_RFA_CMN_AON_OFFSET 0x00000000
#define SEQ_RFA_CMN_RFFE_M_OFFSET 0x00000300
#define SEQ_RFA_CMN_CLKGEN_OFFSET 0x00000400
#define SEQ_RFA_CMN_CLKGEN_OFFSET 0x00000800
#define SEQ_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x00002000
#define SEQ_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x00002040
#define SEQ_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x00002080
@ -946,6 +946,7 @@
#define SEQ_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x00002900
#define SEQ_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x00002940
#define SEQ_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x00002a00
#define SEQ_RFA_CMN_DRM_REG_OFFSET 0x00003c00
///////////////////////////////////////////////////////////////////////////////////////////////
@ -1012,13 +1013,12 @@
#define SEQ_WFAX_TOP_B_WFAX_PHYRF_B_REG_MAP_OFFSET 0x001a0000
#define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_OFFSET 0x001c0000
#define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_DIG_OFFSET 0x001c0000
#define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_DIG_OTP_OFFSET 0x001c0000
#define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_DIG_TLMM_OFFSET 0x001c4000
#define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_DIG_RFA_TLMM_OFFSET 0x001c0000
#define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_DIG_SYSCTRL_OFFSET 0x001c8000
#define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_OFFSET 0x001d4000
#define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_AON_OFFSET 0x001d4000
#define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_RFFE_M_OFFSET 0x001d4300
#define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x001d4400
#define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_CLKGEN_OFFSET 0x001d4800
#define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_BS_OFFSET 0x001d6000
#define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_CLBS_OFFSET 0x001d6040
#define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH0_BIST_OFFSET 0x001d6080
@ -1033,6 +1033,7 @@
#define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_KVCO_OFFSET 0x001d6900
#define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_AC_OFFSET 0x001d6940
#define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_WL_SYNTH1_LO_OFFSET 0x001d6a00
#define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_CMN_DRM_REG_OFFSET 0x001d7c00
#define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_OFFSET 0x001e0000
#define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_MC_CH0_OFFSET 0x001e0000
#define SEQ_WFAX_TOP_B_WFAX_IRON2G_B_REG_MAP_RFA_WL_WL_RXBB_CH0_OFFSET 0x001e0400

2
hw/qca8074/v1/wcss_version.h
View file

@ -16,4 +16,4 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
#define WCSS_VERSION 1019
#define WCSS_VERSION 1027