mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-29 19:21:31 -04:00
Merge branch 'master' into for-next
This commit is contained in:
Jiri Kosina
commit
d4263348f7
10316 changed files with 557400 additions and 217358 deletions
|
|
@ -525,4 +525,5 @@ source "drivers/misc/altera-stapl/Kconfig"
|
|||
source "drivers/misc/mei/Kconfig"
|
||||
source "drivers/misc/vmw_vmci/Kconfig"
|
||||
source "drivers/misc/mic/Kconfig"
|
||||
source "drivers/misc/genwqe/Kconfig"
|
||||
endmenu
|
||||
|
|
|
|||
|
|
@ -53,3 +53,4 @@ obj-$(CONFIG_VMWARE_VMCI) += vmw_vmci/
|
|||
obj-$(CONFIG_LATTICE_ECP3_CONFIG) += lattice-ecp3-config.o
|
||||
obj-$(CONFIG_SRAM) += sram.o
|
||||
obj-y += mic/
|
||||
obj-$(CONFIG_GENWQE) += genwqe/
|
||||
|
|
|
|||
|
|
@ -641,7 +641,7 @@ static const struct attribute_group ad525x_group_commands = {
|
|||
.attrs = ad525x_attributes_commands,
|
||||
};
|
||||
|
||||
int ad_dpot_add_files(struct device *dev,
|
||||
static int ad_dpot_add_files(struct device *dev,
|
||||
unsigned features, unsigned rdac)
|
||||
{
|
||||
int err = sysfs_create_file(&dev->kobj,
|
||||
|
|
@ -666,7 +666,7 @@ int ad_dpot_add_files(struct device *dev,
|
|||
return err;
|
||||
}
|
||||
|
||||
inline void ad_dpot_remove_files(struct device *dev,
|
||||
static inline void ad_dpot_remove_files(struct device *dev,
|
||||
unsigned features, unsigned rdac)
|
||||
{
|
||||
sysfs_remove_file(&dev->kobj,
|
||||
|
|
|
|||
|
|
@ -49,7 +49,7 @@ static int bmp085_i2c_probe(struct i2c_client *client,
|
|||
return err;
|
||||
}
|
||||
|
||||
return bmp085_probe(&client->dev, regmap);
|
||||
return bmp085_probe(&client->dev, regmap, client->irq);
|
||||
}
|
||||
|
||||
static int bmp085_i2c_remove(struct i2c_client *client)
|
||||
|
|
|
|||
|
|
@ -41,7 +41,7 @@ static int bmp085_spi_probe(struct spi_device *client)
|
|||
return err;
|
||||
}
|
||||
|
||||
return bmp085_probe(&client->dev, regmap);
|
||||
return bmp085_probe(&client->dev, regmap, client->irq);
|
||||
}
|
||||
|
||||
static int bmp085_spi_remove(struct spi_device *client)
|
||||
|
|
|
|||
|
|
@ -49,9 +49,11 @@
|
|||
#include <linux/device.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/of.h>
|
||||
#include "bmp085.h"
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/completion.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#define BMP085_CHIP_ID 0x55
|
||||
#define BMP085_CALIBRATION_DATA_START 0xAA
|
||||
|
|
@ -84,8 +86,19 @@ struct bmp085_data {
|
|||
unsigned long last_temp_measurement;
|
||||
u8 chip_id;
|
||||
s32 b6; /* calculated temperature correction coefficient */
|
||||
int irq;
|
||||
struct completion done;
|
||||
};
|
||||
|
||||
static irqreturn_t bmp085_eoc_isr(int irq, void *devid)
|
||||
{
|
||||
struct bmp085_data *data = devid;
|
||||
|
||||
complete(&data->done);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static s32 bmp085_read_calibration_data(struct bmp085_data *data)
|
||||
{
|
||||
u16 tmp[BMP085_CALIBRATION_DATA_LENGTH];
|
||||
|
|
@ -116,6 +129,9 @@ static s32 bmp085_update_raw_temperature(struct bmp085_data *data)
|
|||
s32 status;
|
||||
|
||||
mutex_lock(&data->lock);
|
||||
|
||||
init_completion(&data->done);
|
||||
|
||||
status = regmap_write(data->regmap, BMP085_CTRL_REG,
|
||||
BMP085_TEMP_MEASUREMENT);
|
||||
if (status < 0) {
|
||||
|
|
@ -123,7 +139,8 @@ static s32 bmp085_update_raw_temperature(struct bmp085_data *data)
|
|||
"Error while requesting temperature measurement.\n");
|
||||
goto exit;
|
||||
}
|
||||
msleep(BMP085_TEMP_CONVERSION_TIME);
|
||||
wait_for_completion_timeout(&data->done, 1 + msecs_to_jiffies(
|
||||
BMP085_TEMP_CONVERSION_TIME));
|
||||
|
||||
status = regmap_bulk_read(data->regmap, BMP085_CONVERSION_REGISTER_MSB,
|
||||
&tmp, sizeof(tmp));
|
||||
|
|
@ -147,6 +164,9 @@ static s32 bmp085_update_raw_pressure(struct bmp085_data *data)
|
|||
s32 status;
|
||||
|
||||
mutex_lock(&data->lock);
|
||||
|
||||
init_completion(&data->done);
|
||||
|
||||
status = regmap_write(data->regmap, BMP085_CTRL_REG,
|
||||
BMP085_PRESSURE_MEASUREMENT +
|
||||
(data->oversampling_setting << 6));
|
||||
|
|
@ -157,8 +177,8 @@ static s32 bmp085_update_raw_pressure(struct bmp085_data *data)
|
|||
}
|
||||
|
||||
/* wait for the end of conversion */
|
||||
msleep(2+(3 << data->oversampling_setting));
|
||||
|
||||
wait_for_completion_timeout(&data->done, 1 + msecs_to_jiffies(
|
||||
2+(3 << data->oversampling_setting)));
|
||||
/* copy data into a u32 (4 bytes), but skip the first byte. */
|
||||
status = regmap_bulk_read(data->regmap, BMP085_CONVERSION_REGISTER_MSB,
|
||||
((u8 *)&tmp)+1, 3);
|
||||
|
|
@ -420,7 +440,7 @@ struct regmap_config bmp085_regmap_config = {
|
|||
};
|
||||
EXPORT_SYMBOL_GPL(bmp085_regmap_config);
|
||||
|
||||
int bmp085_probe(struct device *dev, struct regmap *regmap)
|
||||
int bmp085_probe(struct device *dev, struct regmap *regmap, int irq)
|
||||
{
|
||||
struct bmp085_data *data;
|
||||
int err = 0;
|
||||
|
|
@ -434,6 +454,15 @@ int bmp085_probe(struct device *dev, struct regmap *regmap)
|
|||
dev_set_drvdata(dev, data);
|
||||
data->dev = dev;
|
||||
data->regmap = regmap;
|
||||
data->irq = irq;
|
||||
|
||||
if (data->irq > 0) {
|
||||
err = devm_request_irq(dev, data->irq, bmp085_eoc_isr,
|
||||
IRQF_TRIGGER_RISING, "bmp085",
|
||||
data);
|
||||
if (err < 0)
|
||||
goto exit_free;
|
||||
}
|
||||
|
||||
/* Initialize the BMP085 chip */
|
||||
err = bmp085_init_client(data);
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@
|
|||
|
||||
extern struct regmap_config bmp085_regmap_config;
|
||||
|
||||
int bmp085_probe(struct device *dev, struct regmap *regmap);
|
||||
int bmp085_probe(struct device *dev, struct regmap *regmap, int irq);
|
||||
int bmp085_remove(struct device *dev);
|
||||
int bmp085_detect(struct device *dev);
|
||||
|
||||
|
|
|
|||
|
|
@ -3,7 +3,7 @@
|
|||
* Philip Edelbrock <phil@netroedge.com>
|
||||
* Copyright (C) 2003 Greg Kroah-Hartman <greg@kroah.com>
|
||||
* Copyright (C) 2003 IBM Corp.
|
||||
* Copyright (C) 2004 Jean Delvare <khali@linux-fr.org>
|
||||
* Copyright (C) 2004 Jean Delvare <jdelvare@suse.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
|
|||
|
|
@ -378,7 +378,6 @@ static int eeprom_93xx46_remove(struct spi_device *spi)
|
|||
device_remove_file(&spi->dev, &dev_attr_erase);
|
||||
|
||||
sysfs_remove_bin_file(&spi->dev.kobj, &edev->bin);
|
||||
spi_set_drvdata(spi, NULL);
|
||||
kfree(edev);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
13
drivers/misc/genwqe/Kconfig
Normal file
13
drivers/misc/genwqe/Kconfig
Normal file
|
|
@ -0,0 +1,13 @@
|
|||
#
|
||||
# IBM Accelerator Family 'GenWQE'
|
||||
#
|
||||
|
||||
menuconfig GENWQE
|
||||
tristate "GenWQE PCIe Accelerator"
|
||||
depends on PCI && 64BIT
|
||||
select CRC_ITU_T
|
||||
default n
|
||||
help
|
||||
Enables PCIe card driver for IBM GenWQE accelerators.
|
||||
The user-space interface is described in
|
||||
include/linux/genwqe/genwqe_card.h.
|
||||
7
drivers/misc/genwqe/Makefile
Normal file
7
drivers/misc/genwqe/Makefile
Normal file
|
|
@ -0,0 +1,7 @@
|
|||
#
|
||||
# Makefile for GenWQE driver
|
||||
#
|
||||
|
||||
obj-$(CONFIG_GENWQE) := genwqe_card.o
|
||||
genwqe_card-objs := card_base.o card_dev.o card_ddcb.o card_sysfs.o \
|
||||
card_debugfs.o card_utils.o
|
||||
1205
drivers/misc/genwqe/card_base.c
Normal file
1205
drivers/misc/genwqe/card_base.c
Normal file
File diff suppressed because it is too large
Load diff
557
drivers/misc/genwqe/card_base.h
Normal file
557
drivers/misc/genwqe/card_base.h
Normal file
|
|
@ -0,0 +1,557 @@
|
|||
#ifndef __CARD_BASE_H__
|
||||
#define __CARD_BASE_H__
|
||||
|
||||
/**
|
||||
* IBM Accelerator Family 'GenWQE'
|
||||
*
|
||||
* (C) Copyright IBM Corp. 2013
|
||||
*
|
||||
* Author: Frank Haverkamp <haver@linux.vnet.ibm.com>
|
||||
* Author: Joerg-Stephan Vogt <jsvogt@de.ibm.com>
|
||||
* Author: Michael Jung <mijung@de.ibm.com>
|
||||
* Author: Michael Ruettger <michael@ibmra.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License (version 2 only)
|
||||
* as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Interfaces within the GenWQE module. Defines genwqe_card and
|
||||
* ddcb_queue as well as ddcb_requ.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/cdev.h>
|
||||
#include <linux/stringify.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/semaphore.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/version.h>
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include <linux/genwqe/genwqe_card.h>
|
||||
#include "genwqe_driver.h"
|
||||
|
||||
#define GENWQE_MSI_IRQS 4 /* Just one supported, no MSIx */
|
||||
#define GENWQE_FLAG_MSI_ENABLED (1 << 0)
|
||||
|
||||
#define GENWQE_MAX_VFS 15 /* maximum 15 VFs are possible */
|
||||
#define GENWQE_MAX_FUNCS 16 /* 1 PF and 15 VFs */
|
||||
#define GENWQE_CARD_NO_MAX (16 * GENWQE_MAX_FUNCS)
|
||||
|
||||
/* Compile parameters, some of them appear in debugfs for later adjustment */
|
||||
#define genwqe_ddcb_max 32 /* DDCBs on the work-queue */
|
||||
#define genwqe_polling_enabled 0 /* in case of irqs not working */
|
||||
#define genwqe_ddcb_software_timeout 10 /* timeout per DDCB in seconds */
|
||||
#define genwqe_kill_timeout 8 /* time until process gets killed */
|
||||
#define genwqe_vf_jobtimeout_msec 250 /* 250 msec */
|
||||
#define genwqe_pf_jobtimeout_msec 8000 /* 8 sec should be ok */
|
||||
#define genwqe_health_check_interval 4 /* <= 0: disabled */
|
||||
|
||||
/* Sysfs attribute groups used when we create the genwqe device */
|
||||
extern const struct attribute_group *genwqe_attribute_groups[];
|
||||
|
||||
/*
|
||||
* Config space for Genwqe5 A7:
|
||||
* 00:[14 10 4b 04]40 00 10 00[00 00 00 12]00 00 00 00
|
||||
* 10: 0c 00 00 f0 07 3c 00 00 00 00 00 00 00 00 00 00
|
||||
* 20: 00 00 00 00 00 00 00 00 00 00 00 00[14 10 4b 04]
|
||||
* 30: 00 00 00 00 50 00 00 00 00 00 00 00 00 00 00 00
|
||||
*/
|
||||
#define PCI_DEVICE_GENWQE 0x044b /* Genwqe DeviceID */
|
||||
|
||||
#define PCI_SUBSYSTEM_ID_GENWQE5 0x035f /* Genwqe A5 Subsystem-ID */
|
||||
#define PCI_SUBSYSTEM_ID_GENWQE5_NEW 0x044b /* Genwqe A5 Subsystem-ID */
|
||||
#define PCI_CLASSCODE_GENWQE5 0x1200 /* UNKNOWN */
|
||||
|
||||
#define PCI_SUBVENDOR_ID_IBM_SRIOV 0x0000
|
||||
#define PCI_SUBSYSTEM_ID_GENWQE5_SRIOV 0x0000 /* Genwqe A5 Subsystem-ID */
|
||||
#define PCI_CLASSCODE_GENWQE5_SRIOV 0x1200 /* UNKNOWN */
|
||||
|
||||
#define GENWQE_SLU_ARCH_REQ 2 /* Required SLU architecture level */
|
||||
|
||||
/**
|
||||
* struct genwqe_reg - Genwqe data dump functionality
|
||||
*/
|
||||
struct genwqe_reg {
|
||||
u32 addr;
|
||||
u32 idx;
|
||||
u64 val;
|
||||
};
|
||||
|
||||
/*
|
||||
* enum genwqe_dbg_type - Specify chip unit to dump/debug
|
||||
*/
|
||||
enum genwqe_dbg_type {
|
||||
GENWQE_DBG_UNIT0 = 0, /* captured before prev errs cleared */
|
||||
GENWQE_DBG_UNIT1 = 1,
|
||||
GENWQE_DBG_UNIT2 = 2,
|
||||
GENWQE_DBG_UNIT3 = 3,
|
||||
GENWQE_DBG_UNIT4 = 4,
|
||||
GENWQE_DBG_UNIT5 = 5,
|
||||
GENWQE_DBG_UNIT6 = 6,
|
||||
GENWQE_DBG_UNIT7 = 7,
|
||||
GENWQE_DBG_REGS = 8,
|
||||
GENWQE_DBG_DMA = 9,
|
||||
GENWQE_DBG_UNITS = 10, /* max number of possible debug units */
|
||||
};
|
||||
|
||||
/* Software error injection to simulate card failures */
|
||||
#define GENWQE_INJECT_HARDWARE_FAILURE 0x00000001 /* injects -1 reg reads */
|
||||
#define GENWQE_INJECT_BUS_RESET_FAILURE 0x00000002 /* pci_bus_reset fail */
|
||||
#define GENWQE_INJECT_GFIR_FATAL 0x00000004 /* GFIR = 0x0000ffff */
|
||||
#define GENWQE_INJECT_GFIR_INFO 0x00000008 /* GFIR = 0xffff0000 */
|
||||
|
||||
/*
|
||||
* Genwqe card description and management data.
|
||||
*
|
||||
* Error-handling in case of card malfunction
|
||||
* ------------------------------------------
|
||||
*
|
||||
* If the card is detected to be defective the outside environment
|
||||
* will cause the PCI layer to call deinit (the cleanup function for
|
||||
* probe). This is the same effect like doing a unbind/bind operation
|
||||
* on the card.
|
||||
*
|
||||
* The genwqe card driver implements a health checking thread which
|
||||
* verifies the card function. If this detects a problem the cards
|
||||
* device is being shutdown and restarted again, along with a reset of
|
||||
* the card and queue.
|
||||
*
|
||||
* All functions accessing the card device return either -EIO or -ENODEV
|
||||
* code to indicate the malfunction to the user. The user has to close
|
||||
* the file descriptor and open a new one, once the card becomes
|
||||
* available again.
|
||||
*
|
||||
* If the open file descriptor is setup to receive SIGIO, the signal is
|
||||
* genereated for the application which has to provide a handler to
|
||||
* react on it. If the application does not close the open
|
||||
* file descriptor a SIGKILL is send to enforce freeing the cards
|
||||
* resources.
|
||||
*
|
||||
* I did not find a different way to prevent kernel problems due to
|
||||
* reference counters for the cards character devices getting out of
|
||||
* sync. The character device deallocation does not block, even if
|
||||
* there is still an open file descriptor pending. If this pending
|
||||
* descriptor is closed, the data structures used by the character
|
||||
* device is reinstantiated, which will lead to the reference counter
|
||||
* dropping below the allowed values.
|
||||
*
|
||||
* Card recovery
|
||||
* -------------
|
||||
*
|
||||
* To test the internal driver recovery the following command can be used:
|
||||
* sudo sh -c 'echo 0xfffff > /sys/class/genwqe/genwqe0_card/err_inject'
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* struct dma_mapping_type - Mapping type definition
|
||||
*
|
||||
* To avoid memcpying data arround we use user memory directly. To do
|
||||
* this we need to pin/swap-in the memory and request a DMA address
|
||||
* for it.
|
||||
*/
|
||||
enum dma_mapping_type {
|
||||
GENWQE_MAPPING_RAW = 0, /* contignous memory buffer */
|
||||
GENWQE_MAPPING_SGL_TEMP, /* sglist dynamically used */
|
||||
GENWQE_MAPPING_SGL_PINNED, /* sglist used with pinning */
|
||||
};
|
||||
|
||||
/**
|
||||
* struct dma_mapping - Information about memory mappings done by the driver
|
||||
*/
|
||||
struct dma_mapping {
|
||||
enum dma_mapping_type type;
|
||||
|
||||
void *u_vaddr; /* user-space vaddr/non-aligned */
|
||||
void *k_vaddr; /* kernel-space vaddr/non-aligned */
|
||||
dma_addr_t dma_addr; /* physical DMA address */
|
||||
|
||||
struct page **page_list; /* list of pages used by user buff */
|
||||
dma_addr_t *dma_list; /* list of dma addresses per page */
|
||||
unsigned int nr_pages; /* number of pages */
|
||||
unsigned int size; /* size in bytes */
|
||||
|
||||
struct list_head card_list; /* list of usr_maps for card */
|
||||
struct list_head pin_list; /* list of pinned memory for dev */
|
||||
};
|
||||
|
||||
static inline void genwqe_mapping_init(struct dma_mapping *m,
|
||||
enum dma_mapping_type type)
|
||||
{
|
||||
memset(m, 0, sizeof(*m));
|
||||
m->type = type;
|
||||
}
|
||||
|
||||
/**
|
||||
* struct ddcb_queue - DDCB queue data
|
||||
* @ddcb_max: Number of DDCBs on the queue
|
||||
* @ddcb_next: Next free DDCB
|
||||
* @ddcb_act: Next DDCB supposed to finish
|
||||
* @ddcb_seq: Sequence number of last DDCB
|
||||
* @ddcbs_in_flight: Currently enqueued DDCBs
|
||||
* @ddcbs_completed: Number of already completed DDCBs
|
||||
* @busy: Number of -EBUSY returns
|
||||
* @ddcb_daddr: DMA address of first DDCB in the queue
|
||||
* @ddcb_vaddr: Kernel virtual address of first DDCB in the queue
|
||||
* @ddcb_req: Associated requests (one per DDCB)
|
||||
* @ddcb_waitqs: Associated wait queues (one per DDCB)
|
||||
* @ddcb_lock: Lock to protect queuing operations
|
||||
* @ddcb_waitq: Wait on next DDCB finishing
|
||||
*/
|
||||
|
||||
struct ddcb_queue {
|
||||
int ddcb_max; /* amount of DDCBs */
|
||||
int ddcb_next; /* next available DDCB num */
|
||||
int ddcb_act; /* DDCB to be processed */
|
||||
u16 ddcb_seq; /* slc seq num */
|
||||
unsigned int ddcbs_in_flight; /* number of ddcbs in processing */
|
||||
unsigned int ddcbs_completed;
|
||||
unsigned int ddcbs_max_in_flight;
|
||||
unsigned int busy; /* how many times -EBUSY? */
|
||||
|
||||
dma_addr_t ddcb_daddr; /* DMA address */
|
||||
struct ddcb *ddcb_vaddr; /* kernel virtual addr for DDCBs */
|
||||
struct ddcb_requ **ddcb_req; /* ddcb processing parameter */
|
||||
wait_queue_head_t *ddcb_waitqs; /* waitqueue per ddcb */
|
||||
|
||||
spinlock_t ddcb_lock; /* exclusive access to queue */
|
||||
wait_queue_head_t ddcb_waitq; /* wait for ddcb processing */
|
||||
|
||||
/* registers or the respective queue to be used */
|
||||
u32 IO_QUEUE_CONFIG;
|
||||
u32 IO_QUEUE_STATUS;
|
||||
u32 IO_QUEUE_SEGMENT;
|
||||
u32 IO_QUEUE_INITSQN;
|
||||
u32 IO_QUEUE_WRAP;
|
||||
u32 IO_QUEUE_OFFSET;
|
||||
u32 IO_QUEUE_WTIME;
|
||||
u32 IO_QUEUE_ERRCNTS;
|
||||
u32 IO_QUEUE_LRW;
|
||||
};
|
||||
|
||||
/*
|
||||
* GFIR, SLU_UNITCFG, APP_UNITCFG
|
||||
* 8 Units with FIR/FEC + 64 * 2ndary FIRS/FEC.
|
||||
*/
|
||||
#define GENWQE_FFDC_REGS (3 + (8 * (2 + 2 * 64)))
|
||||
|
||||
struct genwqe_ffdc {
|
||||
unsigned int entries;
|
||||
struct genwqe_reg *regs;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct genwqe_dev - GenWQE device information
|
||||
* @card_state: Card operation state, see above
|
||||
* @ffdc: First Failure Data Capture buffers for each unit
|
||||
* @card_thread: Working thread to operate the DDCB queue
|
||||
* @card_waitq: Wait queue used in card_thread
|
||||
* @queue: DDCB queue
|
||||
* @health_thread: Card monitoring thread (only for PFs)
|
||||
* @health_waitq: Wait queue used in health_thread
|
||||
* @pci_dev: Associated PCI device (function)
|
||||
* @mmio: Base address of 64-bit register space
|
||||
* @mmio_len: Length of register area
|
||||
* @file_lock: Lock to protect access to file_list
|
||||
* @file_list: List of all processes with open GenWQE file descriptors
|
||||
*
|
||||
* This struct contains all information needed to communicate with a
|
||||
* GenWQE card. It is initialized when a GenWQE device is found and
|
||||
* destroyed when it goes away. It holds data to maintain the queue as
|
||||
* well as data needed to feed the user interfaces.
|
||||
*/
|
||||
struct genwqe_dev {
|
||||
enum genwqe_card_state card_state;
|
||||
spinlock_t print_lock;
|
||||
|
||||
int card_idx; /* card index 0..CARD_NO_MAX-1 */
|
||||
u64 flags; /* general flags */
|
||||
|
||||
/* FFDC data gathering */
|
||||
struct genwqe_ffdc ffdc[GENWQE_DBG_UNITS];
|
||||
|
||||
/* DDCB workqueue */
|
||||
struct task_struct *card_thread;
|
||||
wait_queue_head_t queue_waitq;
|
||||
struct ddcb_queue queue; /* genwqe DDCB queue */
|
||||
unsigned int irqs_processed;
|
||||
|
||||
/* Card health checking thread */
|
||||
struct task_struct *health_thread;
|
||||
wait_queue_head_t health_waitq;
|
||||
|
||||
/* char device */
|
||||
dev_t devnum_genwqe; /* major/minor num card */
|
||||
struct class *class_genwqe; /* reference to class object */
|
||||
struct device *dev; /* for device creation */
|
||||
struct cdev cdev_genwqe; /* char device for card */
|
||||
|
||||
struct dentry *debugfs_root; /* debugfs card root directory */
|
||||
struct dentry *debugfs_genwqe; /* debugfs driver root directory */
|
||||
|
||||
/* pci resources */
|
||||
struct pci_dev *pci_dev; /* PCI device */
|
||||
void __iomem *mmio; /* BAR-0 MMIO start */
|
||||
unsigned long mmio_len;
|
||||
u16 num_vfs;
|
||||
u32 vf_jobtimeout_msec[GENWQE_MAX_VFS];
|
||||
int is_privileged; /* access to all regs possible */
|
||||
|
||||
/* config regs which we need often */
|
||||
u64 slu_unitcfg;
|
||||
u64 app_unitcfg;
|
||||
u64 softreset;
|
||||
u64 err_inject;
|
||||
u64 last_gfir;
|
||||
char app_name[5];
|
||||
|
||||
spinlock_t file_lock; /* lock for open files */
|
||||
struct list_head file_list; /* list of open files */
|
||||
|
||||
/* debugfs parameters */
|
||||
int ddcb_software_timeout; /* wait until DDCB times out */
|
||||
int skip_recovery; /* circumvention if recovery fails */
|
||||
int kill_timeout; /* wait after sending SIGKILL */
|
||||
};
|
||||
|
||||
/**
|
||||
* enum genwqe_requ_state - State of a DDCB execution request
|
||||
*/
|
||||
enum genwqe_requ_state {
|
||||
GENWQE_REQU_NEW = 0,
|
||||
GENWQE_REQU_ENQUEUED = 1,
|
||||
GENWQE_REQU_TAPPED = 2,
|
||||
GENWQE_REQU_FINISHED = 3,
|
||||
GENWQE_REQU_STATE_MAX,
|
||||
};
|
||||
|
||||
/**
|
||||
* struct ddcb_requ - Kernel internal representation of the DDCB request
|
||||
* @cmd: User space representation of the DDCB execution request
|
||||
*/
|
||||
struct ddcb_requ {
|
||||
/* kernel specific content */
|
||||
enum genwqe_requ_state req_state; /* request status */
|
||||
int num; /* ddcb_no for this request */
|
||||
struct ddcb_queue *queue; /* associated queue */
|
||||
|
||||
struct dma_mapping dma_mappings[DDCB_FIXUPS];
|
||||
struct sg_entry *sgl[DDCB_FIXUPS];
|
||||
dma_addr_t sgl_dma_addr[DDCB_FIXUPS];
|
||||
size_t sgl_size[DDCB_FIXUPS];
|
||||
|
||||
/* kernel/user shared content */
|
||||
struct genwqe_ddcb_cmd cmd; /* ddcb_no for this request */
|
||||
struct genwqe_debug_data debug_data;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct genwqe_file - Information for open GenWQE devices
|
||||
*/
|
||||
struct genwqe_file {
|
||||
struct genwqe_dev *cd;
|
||||
struct genwqe_driver *client;
|
||||
struct file *filp;
|
||||
|
||||
struct fasync_struct *async_queue;
|
||||
struct task_struct *owner;
|
||||
struct list_head list; /* entry in list of open files */
|
||||
|
||||
spinlock_t map_lock; /* lock for dma_mappings */
|
||||
struct list_head map_list; /* list of dma_mappings */
|
||||
|
||||
spinlock_t pin_lock; /* lock for pinned memory */
|
||||
struct list_head pin_list; /* list of pinned memory */
|
||||
};
|
||||
|
||||
int genwqe_setup_service_layer(struct genwqe_dev *cd); /* for PF only */
|
||||
int genwqe_finish_queue(struct genwqe_dev *cd);
|
||||
int genwqe_release_service_layer(struct genwqe_dev *cd);
|
||||
|
||||
/**
|
||||
* genwqe_get_slu_id() - Read Service Layer Unit Id
|
||||
* Return: 0x00: Development code
|
||||
* 0x01: SLC1 (old)
|
||||
* 0x02: SLC2 (sept2012)
|
||||
* 0x03: SLC2 (feb2013, generic driver)
|
||||
*/
|
||||
static inline int genwqe_get_slu_id(struct genwqe_dev *cd)
|
||||
{
|
||||
return (int)((cd->slu_unitcfg >> 32) & 0xff);
|
||||
}
|
||||
|
||||
int genwqe_ddcbs_in_flight(struct genwqe_dev *cd);
|
||||
|
||||
u8 genwqe_card_type(struct genwqe_dev *cd);
|
||||
int genwqe_card_reset(struct genwqe_dev *cd);
|
||||
int genwqe_set_interrupt_capability(struct genwqe_dev *cd, int count);
|
||||
void genwqe_reset_interrupt_capability(struct genwqe_dev *cd);
|
||||
|
||||
int genwqe_device_create(struct genwqe_dev *cd);
|
||||
int genwqe_device_remove(struct genwqe_dev *cd);
|
||||
|
||||
/* debugfs */
|
||||
int genwqe_init_debugfs(struct genwqe_dev *cd);
|
||||
void genqwe_exit_debugfs(struct genwqe_dev *cd);
|
||||
|
||||
int genwqe_read_softreset(struct genwqe_dev *cd);
|
||||
|
||||
/* Hardware Circumventions */
|
||||
int genwqe_recovery_on_fatal_gfir_required(struct genwqe_dev *cd);
|
||||
int genwqe_flash_readback_fails(struct genwqe_dev *cd);
|
||||
|
||||
/**
|
||||
* genwqe_write_vreg() - Write register in VF window
|
||||
* @cd: genwqe device
|
||||
* @reg: register address
|
||||
* @val: value to write
|
||||
* @func: 0: PF, 1: VF0, ..., 15: VF14
|
||||
*/
|
||||
int genwqe_write_vreg(struct genwqe_dev *cd, u32 reg, u64 val, int func);
|
||||
|
||||
/**
|
||||
* genwqe_read_vreg() - Read register in VF window
|
||||
* @cd: genwqe device
|
||||
* @reg: register address
|
||||
* @func: 0: PF, 1: VF0, ..., 15: VF14
|
||||
*
|
||||
* Return: content of the register
|
||||
*/
|
||||
u64 genwqe_read_vreg(struct genwqe_dev *cd, u32 reg, int func);
|
||||
|
||||
/* FFDC Buffer Management */
|
||||
int genwqe_ffdc_buff_size(struct genwqe_dev *cd, int unit_id);
|
||||
int genwqe_ffdc_buff_read(struct genwqe_dev *cd, int unit_id,
|
||||
struct genwqe_reg *regs, unsigned int max_regs);
|
||||
int genwqe_read_ffdc_regs(struct genwqe_dev *cd, struct genwqe_reg *regs,
|
||||
unsigned int max_regs, int all);
|
||||
int genwqe_ffdc_dump_dma(struct genwqe_dev *cd,
|
||||
struct genwqe_reg *regs, unsigned int max_regs);
|
||||
|
||||
int genwqe_init_debug_data(struct genwqe_dev *cd,
|
||||
struct genwqe_debug_data *d);
|
||||
|
||||
void genwqe_init_crc32(void);
|
||||
int genwqe_read_app_id(struct genwqe_dev *cd, char *app_name, int len);
|
||||
|
||||
/* Memory allocation/deallocation; dma address handling */
|
||||
int genwqe_user_vmap(struct genwqe_dev *cd, struct dma_mapping *m,
|
||||
void *uaddr, unsigned long size,
|
||||
struct ddcb_requ *req);
|
||||
|
||||
int genwqe_user_vunmap(struct genwqe_dev *cd, struct dma_mapping *m,
|
||||
struct ddcb_requ *req);
|
||||
|
||||
struct sg_entry *genwqe_alloc_sgl(struct genwqe_dev *cd, int num_pages,
|
||||
dma_addr_t *dma_addr, size_t *sgl_size);
|
||||
|
||||
void genwqe_free_sgl(struct genwqe_dev *cd, struct sg_entry *sg_list,
|
||||
dma_addr_t dma_addr, size_t size);
|
||||
|
||||
int genwqe_setup_sgl(struct genwqe_dev *cd,
|
||||
unsigned long offs,
|
||||
unsigned long size,
|
||||
struct sg_entry *sgl, /* genwqe sgl */
|
||||
dma_addr_t dma_addr, size_t sgl_size,
|
||||
dma_addr_t *dma_list, int page_offs, int num_pages);
|
||||
|
||||
int genwqe_check_sgl(struct genwqe_dev *cd, struct sg_entry *sg_list,
|
||||
int size);
|
||||
|
||||
static inline bool dma_mapping_used(struct dma_mapping *m)
|
||||
{
|
||||
if (!m)
|
||||
return 0;
|
||||
return m->size != 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* __genwqe_execute_ddcb() - Execute DDCB request with addr translation
|
||||
*
|
||||
* This function will do the address translation changes to the DDCBs
|
||||
* according to the definitions required by the ATS field. It looks up
|
||||
* the memory allocation buffer or does vmap/vunmap for the respective
|
||||
* user-space buffers, inclusive page pinning and scatter gather list
|
||||
* buildup and teardown.
|
||||
*/
|
||||
int __genwqe_execute_ddcb(struct genwqe_dev *cd,
|
||||
struct genwqe_ddcb_cmd *cmd);
|
||||
|
||||
/**
|
||||
* __genwqe_execute_raw_ddcb() - Execute DDCB request without addr translation
|
||||
*
|
||||
* This version will not do address translation or any modifcation of
|
||||
* the DDCB data. It is used e.g. for the MoveFlash DDCB which is
|
||||
* entirely prepared by the driver itself. That means the appropriate
|
||||
* DMA addresses are already in the DDCB and do not need any
|
||||
* modification.
|
||||
*/
|
||||
int __genwqe_execute_raw_ddcb(struct genwqe_dev *cd,
|
||||
struct genwqe_ddcb_cmd *cmd);
|
||||
|
||||
int __genwqe_enqueue_ddcb(struct genwqe_dev *cd, struct ddcb_requ *req);
|
||||
int __genwqe_wait_ddcb(struct genwqe_dev *cd, struct ddcb_requ *req);
|
||||
int __genwqe_purge_ddcb(struct genwqe_dev *cd, struct ddcb_requ *req);
|
||||
|
||||
/* register access */
|
||||
int __genwqe_writeq(struct genwqe_dev *cd, u64 byte_offs, u64 val);
|
||||
u64 __genwqe_readq(struct genwqe_dev *cd, u64 byte_offs);
|
||||
int __genwqe_writel(struct genwqe_dev *cd, u64 byte_offs, u32 val);
|
||||
u32 __genwqe_readl(struct genwqe_dev *cd, u64 byte_offs);
|
||||
|
||||
void *__genwqe_alloc_consistent(struct genwqe_dev *cd, size_t size,
|
||||
dma_addr_t *dma_handle);
|
||||
void __genwqe_free_consistent(struct genwqe_dev *cd, size_t size,
|
||||
void *vaddr, dma_addr_t dma_handle);
|
||||
|
||||
/* Base clock frequency in MHz */
|
||||
int genwqe_base_clock_frequency(struct genwqe_dev *cd);
|
||||
|
||||
/* Before FFDC is captured the traps should be stopped. */
|
||||
void genwqe_stop_traps(struct genwqe_dev *cd);
|
||||
void genwqe_start_traps(struct genwqe_dev *cd);
|
||||
|
||||
/* Hardware circumvention */
|
||||
bool genwqe_need_err_masking(struct genwqe_dev *cd);
|
||||
|
||||
/**
|
||||
* genwqe_is_privileged() - Determine operation mode for PCI function
|
||||
*
|
||||
* On Intel with SRIOV support we see:
|
||||
* PF: is_physfn = 1 is_virtfn = 0
|
||||
* VF: is_physfn = 0 is_virtfn = 1
|
||||
*
|
||||
* On Systems with no SRIOV support _and_ virtualized systems we get:
|
||||
* is_physfn = 0 is_virtfn = 0
|
||||
*
|
||||
* Other vendors have individual pci device ids to distinguish between
|
||||
* virtual function drivers and physical function drivers. GenWQE
|
||||
* unfortunately has just on pci device id for both, VFs and PF.
|
||||
*
|
||||
* The following code is used to distinguish if the card is running in
|
||||
* privileged mode, either as true PF or in a virtualized system with
|
||||
* full register access e.g. currently on PowerPC.
|
||||
*
|
||||
* if (pci_dev->is_virtfn)
|
||||
* cd->is_privileged = 0;
|
||||
* else
|
||||
* cd->is_privileged = (__genwqe_readq(cd, IO_SLU_BITSTREAM)
|
||||
* != IO_ILLEGAL_VALUE);
|
||||
*/
|
||||
static inline int genwqe_is_privileged(struct genwqe_dev *cd)
|
||||
{
|
||||
return cd->is_privileged;
|
||||
}
|
||||
|
||||
#endif /* __CARD_BASE_H__ */
|
||||
1376
drivers/misc/genwqe/card_ddcb.c
Normal file
1376
drivers/misc/genwqe/card_ddcb.c
Normal file
File diff suppressed because it is too large
Load diff
188
drivers/misc/genwqe/card_ddcb.h
Normal file
188
drivers/misc/genwqe/card_ddcb.h
Normal file
|
|
@ -0,0 +1,188 @@
|
|||
#ifndef __CARD_DDCB_H__
|
||||
#define __CARD_DDCB_H__
|
||||
|
||||
/**
|
||||
* IBM Accelerator Family 'GenWQE'
|
||||
*
|
||||
* (C) Copyright IBM Corp. 2013
|
||||
*
|
||||
* Author: Frank Haverkamp <haver@linux.vnet.ibm.com>
|
||||
* Author: Joerg-Stephan Vogt <jsvogt@de.ibm.com>
|
||||
* Author: Michael Jung <mijung@de.ibm.com>
|
||||
* Author: Michael Ruettger <michael@ibmra.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <asm/byteorder.h>
|
||||
|
||||
#include "genwqe_driver.h"
|
||||
#include "card_base.h"
|
||||
|
||||
/**
|
||||
* struct ddcb - Device Driver Control Block DDCB
|
||||
* @hsi: Hardware software interlock
|
||||
* @shi: Software hardware interlock. Hsi and shi are used to interlock
|
||||
* software and hardware activities. We are using a compare and
|
||||
* swap operation to ensure that there are no races when
|
||||
* activating new DDCBs on the queue, or when we need to
|
||||
* purge a DDCB from a running queue.
|
||||
* @acfunc: Accelerator function addresses a unit within the chip
|
||||
* @cmd: Command to work on
|
||||
* @cmdopts_16: Options for the command
|
||||
* @asiv: Input data
|
||||
* @asv: Output data
|
||||
*
|
||||
* The DDCB data format is big endian. Multiple consequtive DDBCs form
|
||||
* a DDCB queue.
|
||||
*/
|
||||
#define ASIV_LENGTH 104 /* Old specification without ATS field */
|
||||
#define ASIV_LENGTH_ATS 96 /* New specification with ATS field */
|
||||
#define ASV_LENGTH 64
|
||||
|
||||
struct ddcb {
|
||||
union {
|
||||
__be32 icrc_hsi_shi_32; /* iCRC, Hardware/SW interlock */
|
||||
struct {
|
||||
__be16 icrc_16;
|
||||
u8 hsi;
|
||||
u8 shi;
|
||||
};
|
||||
};
|
||||
u8 pre; /* Preamble */
|
||||
u8 xdir; /* Execution Directives */
|
||||
__be16 seqnum_16; /* Sequence Number */
|
||||
|
||||
u8 acfunc; /* Accelerator Function.. */
|
||||
u8 cmd; /* Command. */
|
||||
__be16 cmdopts_16; /* Command Options */
|
||||
u8 sur; /* Status Update Rate */
|
||||
u8 psp; /* Protection Section Pointer */
|
||||
__be16 rsvd_0e_16; /* Reserved invariant */
|
||||
|
||||
__be64 fwiv_64; /* Firmware Invariant. */
|
||||
|
||||
union {
|
||||
struct {
|
||||
__be64 ats_64; /* Address Translation Spec */
|
||||
u8 asiv[ASIV_LENGTH_ATS]; /* New ASIV */
|
||||
} n;
|
||||
u8 __asiv[ASIV_LENGTH]; /* obsolete */
|
||||
};
|
||||
u8 asv[ASV_LENGTH]; /* Appl Spec Variant */
|
||||
|
||||
__be16 rsvd_c0_16; /* Reserved Variant */
|
||||
__be16 vcrc_16; /* Variant CRC */
|
||||
__be32 rsvd_32; /* Reserved unprotected */
|
||||
|
||||
__be64 deque_ts_64; /* Deque Time Stamp. */
|
||||
|
||||
__be16 retc_16; /* Return Code */
|
||||
__be16 attn_16; /* Attention/Extended Error Codes */
|
||||
__be32 progress_32; /* Progress indicator. */
|
||||
|
||||
__be64 cmplt_ts_64; /* Completion Time Stamp. */
|
||||
|
||||
/* The following layout matches the new service layer format */
|
||||
__be32 ibdc_32; /* Inbound Data Count (* 256) */
|
||||
__be32 obdc_32; /* Outbound Data Count (* 256) */
|
||||
|
||||
__be64 rsvd_SLH_64; /* Reserved for hardware */
|
||||
union { /* private data for driver */
|
||||
u8 priv[8];
|
||||
__be64 priv_64;
|
||||
};
|
||||
__be64 disp_ts_64; /* Dispatch TimeStamp */
|
||||
} __attribute__((__packed__));
|
||||
|
||||
/* CRC polynomials for DDCB */
|
||||
#define CRC16_POLYNOMIAL 0x1021
|
||||
|
||||
/*
|
||||
* SHI: Software to Hardware Interlock
|
||||
* This 1 byte field is written by software to interlock the
|
||||
* movement of one queue entry to another with the hardware in the
|
||||
* chip.
|
||||
*/
|
||||
#define DDCB_SHI_INTR 0x04 /* Bit 2 */
|
||||
#define DDCB_SHI_PURGE 0x02 /* Bit 1 */
|
||||
#define DDCB_SHI_NEXT 0x01 /* Bit 0 */
|
||||
|
||||
/*
|
||||
* HSI: Hardware to Software interlock
|
||||
* This 1 byte field is written by hardware to interlock the movement
|
||||
* of one queue entry to another with the software in the chip.
|
||||
*/
|
||||
#define DDCB_HSI_COMPLETED 0x40 /* Bit 6 */
|
||||
#define DDCB_HSI_FETCHED 0x04 /* Bit 2 */
|
||||
|
||||
/*
|
||||
* Accessing HSI/SHI is done 32-bit wide
|
||||
* Normally 16-bit access would work too, but on some platforms the
|
||||
* 16 compare and swap operation is not supported. Therefore
|
||||
* switching to 32-bit such that those platforms will work too.
|
||||
*
|
||||
* iCRC HSI/SHI
|
||||
*/
|
||||
#define DDCB_INTR_BE32 cpu_to_be32(0x00000004)
|
||||
#define DDCB_PURGE_BE32 cpu_to_be32(0x00000002)
|
||||
#define DDCB_NEXT_BE32 cpu_to_be32(0x00000001)
|
||||
#define DDCB_COMPLETED_BE32 cpu_to_be32(0x00004000)
|
||||
#define DDCB_FETCHED_BE32 cpu_to_be32(0x00000400)
|
||||
|
||||
/* Definitions of DDCB presets */
|
||||
#define DDCB_PRESET_PRE 0x80
|
||||
#define ICRC_LENGTH(n) ((n) + 8 + 8 + 8) /* used ASIV + hdr fields */
|
||||
#define VCRC_LENGTH(n) ((n)) /* used ASV */
|
||||
|
||||
/*
|
||||
* Genwqe Scatter Gather list
|
||||
* Each element has up to 8 entries.
|
||||
* The chaining element is element 0 cause of prefetching needs.
|
||||
*/
|
||||
|
||||
/*
|
||||
* 0b0110 Chained descriptor. The descriptor is describing the next
|
||||
* descriptor list.
|
||||
*/
|
||||
#define SG_CHAINED (0x6)
|
||||
|
||||
/*
|
||||
* 0b0010 First entry of a descriptor list. Start from a Buffer-Empty
|
||||
* condition.
|
||||
*/
|
||||
#define SG_DATA (0x2)
|
||||
|
||||
/*
|
||||
* 0b0000 Early terminator. This is the last entry on the list
|
||||
* irregardless of the length indicated.
|
||||
*/
|
||||
#define SG_END_LIST (0x0)
|
||||
|
||||
/**
|
||||
* struct sglist - Scatter gather list
|
||||
* @target_addr: Either a dma addr of memory to work on or a
|
||||
* dma addr or a subsequent sglist block.
|
||||
* @len: Length of the data block.
|
||||
* @flags: See above.
|
||||
*
|
||||
* Depending on the command the GenWQE card can use a scatter gather
|
||||
* list to describe the memory it works on. Always 8 sg_entry's form
|
||||
* a block.
|
||||
*/
|
||||
struct sg_entry {
|
||||
__be64 target_addr;
|
||||
__be32 len;
|
||||
__be32 flags;
|
||||
};
|
||||
|
||||
#endif /* __CARD_DDCB_H__ */
|
||||
500
drivers/misc/genwqe/card_debugfs.c
Normal file
500
drivers/misc/genwqe/card_debugfs.c
Normal file
|
|
@ -0,0 +1,500 @@
|
|||
/**
|
||||
* IBM Accelerator Family 'GenWQE'
|
||||
*
|
||||
* (C) Copyright IBM Corp. 2013
|
||||
*
|
||||
* Author: Frank Haverkamp <haver@linux.vnet.ibm.com>
|
||||
* Author: Joerg-Stephan Vogt <jsvogt@de.ibm.com>
|
||||
* Author: Michael Jung <mijung@de.ibm.com>
|
||||
* Author: Michael Ruettger <michael@ibmra.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License (version 2 only)
|
||||
* as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Debugfs interfaces for the GenWQE card. Help to debug potential
|
||||
* problems. Dump internal chip state for debugging and failure
|
||||
* determination.
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/uaccess.h>
|
||||
|
||||
#include "card_base.h"
|
||||
#include "card_ddcb.h"
|
||||
|
||||
#define GENWQE_DEBUGFS_RO(_name, _showfn) \
|
||||
static int genwqe_debugfs_##_name##_open(struct inode *inode, \
|
||||
struct file *file) \
|
||||
{ \
|
||||
return single_open(file, _showfn, inode->i_private); \
|
||||
} \
|
||||
static const struct file_operations genwqe_##_name##_fops = { \
|
||||
.open = genwqe_debugfs_##_name##_open, \
|
||||
.read = seq_read, \
|
||||
.llseek = seq_lseek, \
|
||||
.release = single_release, \
|
||||
}
|
||||
|
||||
static void dbg_uidn_show(struct seq_file *s, struct genwqe_reg *regs,
|
||||
int entries)
|
||||
{
|
||||
unsigned int i;
|
||||
u32 v_hi, v_lo;
|
||||
|
||||
for (i = 0; i < entries; i++) {
|
||||
v_hi = (regs[i].val >> 32) & 0xffffffff;
|
||||
v_lo = (regs[i].val) & 0xffffffff;
|
||||
|
||||
seq_printf(s, " 0x%08x 0x%08x 0x%08x 0x%08x EXT_ERR_REC\n",
|
||||
regs[i].addr, regs[i].idx, v_hi, v_lo);
|
||||
}
|
||||
}
|
||||
|
||||
static int curr_dbg_uidn_show(struct seq_file *s, void *unused, int uid)
|
||||
{
|
||||
struct genwqe_dev *cd = s->private;
|
||||
int entries;
|
||||
struct genwqe_reg *regs;
|
||||
|
||||
entries = genwqe_ffdc_buff_size(cd, uid);
|
||||
if (entries < 0)
|
||||
return -EINVAL;
|
||||
|
||||
if (entries == 0)
|
||||
return 0;
|
||||
|
||||
regs = kcalloc(entries, sizeof(*regs), GFP_KERNEL);
|
||||
if (regs == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
genwqe_stop_traps(cd); /* halt the traps while dumping data */
|
||||
genwqe_ffdc_buff_read(cd, uid, regs, entries);
|
||||
genwqe_start_traps(cd);
|
||||
|
||||
dbg_uidn_show(s, regs, entries);
|
||||
kfree(regs);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int genwqe_curr_dbg_uid0_show(struct seq_file *s, void *unused)
|
||||
{
|
||||
return curr_dbg_uidn_show(s, unused, 0);
|
||||
}
|
||||
|
||||
GENWQE_DEBUGFS_RO(curr_dbg_uid0, genwqe_curr_dbg_uid0_show);
|
||||
|
||||
static int genwqe_curr_dbg_uid1_show(struct seq_file *s, void *unused)
|
||||
{
|
||||
return curr_dbg_uidn_show(s, unused, 1);
|
||||
}
|
||||
|
||||
GENWQE_DEBUGFS_RO(curr_dbg_uid1, genwqe_curr_dbg_uid1_show);
|
||||
|
||||
static int genwqe_curr_dbg_uid2_show(struct seq_file *s, void *unused)
|
||||
{
|
||||
return curr_dbg_uidn_show(s, unused, 2);
|
||||
}
|
||||
|
||||
GENWQE_DEBUGFS_RO(curr_dbg_uid2, genwqe_curr_dbg_uid2_show);
|
||||
|
||||
static int prev_dbg_uidn_show(struct seq_file *s, void *unused, int uid)
|
||||
{
|
||||
struct genwqe_dev *cd = s->private;
|
||||
|
||||
dbg_uidn_show(s, cd->ffdc[uid].regs, cd->ffdc[uid].entries);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int genwqe_prev_dbg_uid0_show(struct seq_file *s, void *unused)
|
||||
{
|
||||
return prev_dbg_uidn_show(s, unused, 0);
|
||||
}
|
||||
|
||||
GENWQE_DEBUGFS_RO(prev_dbg_uid0, genwqe_prev_dbg_uid0_show);
|
||||
|
||||
static int genwqe_prev_dbg_uid1_show(struct seq_file *s, void *unused)
|
||||
{
|
||||
return prev_dbg_uidn_show(s, unused, 1);
|
||||
}
|
||||
|
||||
GENWQE_DEBUGFS_RO(prev_dbg_uid1, genwqe_prev_dbg_uid1_show);
|
||||
|
||||
static int genwqe_prev_dbg_uid2_show(struct seq_file *s, void *unused)
|
||||
{
|
||||
return prev_dbg_uidn_show(s, unused, 2);
|
||||
}
|
||||
|
||||
GENWQE_DEBUGFS_RO(prev_dbg_uid2, genwqe_prev_dbg_uid2_show);
|
||||
|
||||
static int genwqe_curr_regs_show(struct seq_file *s, void *unused)
|
||||
{
|
||||
struct genwqe_dev *cd = s->private;
|
||||
unsigned int i;
|
||||
struct genwqe_reg *regs;
|
||||
|
||||
regs = kcalloc(GENWQE_FFDC_REGS, sizeof(*regs), GFP_KERNEL);
|
||||
if (regs == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
genwqe_stop_traps(cd);
|
||||
genwqe_read_ffdc_regs(cd, regs, GENWQE_FFDC_REGS, 1);
|
||||
genwqe_start_traps(cd);
|
||||
|
||||
for (i = 0; i < GENWQE_FFDC_REGS; i++) {
|
||||
if (regs[i].addr == 0xffffffff)
|
||||
break; /* invalid entries */
|
||||
|
||||
if (regs[i].val == 0x0ull)
|
||||
continue; /* do not print 0x0 FIRs */
|
||||
|
||||
seq_printf(s, " 0x%08x 0x%016llx\n",
|
||||
regs[i].addr, regs[i].val);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
GENWQE_DEBUGFS_RO(curr_regs, genwqe_curr_regs_show);
|
||||
|
||||
static int genwqe_prev_regs_show(struct seq_file *s, void *unused)
|
||||
{
|
||||
struct genwqe_dev *cd = s->private;
|
||||
unsigned int i;
|
||||
struct genwqe_reg *regs = cd->ffdc[GENWQE_DBG_REGS].regs;
|
||||
|
||||
if (regs == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
for (i = 0; i < GENWQE_FFDC_REGS; i++) {
|
||||
if (regs[i].addr == 0xffffffff)
|
||||
break; /* invalid entries */
|
||||
|
||||
if (regs[i].val == 0x0ull)
|
||||
continue; /* do not print 0x0 FIRs */
|
||||
|
||||
seq_printf(s, " 0x%08x 0x%016llx\n",
|
||||
regs[i].addr, regs[i].val);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
GENWQE_DEBUGFS_RO(prev_regs, genwqe_prev_regs_show);
|
||||
|
||||
static int genwqe_jtimer_show(struct seq_file *s, void *unused)
|
||||
{
|
||||
struct genwqe_dev *cd = s->private;
|
||||
unsigned int vf_num;
|
||||
u64 jtimer;
|
||||
|
||||
jtimer = genwqe_read_vreg(cd, IO_SLC_VF_APPJOB_TIMEOUT, 0);
|
||||
seq_printf(s, " PF 0x%016llx %d msec\n", jtimer,
|
||||
genwqe_pf_jobtimeout_msec);
|
||||
|
||||
for (vf_num = 0; vf_num < cd->num_vfs; vf_num++) {
|
||||
jtimer = genwqe_read_vreg(cd, IO_SLC_VF_APPJOB_TIMEOUT,
|
||||
vf_num + 1);
|
||||
seq_printf(s, " VF%-2d 0x%016llx %d msec\n", vf_num, jtimer,
|
||||
cd->vf_jobtimeout_msec[vf_num]);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
GENWQE_DEBUGFS_RO(jtimer, genwqe_jtimer_show);
|
||||
|
||||
static int genwqe_queue_working_time_show(struct seq_file *s, void *unused)
|
||||
{
|
||||
struct genwqe_dev *cd = s->private;
|
||||
unsigned int vf_num;
|
||||
u64 t;
|
||||
|
||||
t = genwqe_read_vreg(cd, IO_SLC_VF_QUEUE_WTIME, 0);
|
||||
seq_printf(s, " PF 0x%016llx\n", t);
|
||||
|
||||
for (vf_num = 0; vf_num < cd->num_vfs; vf_num++) {
|
||||
t = genwqe_read_vreg(cd, IO_SLC_VF_QUEUE_WTIME, vf_num + 1);
|
||||
seq_printf(s, " VF%-2d 0x%016llx\n", vf_num, t);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
GENWQE_DEBUGFS_RO(queue_working_time, genwqe_queue_working_time_show);
|
||||
|
||||
static int genwqe_ddcb_info_show(struct seq_file *s, void *unused)
|
||||
{
|
||||
struct genwqe_dev *cd = s->private;
|
||||
unsigned int i;
|
||||
struct ddcb_queue *queue;
|
||||
struct ddcb *pddcb;
|
||||
|
||||
queue = &cd->queue;
|
||||
seq_puts(s, "DDCB QUEUE:\n");
|
||||
seq_printf(s, " ddcb_max: %d\n"
|
||||
" ddcb_daddr: %016llx - %016llx\n"
|
||||
" ddcb_vaddr: %016llx\n"
|
||||
" ddcbs_in_flight: %u\n"
|
||||
" ddcbs_max_in_flight: %u\n"
|
||||
" ddcbs_completed: %u\n"
|
||||
" busy: %u\n"
|
||||
" irqs_processed: %u\n",
|
||||
queue->ddcb_max, (long long)queue->ddcb_daddr,
|
||||
(long long)queue->ddcb_daddr +
|
||||
(queue->ddcb_max * DDCB_LENGTH),
|
||||
(long long)queue->ddcb_vaddr, queue->ddcbs_in_flight,
|
||||
queue->ddcbs_max_in_flight, queue->ddcbs_completed,
|
||||
queue->busy, cd->irqs_processed);
|
||||
|
||||
/* Hardware State */
|
||||
seq_printf(s, " 0x%08x 0x%016llx IO_QUEUE_CONFIG\n"
|
||||
" 0x%08x 0x%016llx IO_QUEUE_STATUS\n"
|
||||
" 0x%08x 0x%016llx IO_QUEUE_SEGMENT\n"
|
||||
" 0x%08x 0x%016llx IO_QUEUE_INITSQN\n"
|
||||
" 0x%08x 0x%016llx IO_QUEUE_WRAP\n"
|
||||
" 0x%08x 0x%016llx IO_QUEUE_OFFSET\n"
|
||||
" 0x%08x 0x%016llx IO_QUEUE_WTIME\n"
|
||||
" 0x%08x 0x%016llx IO_QUEUE_ERRCNTS\n"
|
||||
" 0x%08x 0x%016llx IO_QUEUE_LRW\n",
|
||||
queue->IO_QUEUE_CONFIG,
|
||||
__genwqe_readq(cd, queue->IO_QUEUE_CONFIG),
|
||||
queue->IO_QUEUE_STATUS,
|
||||
__genwqe_readq(cd, queue->IO_QUEUE_STATUS),
|
||||
queue->IO_QUEUE_SEGMENT,
|
||||
__genwqe_readq(cd, queue->IO_QUEUE_SEGMENT),
|
||||
queue->IO_QUEUE_INITSQN,
|
||||
__genwqe_readq(cd, queue->IO_QUEUE_INITSQN),
|
||||
queue->IO_QUEUE_WRAP,
|
||||
__genwqe_readq(cd, queue->IO_QUEUE_WRAP),
|
||||
queue->IO_QUEUE_OFFSET,
|
||||
__genwqe_readq(cd, queue->IO_QUEUE_OFFSET),
|
||||
queue->IO_QUEUE_WTIME,
|
||||
__genwqe_readq(cd, queue->IO_QUEUE_WTIME),
|
||||
queue->IO_QUEUE_ERRCNTS,
|
||||
__genwqe_readq(cd, queue->IO_QUEUE_ERRCNTS),
|
||||
queue->IO_QUEUE_LRW,
|
||||
__genwqe_readq(cd, queue->IO_QUEUE_LRW));
|
||||
|
||||
seq_printf(s, "DDCB list (ddcb_act=%d/ddcb_next=%d):\n",
|
||||
queue->ddcb_act, queue->ddcb_next);
|
||||
|
||||
pddcb = queue->ddcb_vaddr;
|
||||
for (i = 0; i < queue->ddcb_max; i++) {
|
||||
seq_printf(s, " %-3d: RETC=%03x SEQ=%04x HSI/SHI=%02x/%02x ",
|
||||
i, be16_to_cpu(pddcb->retc_16),
|
||||
be16_to_cpu(pddcb->seqnum_16),
|
||||
pddcb->hsi, pddcb->shi);
|
||||
seq_printf(s, "PRIV=%06llx CMD=%02x\n",
|
||||
be64_to_cpu(pddcb->priv_64), pddcb->cmd);
|
||||
pddcb++;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
GENWQE_DEBUGFS_RO(ddcb_info, genwqe_ddcb_info_show);
|
||||
|
||||
static int genwqe_info_show(struct seq_file *s, void *unused)
|
||||
{
|
||||
struct genwqe_dev *cd = s->private;
|
||||
u16 val16, type;
|
||||
u64 app_id, slu_id, bitstream = -1;
|
||||
struct pci_dev *pci_dev = cd->pci_dev;
|
||||
|
||||
slu_id = __genwqe_readq(cd, IO_SLU_UNITCFG);
|
||||
app_id = __genwqe_readq(cd, IO_APP_UNITCFG);
|
||||
|
||||
if (genwqe_is_privileged(cd))
|
||||
bitstream = __genwqe_readq(cd, IO_SLU_BITSTREAM);
|
||||
|
||||
val16 = (u16)(slu_id & 0x0fLLU);
|
||||
type = (u16)((slu_id >> 20) & 0xffLLU);
|
||||
|
||||
seq_printf(s, "%s driver version: %s\n"
|
||||
" Device Name/Type: %s %s CardIdx: %d\n"
|
||||
" SLU/APP Config : 0x%016llx/0x%016llx\n"
|
||||
" Build Date : %u/%x/%u\n"
|
||||
" Base Clock : %u MHz\n"
|
||||
" Arch/SVN Release: %u/%llx\n"
|
||||
" Bitstream : %llx\n",
|
||||
GENWQE_DEVNAME, DRV_VERS_STRING, dev_name(&pci_dev->dev),
|
||||
genwqe_is_privileged(cd) ?
|
||||
"Physical" : "Virtual or no SR-IOV",
|
||||
cd->card_idx, slu_id, app_id,
|
||||
(u16)((slu_id >> 12) & 0x0fLLU), /* month */
|
||||
(u16)((slu_id >> 4) & 0xffLLU), /* day */
|
||||
(u16)((slu_id >> 16) & 0x0fLLU) + 2010, /* year */
|
||||
genwqe_base_clock_frequency(cd),
|
||||
(u16)((slu_id >> 32) & 0xffLLU), slu_id >> 40,
|
||||
bitstream);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
GENWQE_DEBUGFS_RO(info, genwqe_info_show);
|
||||
|
||||
int genwqe_init_debugfs(struct genwqe_dev *cd)
|
||||
{
|
||||
struct dentry *root;
|
||||
struct dentry *file;
|
||||
int ret;
|
||||
char card_name[64];
|
||||
char name[64];
|
||||
unsigned int i;
|
||||
|
||||
sprintf(card_name, "%s%u_card", GENWQE_DEVNAME, cd->card_idx);
|
||||
|
||||
root = debugfs_create_dir(card_name, cd->debugfs_genwqe);
|
||||
if (!root) {
|
||||
ret = -ENOMEM;
|
||||
goto err0;
|
||||
}
|
||||
|
||||
/* non privileged interfaces are done here */
|
||||
file = debugfs_create_file("ddcb_info", S_IRUGO, root, cd,
|
||||
&genwqe_ddcb_info_fops);
|
||||
if (!file) {
|
||||
ret = -ENOMEM;
|
||||
goto err1;
|
||||
}
|
||||
|
||||
file = debugfs_create_file("info", S_IRUGO, root, cd,
|
||||
&genwqe_info_fops);
|
||||
if (!file) {
|
||||
ret = -ENOMEM;
|
||||
goto err1;
|
||||
}
|
||||
|
||||
file = debugfs_create_x64("err_inject", 0666, root, &cd->err_inject);
|
||||
if (!file) {
|
||||
ret = -ENOMEM;
|
||||
goto err1;
|
||||
}
|
||||
|
||||
file = debugfs_create_u32("ddcb_software_timeout", 0666, root,
|
||||
&cd->ddcb_software_timeout);
|
||||
if (!file) {
|
||||
ret = -ENOMEM;
|
||||
goto err1;
|
||||
}
|
||||
|
||||
file = debugfs_create_u32("kill_timeout", 0666, root,
|
||||
&cd->kill_timeout);
|
||||
if (!file) {
|
||||
ret = -ENOMEM;
|
||||
goto err1;
|
||||
}
|
||||
|
||||
/* privileged interfaces follow here */
|
||||
if (!genwqe_is_privileged(cd)) {
|
||||
cd->debugfs_root = root;
|
||||
return 0;
|
||||
}
|
||||
|
||||
file = debugfs_create_file("curr_regs", S_IRUGO, root, cd,
|
||||
&genwqe_curr_regs_fops);
|
||||
if (!file) {
|
||||
ret = -ENOMEM;
|
||||
goto err1;
|
||||
}
|
||||
|
||||
file = debugfs_create_file("curr_dbg_uid0", S_IRUGO, root, cd,
|
||||
&genwqe_curr_dbg_uid0_fops);
|
||||
if (!file) {
|
||||
ret = -ENOMEM;
|
||||
goto err1;
|
||||
}
|
||||
|
||||
file = debugfs_create_file("curr_dbg_uid1", S_IRUGO, root, cd,
|
||||
&genwqe_curr_dbg_uid1_fops);
|
||||
if (!file) {
|
||||
ret = -ENOMEM;
|
||||
goto err1;
|
||||
}
|
||||
|
||||
file = debugfs_create_file("curr_dbg_uid2", S_IRUGO, root, cd,
|
||||
&genwqe_curr_dbg_uid2_fops);
|
||||
if (!file) {
|
||||
ret = -ENOMEM;
|
||||
goto err1;
|
||||
}
|
||||
|
||||
file = debugfs_create_file("prev_regs", S_IRUGO, root, cd,
|
||||
&genwqe_prev_regs_fops);
|
||||
if (!file) {
|
||||
ret = -ENOMEM;
|
||||
goto err1;
|
||||
}
|
||||
|
||||
file = debugfs_create_file("prev_dbg_uid0", S_IRUGO, root, cd,
|
||||
&genwqe_prev_dbg_uid0_fops);
|
||||
if (!file) {
|
||||
ret = -ENOMEM;
|
||||
goto err1;
|
||||
}
|
||||
|
||||
file = debugfs_create_file("prev_dbg_uid1", S_IRUGO, root, cd,
|
||||
&genwqe_prev_dbg_uid1_fops);
|
||||
if (!file) {
|
||||
ret = -ENOMEM;
|
||||
goto err1;
|
||||
}
|
||||
|
||||
file = debugfs_create_file("prev_dbg_uid2", S_IRUGO, root, cd,
|
||||
&genwqe_prev_dbg_uid2_fops);
|
||||
if (!file) {
|
||||
ret = -ENOMEM;
|
||||
goto err1;
|
||||
}
|
||||
|
||||
for (i = 0; i < GENWQE_MAX_VFS; i++) {
|
||||
sprintf(name, "vf%d_jobtimeout_msec", i);
|
||||
|
||||
file = debugfs_create_u32(name, 0666, root,
|
||||
&cd->vf_jobtimeout_msec[i]);
|
||||
if (!file) {
|
||||
ret = -ENOMEM;
|
||||
goto err1;
|
||||
}
|
||||
}
|
||||
|
||||
file = debugfs_create_file("jobtimer", S_IRUGO, root, cd,
|
||||
&genwqe_jtimer_fops);
|
||||
if (!file) {
|
||||
ret = -ENOMEM;
|
||||
goto err1;
|
||||
}
|
||||
|
||||
file = debugfs_create_file("queue_working_time", S_IRUGO, root, cd,
|
||||
&genwqe_queue_working_time_fops);
|
||||
if (!file) {
|
||||
ret = -ENOMEM;
|
||||
goto err1;
|
||||
}
|
||||
|
||||
file = debugfs_create_u32("skip_recovery", 0666, root,
|
||||
&cd->skip_recovery);
|
||||
if (!file) {
|
||||
ret = -ENOMEM;
|
||||
goto err1;
|
||||
}
|
||||
|
||||
cd->debugfs_root = root;
|
||||
return 0;
|
||||
err1:
|
||||
debugfs_remove_recursive(root);
|
||||
err0:
|
||||
return ret;
|
||||
}
|
||||
|
||||
void genqwe_exit_debugfs(struct genwqe_dev *cd)
|
||||
{
|
||||
debugfs_remove_recursive(cd->debugfs_root);
|
||||
}
|
||||
1415
drivers/misc/genwqe/card_dev.c
Normal file
1415
drivers/misc/genwqe/card_dev.c
Normal file
File diff suppressed because it is too large
Load diff
288
drivers/misc/genwqe/card_sysfs.c
Normal file
288
drivers/misc/genwqe/card_sysfs.c
Normal file
|
|
@ -0,0 +1,288 @@
|
|||
/**
|
||||
* IBM Accelerator Family 'GenWQE'
|
||||
*
|
||||
* (C) Copyright IBM Corp. 2013
|
||||
*
|
||||
* Author: Frank Haverkamp <haver@linux.vnet.ibm.com>
|
||||
* Author: Joerg-Stephan Vogt <jsvogt@de.ibm.com>
|
||||
* Author: Michael Jung <mijung@de.ibm.com>
|
||||
* Author: Michael Ruettger <michael@ibmra.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License (version 2 only)
|
||||
* as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Sysfs interfaces for the GenWQE card. There are attributes to query
|
||||
* the version of the bitstream as well as some for the driver. For
|
||||
* debugging, please also see the debugfs interfaces of this driver.
|
||||
*/
|
||||
|
||||
#include <linux/version.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/fs.h>
|
||||
#include <linux/sysfs.h>
|
||||
#include <linux/ctype.h>
|
||||
#include <linux/device.h>
|
||||
|
||||
#include "card_base.h"
|
||||
#include "card_ddcb.h"
|
||||
|
||||
static const char * const genwqe_types[] = {
|
||||
[GENWQE_TYPE_ALTERA_230] = "GenWQE4-230",
|
||||
[GENWQE_TYPE_ALTERA_530] = "GenWQE4-530",
|
||||
[GENWQE_TYPE_ALTERA_A4] = "GenWQE5-A4",
|
||||
[GENWQE_TYPE_ALTERA_A7] = "GenWQE5-A7",
|
||||
};
|
||||
|
||||
static ssize_t status_show(struct device *dev, struct device_attribute *attr,
|
||||
char *buf)
|
||||
{
|
||||
struct genwqe_dev *cd = dev_get_drvdata(dev);
|
||||
const char *cs[GENWQE_CARD_STATE_MAX] = { "unused", "used", "error" };
|
||||
|
||||
return sprintf(buf, "%s\n", cs[cd->card_state]);
|
||||
}
|
||||
static DEVICE_ATTR_RO(status);
|
||||
|
||||
static ssize_t appid_show(struct device *dev, struct device_attribute *attr,
|
||||
char *buf)
|
||||
{
|
||||
char app_name[5];
|
||||
struct genwqe_dev *cd = dev_get_drvdata(dev);
|
||||
|
||||
genwqe_read_app_id(cd, app_name, sizeof(app_name));
|
||||
return sprintf(buf, "%s\n", app_name);
|
||||
}
|
||||
static DEVICE_ATTR_RO(appid);
|
||||
|
||||
static ssize_t version_show(struct device *dev, struct device_attribute *attr,
|
||||
char *buf)
|
||||
{
|
||||
u64 slu_id, app_id;
|
||||
struct genwqe_dev *cd = dev_get_drvdata(dev);
|
||||
|
||||
slu_id = __genwqe_readq(cd, IO_SLU_UNITCFG);
|
||||
app_id = __genwqe_readq(cd, IO_APP_UNITCFG);
|
||||
|
||||
return sprintf(buf, "%016llx.%016llx\n", slu_id, app_id);
|
||||
}
|
||||
static DEVICE_ATTR_RO(version);
|
||||
|
||||
static ssize_t type_show(struct device *dev, struct device_attribute *attr,
|
||||
char *buf)
|
||||
{
|
||||
u8 card_type;
|
||||
struct genwqe_dev *cd = dev_get_drvdata(dev);
|
||||
|
||||
card_type = genwqe_card_type(cd);
|
||||
return sprintf(buf, "%s\n", (card_type >= ARRAY_SIZE(genwqe_types)) ?
|
||||
"invalid" : genwqe_types[card_type]);
|
||||
}
|
||||
static DEVICE_ATTR_RO(type);
|
||||
|
||||
static ssize_t driver_show(struct device *dev, struct device_attribute *attr,
|
||||
char *buf)
|
||||
{
|
||||
return sprintf(buf, "%s\n", DRV_VERS_STRING);
|
||||
}
|
||||
static DEVICE_ATTR_RO(driver);
|
||||
|
||||
static ssize_t tempsens_show(struct device *dev, struct device_attribute *attr,
|
||||
char *buf)
|
||||
{
|
||||
u64 tempsens;
|
||||
struct genwqe_dev *cd = dev_get_drvdata(dev);
|
||||
|
||||
tempsens = __genwqe_readq(cd, IO_SLU_TEMPERATURE_SENSOR);
|
||||
return sprintf(buf, "%016llx\n", tempsens);
|
||||
}
|
||||
static DEVICE_ATTR_RO(tempsens);
|
||||
|
||||
static ssize_t freerunning_timer_show(struct device *dev,
|
||||
struct device_attribute *attr,
|
||||
char *buf)
|
||||
{
|
||||
u64 t;
|
||||
struct genwqe_dev *cd = dev_get_drvdata(dev);
|
||||
|
||||
t = __genwqe_readq(cd, IO_SLC_FREE_RUNNING_TIMER);
|
||||
return sprintf(buf, "%016llx\n", t);
|
||||
}
|
||||
static DEVICE_ATTR_RO(freerunning_timer);
|
||||
|
||||
static ssize_t queue_working_time_show(struct device *dev,
|
||||
struct device_attribute *attr,
|
||||
char *buf)
|
||||
{
|
||||
u64 t;
|
||||
struct genwqe_dev *cd = dev_get_drvdata(dev);
|
||||
|
||||
t = __genwqe_readq(cd, IO_SLC_QUEUE_WTIME);
|
||||
return sprintf(buf, "%016llx\n", t);
|
||||
}
|
||||
static DEVICE_ATTR_RO(queue_working_time);
|
||||
|
||||
static ssize_t base_clock_show(struct device *dev,
|
||||
struct device_attribute *attr,
|
||||
char *buf)
|
||||
{
|
||||
u64 base_clock;
|
||||
struct genwqe_dev *cd = dev_get_drvdata(dev);
|
||||
|
||||
base_clock = genwqe_base_clock_frequency(cd);
|
||||
return sprintf(buf, "%lld\n", base_clock);
|
||||
}
|
||||
static DEVICE_ATTR_RO(base_clock);
|
||||
|
||||
/**
|
||||
* curr_bitstream_show() - Show the current bitstream id
|
||||
*
|
||||
* There is a bug in some old versions of the CPLD which selects the
|
||||
* bitstream, which causes the IO_SLU_BITSTREAM register to report
|
||||
* unreliable data in very rare cases. This makes this sysfs
|
||||
* unreliable up to the point were a new CPLD version is being used.
|
||||
*
|
||||
* Unfortunately there is no automatic way yet to query the CPLD
|
||||
* version, such that you need to manually ensure via programming
|
||||
* tools that you have a recent version of the CPLD software.
|
||||
*
|
||||
* The proposed circumvention is to use a special recovery bitstream
|
||||
* on the backup partition (0) to identify problems while loading the
|
||||
* image.
|
||||
*/
|
||||
static ssize_t curr_bitstream_show(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
int curr_bitstream;
|
||||
struct genwqe_dev *cd = dev_get_drvdata(dev);
|
||||
|
||||
curr_bitstream = __genwqe_readq(cd, IO_SLU_BITSTREAM) & 0x1;
|
||||
return sprintf(buf, "%d\n", curr_bitstream);
|
||||
}
|
||||
static DEVICE_ATTR_RO(curr_bitstream);
|
||||
|
||||
/**
|
||||
* next_bitstream_show() - Show the next activated bitstream
|
||||
*
|
||||
* IO_SLC_CFGREG_SOFTRESET: This register can only be accessed by the PF.
|
||||
*/
|
||||
static ssize_t next_bitstream_show(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
int next_bitstream;
|
||||
struct genwqe_dev *cd = dev_get_drvdata(dev);
|
||||
|
||||
switch ((cd->softreset & 0xc) >> 2) {
|
||||
case 0x2:
|
||||
next_bitstream = 0;
|
||||
break;
|
||||
case 0x3:
|
||||
next_bitstream = 1;
|
||||
break;
|
||||
default:
|
||||
next_bitstream = -1;
|
||||
break; /* error */
|
||||
}
|
||||
return sprintf(buf, "%d\n", next_bitstream);
|
||||
}
|
||||
|
||||
static ssize_t next_bitstream_store(struct device *dev,
|
||||
struct device_attribute *attr,
|
||||
const char *buf, size_t count)
|
||||
{
|
||||
int partition;
|
||||
struct genwqe_dev *cd = dev_get_drvdata(dev);
|
||||
|
||||
if (kstrtoint(buf, 0, &partition) < 0)
|
||||
return -EINVAL;
|
||||
|
||||
switch (partition) {
|
||||
case 0x0:
|
||||
cd->softreset = 0x78;
|
||||
break;
|
||||
case 0x1:
|
||||
cd->softreset = 0x7c;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
__genwqe_writeq(cd, IO_SLC_CFGREG_SOFTRESET, cd->softreset);
|
||||
return count;
|
||||
}
|
||||
static DEVICE_ATTR_RW(next_bitstream);
|
||||
|
||||
/*
|
||||
* Create device_attribute structures / params: name, mode, show, store
|
||||
* additional flag if valid in VF
|
||||
*/
|
||||
static struct attribute *genwqe_attributes[] = {
|
||||
&dev_attr_tempsens.attr,
|
||||
&dev_attr_next_bitstream.attr,
|
||||
&dev_attr_curr_bitstream.attr,
|
||||
&dev_attr_base_clock.attr,
|
||||
&dev_attr_driver.attr,
|
||||
&dev_attr_type.attr,
|
||||
&dev_attr_version.attr,
|
||||
&dev_attr_appid.attr,
|
||||
&dev_attr_status.attr,
|
||||
&dev_attr_freerunning_timer.attr,
|
||||
&dev_attr_queue_working_time.attr,
|
||||
NULL,
|
||||
};
|
||||
|
||||
static struct attribute *genwqe_normal_attributes[] = {
|
||||
&dev_attr_driver.attr,
|
||||
&dev_attr_type.attr,
|
||||
&dev_attr_version.attr,
|
||||
&dev_attr_appid.attr,
|
||||
&dev_attr_status.attr,
|
||||
&dev_attr_freerunning_timer.attr,
|
||||
&dev_attr_queue_working_time.attr,
|
||||
NULL,
|
||||
};
|
||||
|
||||
/**
|
||||
* genwqe_is_visible() - Determine if sysfs attribute should be visible or not
|
||||
*
|
||||
* VFs have restricted mmio capabilities, so not all sysfs entries
|
||||
* are allowed in VFs.
|
||||
*/
|
||||
static umode_t genwqe_is_visible(struct kobject *kobj,
|
||||
struct attribute *attr, int n)
|
||||
{
|
||||
unsigned int j;
|
||||
struct device *dev = container_of(kobj, struct device, kobj);
|
||||
struct genwqe_dev *cd = dev_get_drvdata(dev);
|
||||
umode_t mode = attr->mode;
|
||||
|
||||
if (genwqe_is_privileged(cd))
|
||||
return mode;
|
||||
|
||||
for (j = 0; genwqe_normal_attributes[j] != NULL; j++)
|
||||
if (genwqe_normal_attributes[j] == attr)
|
||||
return mode;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct attribute_group genwqe_attribute_group = {
|
||||
.is_visible = genwqe_is_visible,
|
||||
.attrs = genwqe_attributes,
|
||||
};
|
||||
|
||||
const struct attribute_group *genwqe_attribute_groups[] = {
|
||||
&genwqe_attribute_group,
|
||||
NULL,
|
||||
};
|
||||
944
drivers/misc/genwqe/card_utils.c
Normal file
944
drivers/misc/genwqe/card_utils.c
Normal file
|
|
@ -0,0 +1,944 @@
|
|||
/**
|
||||
* IBM Accelerator Family 'GenWQE'
|
||||
*
|
||||
* (C) Copyright IBM Corp. 2013
|
||||
*
|
||||
* Author: Frank Haverkamp <haver@linux.vnet.ibm.com>
|
||||
* Author: Joerg-Stephan Vogt <jsvogt@de.ibm.com>
|
||||
* Author: Michael Jung <mijung@de.ibm.com>
|
||||
* Author: Michael Ruettger <michael@ibmra.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License (version 2 only)
|
||||
* as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Miscelanous functionality used in the other GenWQE driver parts.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/vmalloc.h>
|
||||
#include <linux/page-flags.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/hugetlb.h>
|
||||
#include <linux/iommu.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/ctype.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/delay.h>
|
||||
#include <asm/pgtable.h>
|
||||
|
||||
#include "genwqe_driver.h"
|
||||
#include "card_base.h"
|
||||
#include "card_ddcb.h"
|
||||
|
||||
/**
|
||||
* __genwqe_writeq() - Write 64-bit register
|
||||
* @cd: genwqe device descriptor
|
||||
* @byte_offs: byte offset within BAR
|
||||
* @val: 64-bit value
|
||||
*
|
||||
* Return: 0 if success; < 0 if error
|
||||
*/
|
||||
int __genwqe_writeq(struct genwqe_dev *cd, u64 byte_offs, u64 val)
|
||||
{
|
||||
if (cd->err_inject & GENWQE_INJECT_HARDWARE_FAILURE)
|
||||
return -EIO;
|
||||
|
||||
if (cd->mmio == NULL)
|
||||
return -EIO;
|
||||
|
||||
__raw_writeq((__force u64)cpu_to_be64(val), cd->mmio + byte_offs);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* __genwqe_readq() - Read 64-bit register
|
||||
* @cd: genwqe device descriptor
|
||||
* @byte_offs: offset within BAR
|
||||
*
|
||||
* Return: value from register
|
||||
*/
|
||||
u64 __genwqe_readq(struct genwqe_dev *cd, u64 byte_offs)
|
||||
{
|
||||
if (cd->err_inject & GENWQE_INJECT_HARDWARE_FAILURE)
|
||||
return 0xffffffffffffffffull;
|
||||
|
||||
if ((cd->err_inject & GENWQE_INJECT_GFIR_FATAL) &&
|
||||
(byte_offs == IO_SLC_CFGREG_GFIR))
|
||||
return 0x000000000000ffffull;
|
||||
|
||||
if ((cd->err_inject & GENWQE_INJECT_GFIR_INFO) &&
|
||||
(byte_offs == IO_SLC_CFGREG_GFIR))
|
||||
return 0x00000000ffff0000ull;
|
||||
|
||||
if (cd->mmio == NULL)
|
||||
return 0xffffffffffffffffull;
|
||||
|
||||
return be64_to_cpu((__force __be64)__raw_readq(cd->mmio + byte_offs));
|
||||
}
|
||||
|
||||
/**
|
||||
* __genwqe_writel() - Write 32-bit register
|
||||
* @cd: genwqe device descriptor
|
||||
* @byte_offs: byte offset within BAR
|
||||
* @val: 32-bit value
|
||||
*
|
||||
* Return: 0 if success; < 0 if error
|
||||
*/
|
||||
int __genwqe_writel(struct genwqe_dev *cd, u64 byte_offs, u32 val)
|
||||
{
|
||||
if (cd->err_inject & GENWQE_INJECT_HARDWARE_FAILURE)
|
||||
return -EIO;
|
||||
|
||||
if (cd->mmio == NULL)
|
||||
return -EIO;
|
||||
|
||||
__raw_writel((__force u32)cpu_to_be32(val), cd->mmio + byte_offs);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* __genwqe_readl() - Read 32-bit register
|
||||
* @cd: genwqe device descriptor
|
||||
* @byte_offs: offset within BAR
|
||||
*
|
||||
* Return: Value from register
|
||||
*/
|
||||
u32 __genwqe_readl(struct genwqe_dev *cd, u64 byte_offs)
|
||||
{
|
||||
if (cd->err_inject & GENWQE_INJECT_HARDWARE_FAILURE)
|
||||
return 0xffffffff;
|
||||
|
||||
if (cd->mmio == NULL)
|
||||
return 0xffffffff;
|
||||
|
||||
return be32_to_cpu((__force __be32)__raw_readl(cd->mmio + byte_offs));
|
||||
}
|
||||
|
||||
/**
|
||||
* genwqe_read_app_id() - Extract app_id
|
||||
*
|
||||
* app_unitcfg need to be filled with valid data first
|
||||
*/
|
||||
int genwqe_read_app_id(struct genwqe_dev *cd, char *app_name, int len)
|
||||
{
|
||||
int i, j;
|
||||
u32 app_id = (u32)cd->app_unitcfg;
|
||||
|
||||
memset(app_name, 0, len);
|
||||
for (i = 0, j = 0; j < min(len, 4); j++) {
|
||||
char ch = (char)((app_id >> (24 - j*8)) & 0xff);
|
||||
if (ch == ' ')
|
||||
continue;
|
||||
app_name[i++] = isprint(ch) ? ch : 'X';
|
||||
}
|
||||
return i;
|
||||
}
|
||||
|
||||
/**
|
||||
* genwqe_init_crc32() - Prepare a lookup table for fast crc32 calculations
|
||||
*
|
||||
* Existing kernel functions seem to use a different polynom,
|
||||
* therefore we could not use them here.
|
||||
*
|
||||
* Genwqe's Polynomial = 0x20044009
|
||||
*/
|
||||
#define CRC32_POLYNOMIAL 0x20044009
|
||||
static u32 crc32_tab[256]; /* crc32 lookup table */
|
||||
|
||||
void genwqe_init_crc32(void)
|
||||
{
|
||||
int i, j;
|
||||
u32 crc;
|
||||
|
||||
for (i = 0; i < 256; i++) {
|
||||
crc = i << 24;
|
||||
for (j = 0; j < 8; j++) {
|
||||
if (crc & 0x80000000)
|
||||
crc = (crc << 1) ^ CRC32_POLYNOMIAL;
|
||||
else
|
||||
crc = (crc << 1);
|
||||
}
|
||||
crc32_tab[i] = crc;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* genwqe_crc32() - Generate 32-bit crc as required for DDCBs
|
||||
* @buff: pointer to data buffer
|
||||
* @len: length of data for calculation
|
||||
* @init: initial crc (0xffffffff at start)
|
||||
*
|
||||
* polynomial = x^32 * + x^29 + x^18 + x^14 + x^3 + 1 (0x20044009)
|
||||
|
||||
* Example: 4 bytes 0x01 0x02 0x03 0x04 with init=0xffffffff should
|
||||
* result in a crc32 of 0xf33cb7d3.
|
||||
*
|
||||
* The existing kernel crc functions did not cover this polynom yet.
|
||||
*
|
||||
* Return: crc32 checksum.
|
||||
*/
|
||||
u32 genwqe_crc32(u8 *buff, size_t len, u32 init)
|
||||
{
|
||||
int i;
|
||||
u32 crc;
|
||||
|
||||
crc = init;
|
||||
while (len--) {
|
||||
i = ((crc >> 24) ^ *buff++) & 0xFF;
|
||||
crc = (crc << 8) ^ crc32_tab[i];
|
||||
}
|
||||
return crc;
|
||||
}
|
||||
|
||||
void *__genwqe_alloc_consistent(struct genwqe_dev *cd, size_t size,
|
||||
dma_addr_t *dma_handle)
|
||||
{
|
||||
if (get_order(size) > MAX_ORDER)
|
||||
return NULL;
|
||||
|
||||
return pci_alloc_consistent(cd->pci_dev, size, dma_handle);
|
||||
}
|
||||
|
||||
void __genwqe_free_consistent(struct genwqe_dev *cd, size_t size,
|
||||
void *vaddr, dma_addr_t dma_handle)
|
||||
{
|
||||
if (vaddr == NULL)
|
||||
return;
|
||||
|
||||
pci_free_consistent(cd->pci_dev, size, vaddr, dma_handle);
|
||||
}
|
||||
|
||||
static void genwqe_unmap_pages(struct genwqe_dev *cd, dma_addr_t *dma_list,
|
||||
int num_pages)
|
||||
{
|
||||
int i;
|
||||
struct pci_dev *pci_dev = cd->pci_dev;
|
||||
|
||||
for (i = 0; (i < num_pages) && (dma_list[i] != 0x0); i++) {
|
||||
pci_unmap_page(pci_dev, dma_list[i],
|
||||
PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
|
||||
dma_list[i] = 0x0;
|
||||
}
|
||||
}
|
||||
|
||||
static int genwqe_map_pages(struct genwqe_dev *cd,
|
||||
struct page **page_list, int num_pages,
|
||||
dma_addr_t *dma_list)
|
||||
{
|
||||
int i;
|
||||
struct pci_dev *pci_dev = cd->pci_dev;
|
||||
|
||||
/* establish DMA mapping for requested pages */
|
||||
for (i = 0; i < num_pages; i++) {
|
||||
dma_addr_t daddr;
|
||||
|
||||
dma_list[i] = 0x0;
|
||||
daddr = pci_map_page(pci_dev, page_list[i],
|
||||
0, /* map_offs */
|
||||
PAGE_SIZE,
|
||||
PCI_DMA_BIDIRECTIONAL); /* FIXME rd/rw */
|
||||
|
||||
if (pci_dma_mapping_error(pci_dev, daddr)) {
|
||||
dev_err(&pci_dev->dev,
|
||||
"[%s] err: no dma addr daddr=%016llx!\n",
|
||||
__func__, (long long)daddr);
|
||||
goto err;
|
||||
}
|
||||
|
||||
dma_list[i] = daddr;
|
||||
}
|
||||
return 0;
|
||||
|
||||
err:
|
||||
genwqe_unmap_pages(cd, dma_list, num_pages);
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
static int genwqe_sgl_size(int num_pages)
|
||||
{
|
||||
int len, num_tlb = num_pages / 7;
|
||||
|
||||
len = sizeof(struct sg_entry) * (num_pages+num_tlb + 1);
|
||||
return roundup(len, PAGE_SIZE);
|
||||
}
|
||||
|
||||
struct sg_entry *genwqe_alloc_sgl(struct genwqe_dev *cd, int num_pages,
|
||||
dma_addr_t *dma_addr, size_t *sgl_size)
|
||||
{
|
||||
struct pci_dev *pci_dev = cd->pci_dev;
|
||||
struct sg_entry *sgl;
|
||||
|
||||
*sgl_size = genwqe_sgl_size(num_pages);
|
||||
if (get_order(*sgl_size) > MAX_ORDER) {
|
||||
dev_err(&pci_dev->dev,
|
||||
"[%s] err: too much memory requested!\n", __func__);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
sgl = __genwqe_alloc_consistent(cd, *sgl_size, dma_addr);
|
||||
if (sgl == NULL) {
|
||||
dev_err(&pci_dev->dev,
|
||||
"[%s] err: no memory available!\n", __func__);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
return sgl;
|
||||
}
|
||||
|
||||
int genwqe_setup_sgl(struct genwqe_dev *cd,
|
||||
unsigned long offs,
|
||||
unsigned long size,
|
||||
struct sg_entry *sgl,
|
||||
dma_addr_t dma_addr, size_t sgl_size,
|
||||
dma_addr_t *dma_list, int page_offs, int num_pages)
|
||||
{
|
||||
int i = 0, j = 0, p;
|
||||
unsigned long dma_offs, map_offs;
|
||||
struct pci_dev *pci_dev = cd->pci_dev;
|
||||
dma_addr_t prev_daddr = 0;
|
||||
struct sg_entry *s, *last_s = NULL;
|
||||
|
||||
/* sanity checks */
|
||||
if (offs > PAGE_SIZE) {
|
||||
dev_err(&pci_dev->dev,
|
||||
"[%s] too large start offs %08lx\n", __func__, offs);
|
||||
return -EFAULT;
|
||||
}
|
||||
if (sgl_size < genwqe_sgl_size(num_pages)) {
|
||||
dev_err(&pci_dev->dev,
|
||||
"[%s] sgl_size too small %08lx for %d pages\n",
|
||||
__func__, sgl_size, num_pages);
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
dma_offs = 128; /* next block if needed/dma_offset */
|
||||
map_offs = offs; /* offset in first page */
|
||||
|
||||
s = &sgl[0]; /* first set of 8 entries */
|
||||
p = 0; /* page */
|
||||
while (p < num_pages) {
|
||||
dma_addr_t daddr;
|
||||
unsigned int size_to_map;
|
||||
|
||||
/* always write the chaining entry, cleanup is done later */
|
||||
j = 0;
|
||||
s[j].target_addr = cpu_to_be64(dma_addr + dma_offs);
|
||||
s[j].len = cpu_to_be32(128);
|
||||
s[j].flags = cpu_to_be32(SG_CHAINED);
|
||||
j++;
|
||||
|
||||
while (j < 8) {
|
||||
/* DMA mapping for requested page, offs, size */
|
||||
size_to_map = min(size, PAGE_SIZE - map_offs);
|
||||
daddr = dma_list[page_offs + p] + map_offs;
|
||||
size -= size_to_map;
|
||||
map_offs = 0;
|
||||
|
||||
if (prev_daddr == daddr) {
|
||||
u32 prev_len = be32_to_cpu(last_s->len);
|
||||
|
||||
/* pr_info("daddr combining: "
|
||||
"%016llx/%08x -> %016llx\n",
|
||||
prev_daddr, prev_len, daddr); */
|
||||
|
||||
last_s->len = cpu_to_be32(prev_len +
|
||||
size_to_map);
|
||||
|
||||
p++; /* process next page */
|
||||
if (p == num_pages)
|
||||
goto fixup; /* nothing to do */
|
||||
|
||||
prev_daddr = daddr + size_to_map;
|
||||
continue;
|
||||
}
|
||||
|
||||
/* start new entry */
|
||||
s[j].target_addr = cpu_to_be64(daddr);
|
||||
s[j].len = cpu_to_be32(size_to_map);
|
||||
s[j].flags = cpu_to_be32(SG_DATA);
|
||||
prev_daddr = daddr + size_to_map;
|
||||
last_s = &s[j];
|
||||
j++;
|
||||
|
||||
p++; /* process next page */
|
||||
if (p == num_pages)
|
||||
goto fixup; /* nothing to do */
|
||||
}
|
||||
dma_offs += 128;
|
||||
s += 8; /* continue 8 elements further */
|
||||
}
|
||||
fixup:
|
||||
if (j == 1) { /* combining happend on last entry! */
|
||||
s -= 8; /* full shift needed on previous sgl block */
|
||||
j = 7; /* shift all elements */
|
||||
}
|
||||
|
||||
for (i = 0; i < j; i++) /* move elements 1 up */
|
||||
s[i] = s[i + 1];
|
||||
|
||||
s[i].target_addr = cpu_to_be64(0);
|
||||
s[i].len = cpu_to_be32(0);
|
||||
s[i].flags = cpu_to_be32(SG_END_LIST);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void genwqe_free_sgl(struct genwqe_dev *cd, struct sg_entry *sg_list,
|
||||
dma_addr_t dma_addr, size_t size)
|
||||
{
|
||||
__genwqe_free_consistent(cd, size, sg_list, dma_addr);
|
||||
}
|
||||
|
||||
/**
|
||||
* free_user_pages() - Give pinned pages back
|
||||
*
|
||||
* Documentation of get_user_pages is in mm/memory.c:
|
||||
*
|
||||
* If the page is written to, set_page_dirty (or set_page_dirty_lock,
|
||||
* as appropriate) must be called after the page is finished with, and
|
||||
* before put_page is called.
|
||||
*
|
||||
* FIXME Could be of use to others and might belong in the generic
|
||||
* code, if others agree. E.g.
|
||||
* ll_free_user_pages in drivers/staging/lustre/lustre/llite/rw26.c
|
||||
* ceph_put_page_vector in net/ceph/pagevec.c
|
||||
* maybe more?
|
||||
*/
|
||||
static int free_user_pages(struct page **page_list, unsigned int nr_pages,
|
||||
int dirty)
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
for (i = 0; i < nr_pages; i++) {
|
||||
if (page_list[i] != NULL) {
|
||||
if (dirty)
|
||||
set_page_dirty_lock(page_list[i]);
|
||||
put_page(page_list[i]);
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* genwqe_user_vmap() - Map user-space memory to virtual kernel memory
|
||||
* @cd: pointer to genwqe device
|
||||
* @m: mapping params
|
||||
* @uaddr: user virtual address
|
||||
* @size: size of memory to be mapped
|
||||
*
|
||||
* We need to think about how we could speed this up. Of course it is
|
||||
* not a good idea to do this over and over again, like we are
|
||||
* currently doing it. Nevertheless, I am curious where on the path
|
||||
* the performance is spend. Most probably within the memory
|
||||
* allocation functions, but maybe also in the DMA mapping code.
|
||||
*
|
||||
* Restrictions: The maximum size of the possible mapping currently depends
|
||||
* on the amount of memory we can get using kzalloc() for the
|
||||
* page_list and pci_alloc_consistent for the sg_list.
|
||||
* The sg_list is currently itself not scattered, which could
|
||||
* be fixed with some effort. The page_list must be split into
|
||||
* PAGE_SIZE chunks too. All that will make the complicated
|
||||
* code more complicated.
|
||||
*
|
||||
* Return: 0 if success
|
||||
*/
|
||||
int genwqe_user_vmap(struct genwqe_dev *cd, struct dma_mapping *m, void *uaddr,
|
||||
unsigned long size, struct ddcb_requ *req)
|
||||
{
|
||||
int rc = -EINVAL;
|
||||
unsigned long data, offs;
|
||||
struct pci_dev *pci_dev = cd->pci_dev;
|
||||
|
||||
if ((uaddr == NULL) || (size == 0)) {
|
||||
m->size = 0; /* mark unused and not added */
|
||||
return -EINVAL;
|
||||
}
|
||||
m->u_vaddr = uaddr;
|
||||
m->size = size;
|
||||
|
||||
/* determine space needed for page_list. */
|
||||
data = (unsigned long)uaddr;
|
||||
offs = offset_in_page(data);
|
||||
m->nr_pages = DIV_ROUND_UP(offs + size, PAGE_SIZE);
|
||||
|
||||
m->page_list = kcalloc(m->nr_pages,
|
||||
sizeof(struct page *) + sizeof(dma_addr_t),
|
||||
GFP_KERNEL);
|
||||
if (!m->page_list) {
|
||||
dev_err(&pci_dev->dev, "err: alloc page_list failed\n");
|
||||
m->nr_pages = 0;
|
||||
m->u_vaddr = NULL;
|
||||
m->size = 0; /* mark unused and not added */
|
||||
return -ENOMEM;
|
||||
}
|
||||
m->dma_list = (dma_addr_t *)(m->page_list + m->nr_pages);
|
||||
|
||||
/* pin user pages in memory */
|
||||
rc = get_user_pages_fast(data & PAGE_MASK, /* page aligned addr */
|
||||
m->nr_pages,
|
||||
1, /* write by caller */
|
||||
m->page_list); /* ptrs to pages */
|
||||
|
||||
/* assumption: get_user_pages can be killed by signals. */
|
||||
if (rc < m->nr_pages) {
|
||||
free_user_pages(m->page_list, rc, 0);
|
||||
rc = -EFAULT;
|
||||
goto fail_get_user_pages;
|
||||
}
|
||||
|
||||
rc = genwqe_map_pages(cd, m->page_list, m->nr_pages, m->dma_list);
|
||||
if (rc != 0)
|
||||
goto fail_free_user_pages;
|
||||
|
||||
return 0;
|
||||
|
||||
fail_free_user_pages:
|
||||
free_user_pages(m->page_list, m->nr_pages, 0);
|
||||
|
||||
fail_get_user_pages:
|
||||
kfree(m->page_list);
|
||||
m->page_list = NULL;
|
||||
m->dma_list = NULL;
|
||||
m->nr_pages = 0;
|
||||
m->u_vaddr = NULL;
|
||||
m->size = 0; /* mark unused and not added */
|
||||
return rc;
|
||||
}
|
||||
|
||||
/**
|
||||
* genwqe_user_vunmap() - Undo mapping of user-space mem to virtual kernel
|
||||
* memory
|
||||
* @cd: pointer to genwqe device
|
||||
* @m: mapping params
|
||||
*/
|
||||
int genwqe_user_vunmap(struct genwqe_dev *cd, struct dma_mapping *m,
|
||||
struct ddcb_requ *req)
|
||||
{
|
||||
struct pci_dev *pci_dev = cd->pci_dev;
|
||||
|
||||
if (!dma_mapping_used(m)) {
|
||||
dev_err(&pci_dev->dev, "[%s] err: mapping %p not used!\n",
|
||||
__func__, m);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (m->dma_list)
|
||||
genwqe_unmap_pages(cd, m->dma_list, m->nr_pages);
|
||||
|
||||
if (m->page_list) {
|
||||
free_user_pages(m->page_list, m->nr_pages, 1);
|
||||
|
||||
kfree(m->page_list);
|
||||
m->page_list = NULL;
|
||||
m->dma_list = NULL;
|
||||
m->nr_pages = 0;
|
||||
}
|
||||
|
||||
m->u_vaddr = NULL;
|
||||
m->size = 0; /* mark as unused and not added */
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* genwqe_card_type() - Get chip type SLU Configuration Register
|
||||
* @cd: pointer to the genwqe device descriptor
|
||||
* Return: 0: Altera Stratix-IV 230
|
||||
* 1: Altera Stratix-IV 530
|
||||
* 2: Altera Stratix-V A4
|
||||
* 3: Altera Stratix-V A7
|
||||
*/
|
||||
u8 genwqe_card_type(struct genwqe_dev *cd)
|
||||
{
|
||||
u64 card_type = cd->slu_unitcfg;
|
||||
return (u8)((card_type & IO_SLU_UNITCFG_TYPE_MASK) >> 20);
|
||||
}
|
||||
|
||||
/**
|
||||
* genwqe_card_reset() - Reset the card
|
||||
* @cd: pointer to the genwqe device descriptor
|
||||
*/
|
||||
int genwqe_card_reset(struct genwqe_dev *cd)
|
||||
{
|
||||
u64 softrst;
|
||||
struct pci_dev *pci_dev = cd->pci_dev;
|
||||
|
||||
if (!genwqe_is_privileged(cd))
|
||||
return -ENODEV;
|
||||
|
||||
/* new SL */
|
||||
__genwqe_writeq(cd, IO_SLC_CFGREG_SOFTRESET, 0x1ull);
|
||||
msleep(1000);
|
||||
__genwqe_readq(cd, IO_HSU_FIR_CLR);
|
||||
__genwqe_readq(cd, IO_APP_FIR_CLR);
|
||||
__genwqe_readq(cd, IO_SLU_FIR_CLR);
|
||||
|
||||
/*
|
||||
* Read-modify-write to preserve the stealth bits
|
||||
*
|
||||
* For SL >= 039, Stealth WE bit allows removing
|
||||
* the read-modify-wrote.
|
||||
* r-m-w may require a mask 0x3C to avoid hitting hard
|
||||
* reset again for error reset (should be 0, chicken).
|
||||
*/
|
||||
softrst = __genwqe_readq(cd, IO_SLC_CFGREG_SOFTRESET) & 0x3cull;
|
||||
__genwqe_writeq(cd, IO_SLC_CFGREG_SOFTRESET, softrst | 0x2ull);
|
||||
|
||||
/* give ERRORRESET some time to finish */
|
||||
msleep(50);
|
||||
|
||||
if (genwqe_need_err_masking(cd)) {
|
||||
dev_info(&pci_dev->dev,
|
||||
"[%s] masking errors for old bitstreams\n", __func__);
|
||||
__genwqe_writeq(cd, IO_SLC_MISC_DEBUG, 0x0aull);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
int genwqe_read_softreset(struct genwqe_dev *cd)
|
||||
{
|
||||
u64 bitstream;
|
||||
|
||||
if (!genwqe_is_privileged(cd))
|
||||
return -ENODEV;
|
||||
|
||||
bitstream = __genwqe_readq(cd, IO_SLU_BITSTREAM) & 0x1;
|
||||
cd->softreset = (bitstream == 0) ? 0x8ull : 0xcull;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* genwqe_set_interrupt_capability() - Configure MSI capability structure
|
||||
* @cd: pointer to the device
|
||||
* Return: 0 if no error
|
||||
*/
|
||||
int genwqe_set_interrupt_capability(struct genwqe_dev *cd, int count)
|
||||
{
|
||||
int rc;
|
||||
struct pci_dev *pci_dev = cd->pci_dev;
|
||||
|
||||
rc = pci_enable_msi_block(pci_dev, count);
|
||||
if (rc == 0)
|
||||
cd->flags |= GENWQE_FLAG_MSI_ENABLED;
|
||||
return rc;
|
||||
}
|
||||
|
||||
/**
|
||||
* genwqe_reset_interrupt_capability() - Undo genwqe_set_interrupt_capability()
|
||||
* @cd: pointer to the device
|
||||
*/
|
||||
void genwqe_reset_interrupt_capability(struct genwqe_dev *cd)
|
||||
{
|
||||
struct pci_dev *pci_dev = cd->pci_dev;
|
||||
|
||||
if (cd->flags & GENWQE_FLAG_MSI_ENABLED) {
|
||||
pci_disable_msi(pci_dev);
|
||||
cd->flags &= ~GENWQE_FLAG_MSI_ENABLED;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* set_reg_idx() - Fill array with data. Ignore illegal offsets.
|
||||
* @cd: card device
|
||||
* @r: debug register array
|
||||
* @i: index to desired entry
|
||||
* @m: maximum possible entries
|
||||
* @addr: addr which is read
|
||||
* @index: index in debug array
|
||||
* @val: read value
|
||||
*/
|
||||
static int set_reg_idx(struct genwqe_dev *cd, struct genwqe_reg *r,
|
||||
unsigned int *i, unsigned int m, u32 addr, u32 idx,
|
||||
u64 val)
|
||||
{
|
||||
if (WARN_ON_ONCE(*i >= m))
|
||||
return -EFAULT;
|
||||
|
||||
r[*i].addr = addr;
|
||||
r[*i].idx = idx;
|
||||
r[*i].val = val;
|
||||
++*i;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int set_reg(struct genwqe_dev *cd, struct genwqe_reg *r,
|
||||
unsigned int *i, unsigned int m, u32 addr, u64 val)
|
||||
{
|
||||
return set_reg_idx(cd, r, i, m, addr, 0, val);
|
||||
}
|
||||
|
||||
int genwqe_read_ffdc_regs(struct genwqe_dev *cd, struct genwqe_reg *regs,
|
||||
unsigned int max_regs, int all)
|
||||
{
|
||||
unsigned int i, j, idx = 0;
|
||||
u32 ufir_addr, ufec_addr, sfir_addr, sfec_addr;
|
||||
u64 gfir, sluid, appid, ufir, ufec, sfir, sfec;
|
||||
|
||||
/* Global FIR */
|
||||
gfir = __genwqe_readq(cd, IO_SLC_CFGREG_GFIR);
|
||||
set_reg(cd, regs, &idx, max_regs, IO_SLC_CFGREG_GFIR, gfir);
|
||||
|
||||
/* UnitCfg for SLU */
|
||||
sluid = __genwqe_readq(cd, IO_SLU_UNITCFG); /* 0x00000000 */
|
||||
set_reg(cd, regs, &idx, max_regs, IO_SLU_UNITCFG, sluid);
|
||||
|
||||
/* UnitCfg for APP */
|
||||
appid = __genwqe_readq(cd, IO_APP_UNITCFG); /* 0x02000000 */
|
||||
set_reg(cd, regs, &idx, max_regs, IO_APP_UNITCFG, appid);
|
||||
|
||||
/* Check all chip Units */
|
||||
for (i = 0; i < GENWQE_MAX_UNITS; i++) {
|
||||
|
||||
/* Unit FIR */
|
||||
ufir_addr = (i << 24) | 0x008;
|
||||
ufir = __genwqe_readq(cd, ufir_addr);
|
||||
set_reg(cd, regs, &idx, max_regs, ufir_addr, ufir);
|
||||
|
||||
/* Unit FEC */
|
||||
ufec_addr = (i << 24) | 0x018;
|
||||
ufec = __genwqe_readq(cd, ufec_addr);
|
||||
set_reg(cd, regs, &idx, max_regs, ufec_addr, ufec);
|
||||
|
||||
for (j = 0; j < 64; j++) {
|
||||
/* wherever there is a primary 1, read the 2ndary */
|
||||
if (!all && (!(ufir & (1ull << j))))
|
||||
continue;
|
||||
|
||||
sfir_addr = (i << 24) | (0x100 + 8 * j);
|
||||
sfir = __genwqe_readq(cd, sfir_addr);
|
||||
set_reg(cd, regs, &idx, max_regs, sfir_addr, sfir);
|
||||
|
||||
sfec_addr = (i << 24) | (0x300 + 8 * j);
|
||||
sfec = __genwqe_readq(cd, sfec_addr);
|
||||
set_reg(cd, regs, &idx, max_regs, sfec_addr, sfec);
|
||||
}
|
||||
}
|
||||
|
||||
/* fill with invalid data until end */
|
||||
for (i = idx; i < max_regs; i++) {
|
||||
regs[i].addr = 0xffffffff;
|
||||
regs[i].val = 0xffffffffffffffffull;
|
||||
}
|
||||
return idx;
|
||||
}
|
||||
|
||||
/**
|
||||
* genwqe_ffdc_buff_size() - Calculates the number of dump registers
|
||||
*/
|
||||
int genwqe_ffdc_buff_size(struct genwqe_dev *cd, int uid)
|
||||
{
|
||||
int entries = 0, ring, traps, traces, trace_entries;
|
||||
u32 eevptr_addr, l_addr, d_len, d_type;
|
||||
u64 eevptr, val, addr;
|
||||
|
||||
eevptr_addr = GENWQE_UID_OFFS(uid) | IO_EXTENDED_ERROR_POINTER;
|
||||
eevptr = __genwqe_readq(cd, eevptr_addr);
|
||||
|
||||
if ((eevptr != 0x0) && (eevptr != -1ull)) {
|
||||
l_addr = GENWQE_UID_OFFS(uid) | eevptr;
|
||||
|
||||
while (1) {
|
||||
val = __genwqe_readq(cd, l_addr);
|
||||
|
||||
if ((val == 0x0) || (val == -1ull))
|
||||
break;
|
||||
|
||||
/* 38:24 */
|
||||
d_len = (val & 0x0000007fff000000ull) >> 24;
|
||||
|
||||
/* 39 */
|
||||
d_type = (val & 0x0000008000000000ull) >> 36;
|
||||
|
||||
if (d_type) { /* repeat */
|
||||
entries += d_len;
|
||||
} else { /* size in bytes! */
|
||||
entries += d_len >> 3;
|
||||
}
|
||||
|
||||
l_addr += 8;
|
||||
}
|
||||
}
|
||||
|
||||
for (ring = 0; ring < 8; ring++) {
|
||||
addr = GENWQE_UID_OFFS(uid) | IO_EXTENDED_DIAG_MAP(ring);
|
||||
val = __genwqe_readq(cd, addr);
|
||||
|
||||
if ((val == 0x0ull) || (val == -1ull))
|
||||
continue;
|
||||
|
||||
traps = (val >> 24) & 0xff;
|
||||
traces = (val >> 16) & 0xff;
|
||||
trace_entries = val & 0xffff;
|
||||
|
||||
entries += traps + (traces * trace_entries);
|
||||
}
|
||||
return entries;
|
||||
}
|
||||
|
||||
/**
|
||||
* genwqe_ffdc_buff_read() - Implements LogoutExtendedErrorRegisters procedure
|
||||
*/
|
||||
int genwqe_ffdc_buff_read(struct genwqe_dev *cd, int uid,
|
||||
struct genwqe_reg *regs, unsigned int max_regs)
|
||||
{
|
||||
int i, traps, traces, trace, trace_entries, trace_entry, ring;
|
||||
unsigned int idx = 0;
|
||||
u32 eevptr_addr, l_addr, d_addr, d_len, d_type;
|
||||
u64 eevptr, e, val, addr;
|
||||
|
||||
eevptr_addr = GENWQE_UID_OFFS(uid) | IO_EXTENDED_ERROR_POINTER;
|
||||
eevptr = __genwqe_readq(cd, eevptr_addr);
|
||||
|
||||
if ((eevptr != 0x0) && (eevptr != 0xffffffffffffffffull)) {
|
||||
l_addr = GENWQE_UID_OFFS(uid) | eevptr;
|
||||
while (1) {
|
||||
e = __genwqe_readq(cd, l_addr);
|
||||
if ((e == 0x0) || (e == 0xffffffffffffffffull))
|
||||
break;
|
||||
|
||||
d_addr = (e & 0x0000000000ffffffull); /* 23:0 */
|
||||
d_len = (e & 0x0000007fff000000ull) >> 24; /* 38:24 */
|
||||
d_type = (e & 0x0000008000000000ull) >> 36; /* 39 */
|
||||
d_addr |= GENWQE_UID_OFFS(uid);
|
||||
|
||||
if (d_type) {
|
||||
for (i = 0; i < (int)d_len; i++) {
|
||||
val = __genwqe_readq(cd, d_addr);
|
||||
set_reg_idx(cd, regs, &idx, max_regs,
|
||||
d_addr, i, val);
|
||||
}
|
||||
} else {
|
||||
d_len >>= 3; /* Size in bytes! */
|
||||
for (i = 0; i < (int)d_len; i++, d_addr += 8) {
|
||||
val = __genwqe_readq(cd, d_addr);
|
||||
set_reg_idx(cd, regs, &idx, max_regs,
|
||||
d_addr, 0, val);
|
||||
}
|
||||
}
|
||||
l_addr += 8;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* To save time, there are only 6 traces poplulated on Uid=2,
|
||||
* Ring=1. each with iters=512.
|
||||
*/
|
||||
for (ring = 0; ring < 8; ring++) { /* 0 is fls, 1 is fds,
|
||||
2...7 are ASI rings */
|
||||
addr = GENWQE_UID_OFFS(uid) | IO_EXTENDED_DIAG_MAP(ring);
|
||||
val = __genwqe_readq(cd, addr);
|
||||
|
||||
if ((val == 0x0ull) || (val == -1ull))
|
||||
continue;
|
||||
|
||||
traps = (val >> 24) & 0xff; /* Number of Traps */
|
||||
traces = (val >> 16) & 0xff; /* Number of Traces */
|
||||
trace_entries = val & 0xffff; /* Entries per trace */
|
||||
|
||||
/* Note: This is a combined loop that dumps both the traps */
|
||||
/* (for the trace == 0 case) as well as the traces 1 to */
|
||||
/* 'traces'. */
|
||||
for (trace = 0; trace <= traces; trace++) {
|
||||
u32 diag_sel =
|
||||
GENWQE_EXTENDED_DIAG_SELECTOR(ring, trace);
|
||||
|
||||
addr = (GENWQE_UID_OFFS(uid) |
|
||||
IO_EXTENDED_DIAG_SELECTOR);
|
||||
__genwqe_writeq(cd, addr, diag_sel);
|
||||
|
||||
for (trace_entry = 0;
|
||||
trace_entry < (trace ? trace_entries : traps);
|
||||
trace_entry++) {
|
||||
addr = (GENWQE_UID_OFFS(uid) |
|
||||
IO_EXTENDED_DIAG_READ_MBX);
|
||||
val = __genwqe_readq(cd, addr);
|
||||
set_reg_idx(cd, regs, &idx, max_regs, addr,
|
||||
(diag_sel<<16) | trace_entry, val);
|
||||
}
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* genwqe_write_vreg() - Write register in virtual window
|
||||
*
|
||||
* Note, these registers are only accessible to the PF through the
|
||||
* VF-window. It is not intended for the VF to access.
|
||||
*/
|
||||
int genwqe_write_vreg(struct genwqe_dev *cd, u32 reg, u64 val, int func)
|
||||
{
|
||||
__genwqe_writeq(cd, IO_PF_SLC_VIRTUAL_WINDOW, func & 0xf);
|
||||
__genwqe_writeq(cd, reg, val);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* genwqe_read_vreg() - Read register in virtual window
|
||||
*
|
||||
* Note, these registers are only accessible to the PF through the
|
||||
* VF-window. It is not intended for the VF to access.
|
||||
*/
|
||||
u64 genwqe_read_vreg(struct genwqe_dev *cd, u32 reg, int func)
|
||||
{
|
||||
__genwqe_writeq(cd, IO_PF_SLC_VIRTUAL_WINDOW, func & 0xf);
|
||||
return __genwqe_readq(cd, reg);
|
||||
}
|
||||
|
||||
/**
|
||||
* genwqe_base_clock_frequency() - Deteremine base clock frequency of the card
|
||||
*
|
||||
* Note: From a design perspective it turned out to be a bad idea to
|
||||
* use codes here to specifiy the frequency/speed values. An old
|
||||
* driver cannot understand new codes and is therefore always a
|
||||
* problem. Better is to measure out the value or put the
|
||||
* speed/frequency directly into a register which is always a valid
|
||||
* value for old as well as for new software.
|
||||
*
|
||||
* Return: Card clock in MHz
|
||||
*/
|
||||
int genwqe_base_clock_frequency(struct genwqe_dev *cd)
|
||||
{
|
||||
u16 speed; /* MHz MHz MHz MHz */
|
||||
static const int speed_grade[] = { 250, 200, 166, 175 };
|
||||
|
||||
speed = (u16)((cd->slu_unitcfg >> 28) & 0x0full);
|
||||
if (speed >= ARRAY_SIZE(speed_grade))
|
||||
return 0; /* illegal value */
|
||||
|
||||
return speed_grade[speed];
|
||||
}
|
||||
|
||||
/**
|
||||
* genwqe_stop_traps() - Stop traps
|
||||
*
|
||||
* Before reading out the analysis data, we need to stop the traps.
|
||||
*/
|
||||
void genwqe_stop_traps(struct genwqe_dev *cd)
|
||||
{
|
||||
__genwqe_writeq(cd, IO_SLC_MISC_DEBUG_SET, 0xcull);
|
||||
}
|
||||
|
||||
/**
|
||||
* genwqe_start_traps() - Start traps
|
||||
*
|
||||
* After having read the data, we can/must enable the traps again.
|
||||
*/
|
||||
void genwqe_start_traps(struct genwqe_dev *cd)
|
||||
{
|
||||
__genwqe_writeq(cd, IO_SLC_MISC_DEBUG_CLR, 0xcull);
|
||||
|
||||
if (genwqe_need_err_masking(cd))
|
||||
__genwqe_writeq(cd, IO_SLC_MISC_DEBUG, 0x0aull);
|
||||
}
|
||||
77
drivers/misc/genwqe/genwqe_driver.h
Normal file
77
drivers/misc/genwqe/genwqe_driver.h
Normal file
|
|
@ -0,0 +1,77 @@
|
|||
#ifndef __GENWQE_DRIVER_H__
|
||||
#define __GENWQE_DRIVER_H__
|
||||
|
||||
/**
|
||||
* IBM Accelerator Family 'GenWQE'
|
||||
*
|
||||
* (C) Copyright IBM Corp. 2013
|
||||
*
|
||||
* Author: Frank Haverkamp <haver@linux.vnet.ibm.com>
|
||||
* Author: Joerg-Stephan Vogt <jsvogt@de.ibm.com>
|
||||
* Author: Michael Jung <mijung@de.ibm.com>
|
||||
* Author: Michael Ruettger <michael@ibmra.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License (version 2 only)
|
||||
* as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/stddef.h>
|
||||
#include <linux/cdev.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/kthread.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/iommu.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/printk.h>
|
||||
|
||||
#include <asm/byteorder.h>
|
||||
#include <linux/genwqe/genwqe_card.h>
|
||||
|
||||
#define DRV_VERS_STRING "2.0.0"
|
||||
|
||||
/*
|
||||
* Static minor number assignement, until we decide/implement
|
||||
* something dynamic.
|
||||
*/
|
||||
#define GENWQE_MAX_MINOR 128 /* up to 128 possible genwqe devices */
|
||||
|
||||
/**
|
||||
* genwqe_requ_alloc() - Allocate a new DDCB execution request
|
||||
*
|
||||
* This data structure contains the user visiable fields of the DDCB
|
||||
* to be executed.
|
||||
*
|
||||
* Return: ptr to genwqe_ddcb_cmd data structure
|
||||
*/
|
||||
struct genwqe_ddcb_cmd *ddcb_requ_alloc(void);
|
||||
|
||||
/**
|
||||
* ddcb_requ_free() - Free DDCB execution request.
|
||||
* @req: ptr to genwqe_ddcb_cmd data structure.
|
||||
*/
|
||||
void ddcb_requ_free(struct genwqe_ddcb_cmd *req);
|
||||
|
||||
u32 genwqe_crc32(u8 *buff, size_t len, u32 init);
|
||||
|
||||
static inline void genwqe_hexdump(struct pci_dev *pci_dev,
|
||||
const void *buff, unsigned int size)
|
||||
{
|
||||
char prefix[32];
|
||||
|
||||
scnprintf(prefix, sizeof(prefix), "%s %s: ",
|
||||
GENWQE_DEVNAME, pci_name(pci_dev));
|
||||
|
||||
print_hex_dump_debug(prefix, DUMP_PREFIX_OFFSET, 16, 1, buff,
|
||||
size, true);
|
||||
}
|
||||
|
||||
#endif /* __GENWQE_DRIVER_H__ */
|
||||
|
|
@ -224,7 +224,7 @@ static int jp_scsi_dispatch_cmd(struct scsi_cmnd *cmd)
|
|||
}
|
||||
|
||||
#ifdef CONFIG_IDE
|
||||
int jp_generic_ide_ioctl(ide_drive_t *drive, struct file *file,
|
||||
static int jp_generic_ide_ioctl(ide_drive_t *drive, struct file *file,
|
||||
struct block_device *bdev, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
|
|
@ -334,9 +334,10 @@ static void execute_location(void *dst)
|
|||
|
||||
static void execute_user_location(void *dst)
|
||||
{
|
||||
/* Intentionally crossing kernel/user memory boundary. */
|
||||
void (*func)(void) = dst;
|
||||
|
||||
if (copy_to_user(dst, do_nothing, EXEC_SIZE))
|
||||
if (copy_to_user((void __user *)dst, do_nothing, EXEC_SIZE))
|
||||
return;
|
||||
func();
|
||||
}
|
||||
|
|
@ -408,6 +409,8 @@ static void lkdtm_do_action(enum ctype which)
|
|||
case CT_SPINLOCKUP:
|
||||
/* Must be called twice to trigger. */
|
||||
spin_lock(&lock_me_up);
|
||||
/* Let sparse know we intended to exit holding the lock. */
|
||||
__release(&lock_me_up);
|
||||
break;
|
||||
case CT_HUNG_TASK:
|
||||
set_current_state(TASK_UNINTERRUPTIBLE);
|
||||
|
|
|
|||
|
|
@ -177,7 +177,7 @@ int mei_amthif_read(struct mei_device *dev, struct file *file,
|
|||
unsigned long timeout;
|
||||
int i;
|
||||
|
||||
/* Only Posible if we are in timeout */
|
||||
/* Only possible if we are in timeout */
|
||||
if (!cl || cl != &dev->iamthif_cl) {
|
||||
dev_dbg(&dev->pdev->dev, "bad file ext.\n");
|
||||
return -ETIMEDOUT;
|
||||
|
|
@ -249,7 +249,7 @@ int mei_amthif_read(struct mei_device *dev, struct file *file,
|
|||
cb->response_buffer.size);
|
||||
dev_dbg(&dev->pdev->dev, "amthif cb->buf_idx - %lu\n", cb->buf_idx);
|
||||
|
||||
/* length is being turncated to PAGE_SIZE, however,
|
||||
/* length is being truncated to PAGE_SIZE, however,
|
||||
* the buf_idx may point beyond */
|
||||
length = min_t(size_t, length, (cb->buf_idx - *offset));
|
||||
|
||||
|
|
@ -316,6 +316,7 @@ static int mei_amthif_send_cmd(struct mei_device *dev, struct mei_cl_cb *cb)
|
|||
mei_hdr.host_addr = dev->iamthif_cl.host_client_id;
|
||||
mei_hdr.me_addr = dev->iamthif_cl.me_client_id;
|
||||
mei_hdr.reserved = 0;
|
||||
mei_hdr.internal = 0;
|
||||
dev->iamthif_msg_buf_index += mei_hdr.length;
|
||||
ret = mei_write_message(dev, &mei_hdr, dev->iamthif_msg_buf);
|
||||
if (ret)
|
||||
|
|
@ -477,6 +478,7 @@ int mei_amthif_irq_write_complete(struct mei_cl *cl, struct mei_cl_cb *cb,
|
|||
mei_hdr.host_addr = cl->host_client_id;
|
||||
mei_hdr.me_addr = cl->me_client_id;
|
||||
mei_hdr.reserved = 0;
|
||||
mei_hdr.internal = 0;
|
||||
|
||||
if (*slots >= msg_slots) {
|
||||
mei_hdr.length = len;
|
||||
|
|
|
|||
|
|
@ -154,7 +154,7 @@ int mei_io_cb_alloc_req_buf(struct mei_cl_cb *cb, size_t length)
|
|||
return 0;
|
||||
}
|
||||
/**
|
||||
* mei_io_cb_alloc_resp_buf - allocate respose buffer
|
||||
* mei_io_cb_alloc_resp_buf - allocate response buffer
|
||||
*
|
||||
* @cb: io callback structure
|
||||
* @length: size of the buffer
|
||||
|
|
@ -207,7 +207,7 @@ int mei_cl_flush_queues(struct mei_cl *cl)
|
|||
|
||||
|
||||
/**
|
||||
* mei_cl_init - initializes intialize cl.
|
||||
* mei_cl_init - initializes cl.
|
||||
*
|
||||
* @cl: host client to be initialized
|
||||
* @dev: mei device
|
||||
|
|
@ -263,10 +263,10 @@ struct mei_cl_cb *mei_cl_find_read_cb(struct mei_cl *cl)
|
|||
return NULL;
|
||||
}
|
||||
|
||||
/** mei_cl_link: allocte host id in the host map
|
||||
/** mei_cl_link: allocate host id in the host map
|
||||
*
|
||||
* @cl - host client
|
||||
* @id - fixed host id or -1 for genereting one
|
||||
* @id - fixed host id or -1 for generic one
|
||||
*
|
||||
* returns 0 on success
|
||||
* -EINVAL on incorrect values
|
||||
|
|
@ -282,19 +282,19 @@ int mei_cl_link(struct mei_cl *cl, int id)
|
|||
|
||||
dev = cl->dev;
|
||||
|
||||
/* If Id is not asigned get one*/
|
||||
/* If Id is not assigned get one*/
|
||||
if (id == MEI_HOST_CLIENT_ID_ANY)
|
||||
id = find_first_zero_bit(dev->host_clients_map,
|
||||
MEI_CLIENTS_MAX);
|
||||
|
||||
if (id >= MEI_CLIENTS_MAX) {
|
||||
dev_err(&dev->pdev->dev, "id exceded %d", MEI_CLIENTS_MAX) ;
|
||||
dev_err(&dev->pdev->dev, "id exceeded %d", MEI_CLIENTS_MAX);
|
||||
return -EMFILE;
|
||||
}
|
||||
|
||||
open_handle_count = dev->open_handle_count + dev->iamthif_open_count;
|
||||
if (open_handle_count >= MEI_MAX_OPEN_HANDLE_COUNT) {
|
||||
dev_err(&dev->pdev->dev, "open_handle_count exceded %d",
|
||||
dev_err(&dev->pdev->dev, "open_handle_count exceeded %d",
|
||||
MEI_MAX_OPEN_HANDLE_COUNT);
|
||||
return -EMFILE;
|
||||
}
|
||||
|
|
@ -344,8 +344,6 @@ int mei_cl_unlink(struct mei_cl *cl)
|
|||
|
||||
cl->state = MEI_FILE_INITIALIZING;
|
||||
|
||||
list_del_init(&cl->link);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -372,13 +370,14 @@ void mei_host_client_init(struct work_struct *work)
|
|||
}
|
||||
|
||||
dev->dev_state = MEI_DEV_ENABLED;
|
||||
dev->reset_count = 0;
|
||||
|
||||
mutex_unlock(&dev->device_lock);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* mei_cl_disconnect - disconnect host clinet form the me one
|
||||
* mei_cl_disconnect - disconnect host client from the me one
|
||||
*
|
||||
* @cl: host client
|
||||
*
|
||||
|
|
@ -457,7 +456,7 @@ free:
|
|||
*
|
||||
* @cl: private data of the file object
|
||||
*
|
||||
* returns ture if other client is connected, 0 - otherwise.
|
||||
* returns true if other client is connected, false - otherwise.
|
||||
*/
|
||||
bool mei_cl_is_other_connecting(struct mei_cl *cl)
|
||||
{
|
||||
|
|
@ -481,7 +480,7 @@ bool mei_cl_is_other_connecting(struct mei_cl *cl)
|
|||
}
|
||||
|
||||
/**
|
||||
* mei_cl_connect - connect host clinet to the me one
|
||||
* mei_cl_connect - connect host client to the me one
|
||||
*
|
||||
* @cl: host client
|
||||
*
|
||||
|
|
@ -729,6 +728,7 @@ int mei_cl_irq_write_complete(struct mei_cl *cl, struct mei_cl_cb *cb,
|
|||
mei_hdr.host_addr = cl->host_client_id;
|
||||
mei_hdr.me_addr = cl->me_client_id;
|
||||
mei_hdr.reserved = 0;
|
||||
mei_hdr.internal = cb->internal;
|
||||
|
||||
if (*slots >= msg_slots) {
|
||||
mei_hdr.length = len;
|
||||
|
|
@ -775,7 +775,7 @@ int mei_cl_irq_write_complete(struct mei_cl *cl, struct mei_cl_cb *cb,
|
|||
* @cl: host client
|
||||
* @cl: write callback with filled data
|
||||
*
|
||||
* returns numbe of bytes sent on success, <0 on failure.
|
||||
* returns number of bytes sent on success, <0 on failure.
|
||||
*/
|
||||
int mei_cl_write(struct mei_cl *cl, struct mei_cl_cb *cb, bool blocking)
|
||||
{
|
||||
|
|
@ -828,6 +828,7 @@ int mei_cl_write(struct mei_cl *cl, struct mei_cl_cb *cb, bool blocking)
|
|||
mei_hdr.host_addr = cl->host_client_id;
|
||||
mei_hdr.me_addr = cl->me_client_id;
|
||||
mei_hdr.reserved = 0;
|
||||
mei_hdr.internal = cb->internal;
|
||||
|
||||
|
||||
rets = mei_write_message(dev, &mei_hdr, buf->data);
|
||||
|
|
@ -907,7 +908,6 @@ void mei_cl_all_disconnect(struct mei_device *dev)
|
|||
list_for_each_entry_safe(cl, next, &dev->file_list, link) {
|
||||
cl->state = MEI_FILE_DISCONNECTED;
|
||||
cl->mei_flow_ctrl_creds = 0;
|
||||
cl->read_cb = NULL;
|
||||
cl->timer_count = 0;
|
||||
}
|
||||
}
|
||||
|
|
@ -941,8 +941,16 @@ void mei_cl_all_wakeup(struct mei_device *dev)
|
|||
void mei_cl_all_write_clear(struct mei_device *dev)
|
||||
{
|
||||
struct mei_cl_cb *cb, *next;
|
||||
struct list_head *list;
|
||||
|
||||
list_for_each_entry_safe(cb, next, &dev->write_list.list, list) {
|
||||
list = &dev->write_list.list;
|
||||
list_for_each_entry_safe(cb, next, list, list) {
|
||||
list_del(&cb->list);
|
||||
mei_io_cb_free(cb);
|
||||
}
|
||||
|
||||
list = &dev->write_waiting_list.list;
|
||||
list_for_each_entry_safe(cb, next, list, list) {
|
||||
list_del(&cb->list);
|
||||
mei_io_cb_free(cb);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -43,7 +43,7 @@ static ssize_t mei_dbgfs_read_meclients(struct file *fp, char __user *ubuf,
|
|||
|
||||
mutex_lock(&dev->device_lock);
|
||||
|
||||
/* if the driver is not enabled the list won't b consitent */
|
||||
/* if the driver is not enabled the list won't be consistent */
|
||||
if (dev->dev_state != MEI_DEV_ENABLED)
|
||||
goto out;
|
||||
|
||||
|
|
@ -101,7 +101,7 @@ static const struct file_operations mei_dbgfs_fops_devstate = {
|
|||
|
||||
/**
|
||||
* mei_dbgfs_deregister - Remove the debugfs files and directories
|
||||
* @mei - pointer to mei device private dat
|
||||
* @mei - pointer to mei device private data
|
||||
*/
|
||||
void mei_dbgfs_deregister(struct mei_device *dev)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -28,9 +28,9 @@
|
|||
*
|
||||
* @dev: the device structure
|
||||
*
|
||||
* returns none.
|
||||
* returns 0 on success -ENOMEM on allocation failure
|
||||
*/
|
||||
static void mei_hbm_me_cl_allocate(struct mei_device *dev)
|
||||
static int mei_hbm_me_cl_allocate(struct mei_device *dev)
|
||||
{
|
||||
struct mei_me_client *clients;
|
||||
int b;
|
||||
|
|
@ -44,7 +44,7 @@ static void mei_hbm_me_cl_allocate(struct mei_device *dev)
|
|||
dev->me_clients_num++;
|
||||
|
||||
if (dev->me_clients_num == 0)
|
||||
return;
|
||||
return 0;
|
||||
|
||||
kfree(dev->me_clients);
|
||||
dev->me_clients = NULL;
|
||||
|
|
@ -56,12 +56,10 @@ static void mei_hbm_me_cl_allocate(struct mei_device *dev)
|
|||
sizeof(struct mei_me_client), GFP_KERNEL);
|
||||
if (!clients) {
|
||||
dev_err(&dev->pdev->dev, "memory allocation for ME clients failed.\n");
|
||||
dev->dev_state = MEI_DEV_RESETTING;
|
||||
mei_reset(dev, 1);
|
||||
return;
|
||||
return -ENOMEM;
|
||||
}
|
||||
dev->me_clients = clients;
|
||||
return;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -85,12 +83,12 @@ void mei_hbm_cl_hdr(struct mei_cl *cl, u8 hbm_cmd, void *buf, size_t len)
|
|||
}
|
||||
|
||||
/**
|
||||
* same_disconn_addr - tells if they have the same address
|
||||
* mei_hbm_cl_addr_equal - tells if they have the same address
|
||||
*
|
||||
* @file: private data of the file object.
|
||||
* @disconn: disconnection request.
|
||||
* @cl: - client
|
||||
* @buf: buffer with cl header
|
||||
*
|
||||
* returns true if addres are same
|
||||
* returns true if addresses are the same
|
||||
*/
|
||||
static inline
|
||||
bool mei_hbm_cl_addr_equal(struct mei_cl *cl, void *buf)
|
||||
|
|
@ -128,6 +126,17 @@ static bool is_treat_specially_client(struct mei_cl *cl,
|
|||
return false;
|
||||
}
|
||||
|
||||
/**
|
||||
* mei_hbm_idle - set hbm to idle state
|
||||
*
|
||||
* @dev: the device structure
|
||||
*/
|
||||
void mei_hbm_idle(struct mei_device *dev)
|
||||
{
|
||||
dev->init_clients_timer = 0;
|
||||
dev->hbm_state = MEI_HBM_IDLE;
|
||||
}
|
||||
|
||||
int mei_hbm_start_wait(struct mei_device *dev)
|
||||
{
|
||||
int ret;
|
||||
|
|
@ -137,7 +146,7 @@ int mei_hbm_start_wait(struct mei_device *dev)
|
|||
mutex_unlock(&dev->device_lock);
|
||||
ret = wait_event_interruptible_timeout(dev->wait_recvd_msg,
|
||||
dev->hbm_state == MEI_HBM_IDLE ||
|
||||
dev->hbm_state > MEI_HBM_START,
|
||||
dev->hbm_state >= MEI_HBM_STARTED,
|
||||
mei_secs_to_jiffies(MEI_INTEROP_TIMEOUT));
|
||||
mutex_lock(&dev->device_lock);
|
||||
|
||||
|
|
@ -153,12 +162,15 @@ int mei_hbm_start_wait(struct mei_device *dev)
|
|||
* mei_hbm_start_req - sends start request message.
|
||||
*
|
||||
* @dev: the device structure
|
||||
*
|
||||
* returns 0 on success and < 0 on failure
|
||||
*/
|
||||
int mei_hbm_start_req(struct mei_device *dev)
|
||||
{
|
||||
struct mei_msg_hdr *mei_hdr = &dev->wr_msg.hdr;
|
||||
struct hbm_host_version_request *start_req;
|
||||
const size_t len = sizeof(struct hbm_host_version_request);
|
||||
int ret;
|
||||
|
||||
mei_hbm_hdr(mei_hdr, len);
|
||||
|
||||
|
|
@ -170,12 +182,13 @@ int mei_hbm_start_req(struct mei_device *dev)
|
|||
start_req->host_version.minor_version = HBM_MINOR_VERSION;
|
||||
|
||||
dev->hbm_state = MEI_HBM_IDLE;
|
||||
if (mei_write_message(dev, mei_hdr, dev->wr_msg.data)) {
|
||||
dev_err(&dev->pdev->dev, "version message write failed\n");
|
||||
dev->dev_state = MEI_DEV_RESETTING;
|
||||
mei_reset(dev, 1);
|
||||
return -EIO;
|
||||
ret = mei_write_message(dev, mei_hdr, dev->wr_msg.data);
|
||||
if (ret) {
|
||||
dev_err(&dev->pdev->dev, "version message write failed: ret = %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
dev->hbm_state = MEI_HBM_START;
|
||||
dev->init_clients_timer = MEI_CLIENTS_INIT_TIMEOUT;
|
||||
return 0;
|
||||
|
|
@ -186,13 +199,15 @@ int mei_hbm_start_req(struct mei_device *dev)
|
|||
*
|
||||
* @dev: the device structure
|
||||
*
|
||||
* returns none.
|
||||
* returns 0 on success and < 0 on failure
|
||||
*/
|
||||
static void mei_hbm_enum_clients_req(struct mei_device *dev)
|
||||
static int mei_hbm_enum_clients_req(struct mei_device *dev)
|
||||
{
|
||||
struct mei_msg_hdr *mei_hdr = &dev->wr_msg.hdr;
|
||||
struct hbm_host_enum_request *enum_req;
|
||||
const size_t len = sizeof(struct hbm_host_enum_request);
|
||||
int ret;
|
||||
|
||||
/* enumerate clients */
|
||||
mei_hbm_hdr(mei_hdr, len);
|
||||
|
||||
|
|
@ -200,14 +215,15 @@ static void mei_hbm_enum_clients_req(struct mei_device *dev)
|
|||
memset(enum_req, 0, len);
|
||||
enum_req->hbm_cmd = HOST_ENUM_REQ_CMD;
|
||||
|
||||
if (mei_write_message(dev, mei_hdr, dev->wr_msg.data)) {
|
||||
dev->dev_state = MEI_DEV_RESETTING;
|
||||
dev_err(&dev->pdev->dev, "enumeration request write failed.\n");
|
||||
mei_reset(dev, 1);
|
||||
ret = mei_write_message(dev, mei_hdr, dev->wr_msg.data);
|
||||
if (ret) {
|
||||
dev_err(&dev->pdev->dev, "enumeration request write failed: ret = %d.\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
dev->hbm_state = MEI_HBM_ENUM_CLIENTS;
|
||||
dev->init_clients_timer = MEI_CLIENTS_INIT_TIMEOUT;
|
||||
return;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -215,7 +231,7 @@ static void mei_hbm_enum_clients_req(struct mei_device *dev)
|
|||
*
|
||||
* @dev: the device structure
|
||||
*
|
||||
* returns none.
|
||||
* returns 0 on success and < 0 on failure
|
||||
*/
|
||||
|
||||
static int mei_hbm_prop_req(struct mei_device *dev)
|
||||
|
|
@ -226,7 +242,7 @@ static int mei_hbm_prop_req(struct mei_device *dev)
|
|||
const size_t len = sizeof(struct hbm_props_request);
|
||||
unsigned long next_client_index;
|
||||
unsigned long client_num;
|
||||
|
||||
int ret;
|
||||
|
||||
client_num = dev->me_client_presentation_num;
|
||||
|
||||
|
|
@ -253,12 +269,11 @@ static int mei_hbm_prop_req(struct mei_device *dev)
|
|||
prop_req->hbm_cmd = HOST_CLIENT_PROPERTIES_REQ_CMD;
|
||||
prop_req->address = next_client_index;
|
||||
|
||||
if (mei_write_message(dev, mei_hdr, dev->wr_msg.data)) {
|
||||
dev->dev_state = MEI_DEV_RESETTING;
|
||||
dev_err(&dev->pdev->dev, "properties request write failed\n");
|
||||
mei_reset(dev, 1);
|
||||
|
||||
return -EIO;
|
||||
ret = mei_write_message(dev, mei_hdr, dev->wr_msg.data);
|
||||
if (ret) {
|
||||
dev_err(&dev->pdev->dev, "properties request write failed: ret = %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
dev->init_clients_timer = MEI_CLIENTS_INIT_TIMEOUT;
|
||||
|
|
@ -268,7 +283,7 @@ static int mei_hbm_prop_req(struct mei_device *dev)
|
|||
}
|
||||
|
||||
/**
|
||||
* mei_hbm_stop_req_prepare - perpare stop request message
|
||||
* mei_hbm_stop_req_prepare - prepare stop request message
|
||||
*
|
||||
* @dev - mei device
|
||||
* @mei_hdr - mei message header
|
||||
|
|
@ -289,7 +304,7 @@ static void mei_hbm_stop_req_prepare(struct mei_device *dev,
|
|||
}
|
||||
|
||||
/**
|
||||
* mei_hbm_cl_flow_control_req - sends flow control requst.
|
||||
* mei_hbm_cl_flow_control_req - sends flow control request.
|
||||
*
|
||||
* @dev: the device structure
|
||||
* @cl: client info
|
||||
|
|
@ -451,7 +466,7 @@ int mei_hbm_cl_connect_req(struct mei_device *dev, struct mei_cl *cl)
|
|||
}
|
||||
|
||||
/**
|
||||
* mei_hbm_cl_connect_res - connect resposne from the ME
|
||||
* mei_hbm_cl_connect_res - connect response from the ME
|
||||
*
|
||||
* @dev: the device structure
|
||||
* @rs: connect response bus message
|
||||
|
|
@ -505,8 +520,8 @@ static void mei_hbm_cl_connect_res(struct mei_device *dev,
|
|||
|
||||
|
||||
/**
|
||||
* mei_hbm_fw_disconnect_req - disconnect request initiated by me
|
||||
* host sends disoconnect response
|
||||
* mei_hbm_fw_disconnect_req - disconnect request initiated by ME firmware
|
||||
* host sends disconnect response
|
||||
*
|
||||
* @dev: the device structure.
|
||||
* @disconnect_req: disconnect request bus message from the me
|
||||
|
|
@ -559,8 +574,10 @@ bool mei_hbm_version_is_supported(struct mei_device *dev)
|
|||
*
|
||||
* @dev: the device structure
|
||||
* @mei_hdr: header of bus message
|
||||
*
|
||||
* returns 0 on success and < 0 on failure
|
||||
*/
|
||||
void mei_hbm_dispatch(struct mei_device *dev, struct mei_msg_hdr *hdr)
|
||||
int mei_hbm_dispatch(struct mei_device *dev, struct mei_msg_hdr *hdr)
|
||||
{
|
||||
struct mei_bus_message *mei_msg;
|
||||
struct mei_me_client *me_client;
|
||||
|
|
@ -577,8 +594,20 @@ void mei_hbm_dispatch(struct mei_device *dev, struct mei_msg_hdr *hdr)
|
|||
mei_read_slots(dev, dev->rd_msg_buf, hdr->length);
|
||||
mei_msg = (struct mei_bus_message *)dev->rd_msg_buf;
|
||||
|
||||
/* ignore spurious message and prevent reset nesting
|
||||
* hbm is put to idle during system reset
|
||||
*/
|
||||
if (dev->hbm_state == MEI_HBM_IDLE) {
|
||||
dev_dbg(&dev->pdev->dev, "hbm: state is idle ignore spurious messages\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
switch (mei_msg->hbm_cmd) {
|
||||
case HOST_START_RES_CMD:
|
||||
dev_dbg(&dev->pdev->dev, "hbm: start: response message received.\n");
|
||||
|
||||
dev->init_clients_timer = 0;
|
||||
|
||||
version_res = (struct hbm_host_version_response *)mei_msg;
|
||||
|
||||
dev_dbg(&dev->pdev->dev, "HBM VERSION: DRIVER=%02d:%02d DEVICE=%02d:%02d\n",
|
||||
|
|
@ -597,73 +626,89 @@ void mei_hbm_dispatch(struct mei_device *dev, struct mei_msg_hdr *hdr)
|
|||
}
|
||||
|
||||
if (!mei_hbm_version_is_supported(dev)) {
|
||||
dev_warn(&dev->pdev->dev, "hbm version mismatch: stopping the driver.\n");
|
||||
dev_warn(&dev->pdev->dev, "hbm: start: version mismatch - stopping the driver.\n");
|
||||
|
||||
dev->hbm_state = MEI_HBM_STOP;
|
||||
dev->hbm_state = MEI_HBM_STOPPED;
|
||||
mei_hbm_stop_req_prepare(dev, &dev->wr_msg.hdr,
|
||||
dev->wr_msg.data);
|
||||
mei_write_message(dev, &dev->wr_msg.hdr,
|
||||
dev->wr_msg.data);
|
||||
|
||||
return;
|
||||
if (mei_write_message(dev, &dev->wr_msg.hdr,
|
||||
dev->wr_msg.data)) {
|
||||
dev_err(&dev->pdev->dev, "hbm: start: failed to send stop request\n");
|
||||
return -EIO;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
if (dev->dev_state == MEI_DEV_INIT_CLIENTS &&
|
||||
dev->hbm_state == MEI_HBM_START) {
|
||||
dev->init_clients_timer = 0;
|
||||
mei_hbm_enum_clients_req(dev);
|
||||
} else {
|
||||
dev_err(&dev->pdev->dev, "reset: wrong host start response\n");
|
||||
mei_reset(dev, 1);
|
||||
return;
|
||||
if (dev->dev_state != MEI_DEV_INIT_CLIENTS ||
|
||||
dev->hbm_state != MEI_HBM_START) {
|
||||
dev_err(&dev->pdev->dev, "hbm: start: state mismatch, [%d, %d]\n",
|
||||
dev->dev_state, dev->hbm_state);
|
||||
return -EPROTO;
|
||||
}
|
||||
|
||||
dev->hbm_state = MEI_HBM_STARTED;
|
||||
|
||||
if (mei_hbm_enum_clients_req(dev)) {
|
||||
dev_err(&dev->pdev->dev, "hbm: start: failed to send enumeration request\n");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
wake_up_interruptible(&dev->wait_recvd_msg);
|
||||
dev_dbg(&dev->pdev->dev, "host start response message received.\n");
|
||||
break;
|
||||
|
||||
case CLIENT_CONNECT_RES_CMD:
|
||||
dev_dbg(&dev->pdev->dev, "hbm: client connect response: message received.\n");
|
||||
|
||||
connect_res = (struct hbm_client_connect_response *) mei_msg;
|
||||
mei_hbm_cl_connect_res(dev, connect_res);
|
||||
dev_dbg(&dev->pdev->dev, "client connect response message received.\n");
|
||||
wake_up(&dev->wait_recvd_msg);
|
||||
break;
|
||||
|
||||
case CLIENT_DISCONNECT_RES_CMD:
|
||||
dev_dbg(&dev->pdev->dev, "hbm: client disconnect response: message received.\n");
|
||||
|
||||
disconnect_res = (struct hbm_client_connect_response *) mei_msg;
|
||||
mei_hbm_cl_disconnect_res(dev, disconnect_res);
|
||||
dev_dbg(&dev->pdev->dev, "client disconnect response message received.\n");
|
||||
wake_up(&dev->wait_recvd_msg);
|
||||
break;
|
||||
|
||||
case MEI_FLOW_CONTROL_CMD:
|
||||
dev_dbg(&dev->pdev->dev, "hbm: client flow control response: message received.\n");
|
||||
|
||||
flow_control = (struct hbm_flow_control *) mei_msg;
|
||||
mei_hbm_cl_flow_control_res(dev, flow_control);
|
||||
dev_dbg(&dev->pdev->dev, "client flow control response message received.\n");
|
||||
break;
|
||||
|
||||
case HOST_CLIENT_PROPERTIES_RES_CMD:
|
||||
dev_dbg(&dev->pdev->dev, "hbm: properties response: message received.\n");
|
||||
|
||||
dev->init_clients_timer = 0;
|
||||
|
||||
if (dev->me_clients == NULL) {
|
||||
dev_err(&dev->pdev->dev, "hbm: properties response: mei_clients not allocated\n");
|
||||
return -EPROTO;
|
||||
}
|
||||
|
||||
props_res = (struct hbm_props_response *)mei_msg;
|
||||
me_client = &dev->me_clients[dev->me_client_presentation_num];
|
||||
|
||||
if (props_res->status || !dev->me_clients) {
|
||||
dev_err(&dev->pdev->dev, "reset: properties response hbm wrong status.\n");
|
||||
mei_reset(dev, 1);
|
||||
return;
|
||||
if (props_res->status) {
|
||||
dev_err(&dev->pdev->dev, "hbm: properties response: wrong status = %d\n",
|
||||
props_res->status);
|
||||
return -EPROTO;
|
||||
}
|
||||
|
||||
if (me_client->client_id != props_res->address) {
|
||||
dev_err(&dev->pdev->dev, "reset: host properties response address mismatch\n");
|
||||
mei_reset(dev, 1);
|
||||
return;
|
||||
dev_err(&dev->pdev->dev, "hbm: properties response: address mismatch %d ?= %d\n",
|
||||
me_client->client_id, props_res->address);
|
||||
return -EPROTO;
|
||||
}
|
||||
|
||||
if (dev->dev_state != MEI_DEV_INIT_CLIENTS ||
|
||||
dev->hbm_state != MEI_HBM_CLIENT_PROPERTIES) {
|
||||
dev_err(&dev->pdev->dev, "reset: unexpected properties response\n");
|
||||
mei_reset(dev, 1);
|
||||
|
||||
return;
|
||||
dev_err(&dev->pdev->dev, "hbm: properties response: state mismatch, [%d, %d]\n",
|
||||
dev->dev_state, dev->hbm_state);
|
||||
return -EPROTO;
|
||||
}
|
||||
|
||||
me_client->props = props_res->client_properties;
|
||||
|
|
@ -671,49 +716,70 @@ void mei_hbm_dispatch(struct mei_device *dev, struct mei_msg_hdr *hdr)
|
|||
dev->me_client_presentation_num++;
|
||||
|
||||
/* request property for the next client */
|
||||
mei_hbm_prop_req(dev);
|
||||
if (mei_hbm_prop_req(dev))
|
||||
return -EIO;
|
||||
|
||||
break;
|
||||
|
||||
case HOST_ENUM_RES_CMD:
|
||||
dev_dbg(&dev->pdev->dev, "hbm: enumeration response: message received\n");
|
||||
|
||||
dev->init_clients_timer = 0;
|
||||
|
||||
enum_res = (struct hbm_host_enum_response *) mei_msg;
|
||||
BUILD_BUG_ON(sizeof(dev->me_clients_map)
|
||||
< sizeof(enum_res->valid_addresses));
|
||||
memcpy(dev->me_clients_map, enum_res->valid_addresses,
|
||||
sizeof(enum_res->valid_addresses));
|
||||
if (dev->dev_state == MEI_DEV_INIT_CLIENTS &&
|
||||
dev->hbm_state == MEI_HBM_ENUM_CLIENTS) {
|
||||
dev->init_clients_timer = 0;
|
||||
mei_hbm_me_cl_allocate(dev);
|
||||
dev->hbm_state = MEI_HBM_CLIENT_PROPERTIES;
|
||||
|
||||
/* first property reqeust */
|
||||
mei_hbm_prop_req(dev);
|
||||
} else {
|
||||
dev_err(&dev->pdev->dev, "reset: unexpected enumeration response hbm.\n");
|
||||
mei_reset(dev, 1);
|
||||
return;
|
||||
if (dev->dev_state != MEI_DEV_INIT_CLIENTS ||
|
||||
dev->hbm_state != MEI_HBM_ENUM_CLIENTS) {
|
||||
dev_err(&dev->pdev->dev, "hbm: enumeration response: state mismatch, [%d, %d]\n",
|
||||
dev->dev_state, dev->hbm_state);
|
||||
return -EPROTO;
|
||||
}
|
||||
|
||||
if (mei_hbm_me_cl_allocate(dev)) {
|
||||
dev_err(&dev->pdev->dev, "hbm: enumeration response: cannot allocate clients array\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
dev->hbm_state = MEI_HBM_CLIENT_PROPERTIES;
|
||||
|
||||
/* first property request */
|
||||
if (mei_hbm_prop_req(dev))
|
||||
return -EIO;
|
||||
|
||||
break;
|
||||
|
||||
case HOST_STOP_RES_CMD:
|
||||
dev_dbg(&dev->pdev->dev, "hbm: stop response: message received\n");
|
||||
|
||||
if (dev->hbm_state != MEI_HBM_STOP)
|
||||
dev_err(&dev->pdev->dev, "unexpected stop response hbm.\n");
|
||||
dev->dev_state = MEI_DEV_DISABLED;
|
||||
dev_info(&dev->pdev->dev, "reset: FW stop response.\n");
|
||||
mei_reset(dev, 1);
|
||||
dev->init_clients_timer = 0;
|
||||
|
||||
if (dev->hbm_state != MEI_HBM_STOPPED) {
|
||||
dev_err(&dev->pdev->dev, "hbm: stop response: state mismatch, [%d, %d]\n",
|
||||
dev->dev_state, dev->hbm_state);
|
||||
return -EPROTO;
|
||||
}
|
||||
|
||||
dev->dev_state = MEI_DEV_POWER_DOWN;
|
||||
dev_info(&dev->pdev->dev, "hbm: stop response: resetting.\n");
|
||||
/* force the reset */
|
||||
return -EPROTO;
|
||||
break;
|
||||
|
||||
case CLIENT_DISCONNECT_REQ_CMD:
|
||||
/* search for client */
|
||||
dev_dbg(&dev->pdev->dev, "hbm: disconnect request: message received\n");
|
||||
|
||||
disconnect_req = (struct hbm_client_connect_request *)mei_msg;
|
||||
mei_hbm_fw_disconnect_req(dev, disconnect_req);
|
||||
break;
|
||||
|
||||
case ME_STOP_REQ_CMD:
|
||||
dev_dbg(&dev->pdev->dev, "hbm: stop request: message received\n");
|
||||
|
||||
dev->hbm_state = MEI_HBM_STOP;
|
||||
dev->hbm_state = MEI_HBM_STOPPED;
|
||||
mei_hbm_stop_req_prepare(dev, &dev->wr_ext_msg.hdr,
|
||||
dev->wr_ext_msg.data);
|
||||
break;
|
||||
|
|
@ -722,5 +788,6 @@ void mei_hbm_dispatch(struct mei_device *dev, struct mei_msg_hdr *hdr)
|
|||
break;
|
||||
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -32,13 +32,13 @@ struct mei_cl;
|
|||
enum mei_hbm_state {
|
||||
MEI_HBM_IDLE = 0,
|
||||
MEI_HBM_START,
|
||||
MEI_HBM_STARTED,
|
||||
MEI_HBM_ENUM_CLIENTS,
|
||||
MEI_HBM_CLIENT_PROPERTIES,
|
||||
MEI_HBM_STARTED,
|
||||
MEI_HBM_STOP,
|
||||
MEI_HBM_STOPPED,
|
||||
};
|
||||
|
||||
void mei_hbm_dispatch(struct mei_device *dev, struct mei_msg_hdr *hdr);
|
||||
int mei_hbm_dispatch(struct mei_device *dev, struct mei_msg_hdr *hdr);
|
||||
|
||||
static inline void mei_hbm_hdr(struct mei_msg_hdr *hdr, size_t length)
|
||||
{
|
||||
|
|
@ -49,6 +49,7 @@ static inline void mei_hbm_hdr(struct mei_msg_hdr *hdr, size_t length)
|
|||
hdr->reserved = 0;
|
||||
}
|
||||
|
||||
void mei_hbm_idle(struct mei_device *dev);
|
||||
int mei_hbm_start_req(struct mei_device *dev);
|
||||
int mei_hbm_start_wait(struct mei_device *dev);
|
||||
int mei_hbm_cl_flow_control_req(struct mei_device *dev, struct mei_cl *cl);
|
||||
|
|
|
|||
|
|
@ -185,7 +185,7 @@ static int mei_me_hw_reset(struct mei_device *dev, bool intr_enable)
|
|||
|
||||
mei_me_reg_write(hw, H_CSR, hcsr);
|
||||
|
||||
if (dev->dev_state == MEI_DEV_POWER_DOWN)
|
||||
if (intr_enable == false)
|
||||
mei_me_hw_reset_release(dev);
|
||||
|
||||
return 0;
|
||||
|
|
@ -469,7 +469,7 @@ irqreturn_t mei_me_irq_thread_handler(int irq, void *dev_id)
|
|||
struct mei_device *dev = (struct mei_device *) dev_id;
|
||||
struct mei_cl_cb complete_list;
|
||||
s32 slots;
|
||||
int rets;
|
||||
int rets = 0;
|
||||
|
||||
dev_dbg(&dev->pdev->dev, "function called after ISR to handle the interrupt processing.\n");
|
||||
/* initialize our complete list */
|
||||
|
|
@ -482,15 +482,10 @@ irqreturn_t mei_me_irq_thread_handler(int irq, void *dev_id)
|
|||
mei_clear_interrupts(dev);
|
||||
|
||||
/* check if ME wants a reset */
|
||||
if (!mei_hw_is_ready(dev) &&
|
||||
dev->dev_state != MEI_DEV_RESETTING &&
|
||||
dev->dev_state != MEI_DEV_INITIALIZING &&
|
||||
dev->dev_state != MEI_DEV_POWER_DOWN &&
|
||||
dev->dev_state != MEI_DEV_POWER_UP) {
|
||||
dev_dbg(&dev->pdev->dev, "FW not ready.\n");
|
||||
mei_reset(dev, 1);
|
||||
mutex_unlock(&dev->device_lock);
|
||||
return IRQ_HANDLED;
|
||||
if (!mei_hw_is_ready(dev) && dev->dev_state != MEI_DEV_RESETTING) {
|
||||
dev_warn(&dev->pdev->dev, "FW not ready: resetting.\n");
|
||||
schedule_work(&dev->reset_work);
|
||||
goto end;
|
||||
}
|
||||
|
||||
/* check if we need to start the dev */
|
||||
|
|
@ -500,15 +495,12 @@ irqreturn_t mei_me_irq_thread_handler(int irq, void *dev_id)
|
|||
|
||||
dev->recvd_hw_ready = true;
|
||||
wake_up_interruptible(&dev->wait_hw_ready);
|
||||
|
||||
mutex_unlock(&dev->device_lock);
|
||||
return IRQ_HANDLED;
|
||||
} else {
|
||||
|
||||
dev_dbg(&dev->pdev->dev, "Reset Completed.\n");
|
||||
mei_me_hw_reset_release(dev);
|
||||
mutex_unlock(&dev->device_lock);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
goto end;
|
||||
}
|
||||
/* check slots available for reading */
|
||||
slots = mei_count_full_read_slots(dev);
|
||||
|
|
@ -516,21 +508,23 @@ irqreturn_t mei_me_irq_thread_handler(int irq, void *dev_id)
|
|||
/* we have urgent data to send so break the read */
|
||||
if (dev->wr_ext_msg.hdr.length)
|
||||
break;
|
||||
dev_dbg(&dev->pdev->dev, "slots =%08x\n", slots);
|
||||
dev_dbg(&dev->pdev->dev, "call mei_irq_read_handler.\n");
|
||||
dev_dbg(&dev->pdev->dev, "slots to read = %08x\n", slots);
|
||||
rets = mei_irq_read_handler(dev, &complete_list, &slots);
|
||||
if (rets)
|
||||
if (rets && dev->dev_state != MEI_DEV_RESETTING) {
|
||||
schedule_work(&dev->reset_work);
|
||||
goto end;
|
||||
}
|
||||
}
|
||||
rets = mei_irq_write_handler(dev, &complete_list);
|
||||
end:
|
||||
dev_dbg(&dev->pdev->dev, "end of bottom half function.\n");
|
||||
dev->hbuf_is_ready = mei_hbuf_is_ready(dev);
|
||||
|
||||
mutex_unlock(&dev->device_lock);
|
||||
rets = mei_irq_write_handler(dev, &complete_list);
|
||||
|
||||
dev->hbuf_is_ready = mei_hbuf_is_ready(dev);
|
||||
|
||||
mei_irq_compl_handler(dev, &complete_list);
|
||||
|
||||
end:
|
||||
dev_dbg(&dev->pdev->dev, "interrupt thread end ret = %d\n", rets);
|
||||
mutex_unlock(&dev->device_lock);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
static const struct mei_hw_ops mei_me_hw_ops = {
|
||||
|
|
|
|||
|
|
@ -111,7 +111,8 @@ struct mei_msg_hdr {
|
|||
u32 me_addr:8;
|
||||
u32 host_addr:8;
|
||||
u32 length:9;
|
||||
u32 reserved:6;
|
||||
u32 reserved:5;
|
||||
u32 internal:1;
|
||||
u32 msg_complete:1;
|
||||
} __packed;
|
||||
|
||||
|
|
|
|||
|
|
@ -43,41 +43,119 @@ const char *mei_dev_state_str(int state)
|
|||
#undef MEI_DEV_STATE
|
||||
}
|
||||
|
||||
void mei_device_init(struct mei_device *dev)
|
||||
|
||||
/**
|
||||
* mei_cancel_work. Cancel mei background jobs
|
||||
*
|
||||
* @dev: the device structure
|
||||
*
|
||||
* returns 0 on success or < 0 if the reset hasn't succeeded
|
||||
*/
|
||||
void mei_cancel_work(struct mei_device *dev)
|
||||
{
|
||||
/* setup our list array */
|
||||
INIT_LIST_HEAD(&dev->file_list);
|
||||
INIT_LIST_HEAD(&dev->device_list);
|
||||
mutex_init(&dev->device_lock);
|
||||
init_waitqueue_head(&dev->wait_hw_ready);
|
||||
init_waitqueue_head(&dev->wait_recvd_msg);
|
||||
init_waitqueue_head(&dev->wait_stop_wd);
|
||||
dev->dev_state = MEI_DEV_INITIALIZING;
|
||||
cancel_work_sync(&dev->init_work);
|
||||
cancel_work_sync(&dev->reset_work);
|
||||
|
||||
mei_io_list_init(&dev->read_list);
|
||||
mei_io_list_init(&dev->write_list);
|
||||
mei_io_list_init(&dev->write_waiting_list);
|
||||
mei_io_list_init(&dev->ctrl_wr_list);
|
||||
mei_io_list_init(&dev->ctrl_rd_list);
|
||||
|
||||
INIT_DELAYED_WORK(&dev->timer_work, mei_timer);
|
||||
INIT_WORK(&dev->init_work, mei_host_client_init);
|
||||
|
||||
INIT_LIST_HEAD(&dev->wd_cl.link);
|
||||
INIT_LIST_HEAD(&dev->iamthif_cl.link);
|
||||
mei_io_list_init(&dev->amthif_cmd_list);
|
||||
mei_io_list_init(&dev->amthif_rd_complete_list);
|
||||
|
||||
bitmap_zero(dev->host_clients_map, MEI_CLIENTS_MAX);
|
||||
dev->open_handle_count = 0;
|
||||
|
||||
/*
|
||||
* Reserving the first client ID
|
||||
* 0: Reserved for MEI Bus Message communications
|
||||
*/
|
||||
bitmap_set(dev->host_clients_map, 0, 1);
|
||||
cancel_delayed_work(&dev->timer_work);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mei_device_init);
|
||||
EXPORT_SYMBOL_GPL(mei_cancel_work);
|
||||
|
||||
/**
|
||||
* mei_reset - resets host and fw.
|
||||
*
|
||||
* @dev: the device structure
|
||||
*/
|
||||
int mei_reset(struct mei_device *dev)
|
||||
{
|
||||
enum mei_dev_state state = dev->dev_state;
|
||||
bool interrupts_enabled;
|
||||
int ret;
|
||||
|
||||
if (state != MEI_DEV_INITIALIZING &&
|
||||
state != MEI_DEV_DISABLED &&
|
||||
state != MEI_DEV_POWER_DOWN &&
|
||||
state != MEI_DEV_POWER_UP)
|
||||
dev_warn(&dev->pdev->dev, "unexpected reset: dev_state = %s\n",
|
||||
mei_dev_state_str(state));
|
||||
|
||||
/* we're already in reset, cancel the init timer
|
||||
* if the reset was called due the hbm protocol error
|
||||
* we need to call it before hw start
|
||||
* so the hbm watchdog won't kick in
|
||||
*/
|
||||
mei_hbm_idle(dev);
|
||||
|
||||
/* enter reset flow */
|
||||
interrupts_enabled = state != MEI_DEV_POWER_DOWN;
|
||||
dev->dev_state = MEI_DEV_RESETTING;
|
||||
|
||||
dev->reset_count++;
|
||||
if (dev->reset_count > MEI_MAX_CONSEC_RESET) {
|
||||
dev_err(&dev->pdev->dev, "reset: reached maximal consecutive resets: disabling the device\n");
|
||||
dev->dev_state = MEI_DEV_DISABLED;
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
ret = mei_hw_reset(dev, interrupts_enabled);
|
||||
/* fall through and remove the sw state even if hw reset has failed */
|
||||
|
||||
/* no need to clean up software state in case of power up */
|
||||
if (state != MEI_DEV_INITIALIZING &&
|
||||
state != MEI_DEV_POWER_UP) {
|
||||
|
||||
/* remove all waiting requests */
|
||||
mei_cl_all_write_clear(dev);
|
||||
|
||||
mei_cl_all_disconnect(dev);
|
||||
|
||||
/* wake up all readers and writers so they can be interrupted */
|
||||
mei_cl_all_wakeup(dev);
|
||||
|
||||
/* remove entry if already in list */
|
||||
dev_dbg(&dev->pdev->dev, "remove iamthif and wd from the file list.\n");
|
||||
mei_cl_unlink(&dev->wd_cl);
|
||||
mei_cl_unlink(&dev->iamthif_cl);
|
||||
mei_amthif_reset_params(dev);
|
||||
memset(&dev->wr_ext_msg, 0, sizeof(dev->wr_ext_msg));
|
||||
}
|
||||
|
||||
|
||||
dev->me_clients_num = 0;
|
||||
dev->rd_msg_hdr = 0;
|
||||
dev->wd_pending = false;
|
||||
|
||||
if (ret) {
|
||||
dev_err(&dev->pdev->dev, "hw_reset failed ret = %d\n", ret);
|
||||
dev->dev_state = MEI_DEV_DISABLED;
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (state == MEI_DEV_POWER_DOWN) {
|
||||
dev_dbg(&dev->pdev->dev, "powering down: end of reset\n");
|
||||
dev->dev_state = MEI_DEV_DISABLED;
|
||||
return 0;
|
||||
}
|
||||
|
||||
ret = mei_hw_start(dev);
|
||||
if (ret) {
|
||||
dev_err(&dev->pdev->dev, "hw_start failed ret = %d\n", ret);
|
||||
dev->dev_state = MEI_DEV_DISABLED;
|
||||
return ret;
|
||||
}
|
||||
|
||||
dev_dbg(&dev->pdev->dev, "link is established start sending messages.\n");
|
||||
|
||||
dev->dev_state = MEI_DEV_INIT_CLIENTS;
|
||||
ret = mei_hbm_start_req(dev);
|
||||
if (ret) {
|
||||
dev_err(&dev->pdev->dev, "hbm_start failed ret = %d\n", ret);
|
||||
dev->dev_state = MEI_DEV_DISABLED;
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mei_reset);
|
||||
|
||||
/**
|
||||
* mei_start - initializes host and fw to start work.
|
||||
|
|
@ -90,14 +168,21 @@ int mei_start(struct mei_device *dev)
|
|||
{
|
||||
mutex_lock(&dev->device_lock);
|
||||
|
||||
/* acknowledge interrupt and stop interupts */
|
||||
/* acknowledge interrupt and stop interrupts */
|
||||
mei_clear_interrupts(dev);
|
||||
|
||||
mei_hw_config(dev);
|
||||
|
||||
dev_dbg(&dev->pdev->dev, "reset in start the mei device.\n");
|
||||
|
||||
mei_reset(dev, 1);
|
||||
dev->dev_state = MEI_DEV_INITIALIZING;
|
||||
dev->reset_count = 0;
|
||||
mei_reset(dev);
|
||||
|
||||
if (dev->dev_state == MEI_DEV_DISABLED) {
|
||||
dev_err(&dev->pdev->dev, "reset failed");
|
||||
goto err;
|
||||
}
|
||||
|
||||
if (mei_hbm_start_wait(dev)) {
|
||||
dev_err(&dev->pdev->dev, "HBM haven't started");
|
||||
|
|
@ -132,101 +217,64 @@ err:
|
|||
EXPORT_SYMBOL_GPL(mei_start);
|
||||
|
||||
/**
|
||||
* mei_reset - resets host and fw.
|
||||
* mei_restart - restart device after suspend
|
||||
*
|
||||
* @dev: the device structure
|
||||
* @interrupts_enabled: if interrupt should be enabled after reset.
|
||||
*
|
||||
* returns 0 on success or -ENODEV if the restart hasn't succeeded
|
||||
*/
|
||||
void mei_reset(struct mei_device *dev, int interrupts_enabled)
|
||||
int mei_restart(struct mei_device *dev)
|
||||
{
|
||||
bool unexpected;
|
||||
int ret;
|
||||
int err;
|
||||
|
||||
unexpected = (dev->dev_state != MEI_DEV_INITIALIZING &&
|
||||
dev->dev_state != MEI_DEV_DISABLED &&
|
||||
dev->dev_state != MEI_DEV_POWER_DOWN &&
|
||||
dev->dev_state != MEI_DEV_POWER_UP);
|
||||
mutex_lock(&dev->device_lock);
|
||||
|
||||
if (unexpected)
|
||||
dev_warn(&dev->pdev->dev, "unexpected reset: dev_state = %s\n",
|
||||
mei_dev_state_str(dev->dev_state));
|
||||
mei_clear_interrupts(dev);
|
||||
|
||||
ret = mei_hw_reset(dev, interrupts_enabled);
|
||||
if (ret) {
|
||||
dev_err(&dev->pdev->dev, "hw reset failed disabling the device\n");
|
||||
interrupts_enabled = false;
|
||||
dev->dev_state = MEI_DEV_DISABLED;
|
||||
}
|
||||
dev->dev_state = MEI_DEV_POWER_UP;
|
||||
dev->reset_count = 0;
|
||||
|
||||
dev->hbm_state = MEI_HBM_IDLE;
|
||||
err = mei_reset(dev);
|
||||
|
||||
if (dev->dev_state != MEI_DEV_INITIALIZING &&
|
||||
dev->dev_state != MEI_DEV_POWER_UP) {
|
||||
if (dev->dev_state != MEI_DEV_DISABLED &&
|
||||
dev->dev_state != MEI_DEV_POWER_DOWN)
|
||||
dev->dev_state = MEI_DEV_RESETTING;
|
||||
mutex_unlock(&dev->device_lock);
|
||||
|
||||
/* remove all waiting requests */
|
||||
mei_cl_all_write_clear(dev);
|
||||
|
||||
mei_cl_all_disconnect(dev);
|
||||
|
||||
/* wake up all readings so they can be interrupted */
|
||||
mei_cl_all_wakeup(dev);
|
||||
|
||||
/* remove entry if already in list */
|
||||
dev_dbg(&dev->pdev->dev, "remove iamthif and wd from the file list.\n");
|
||||
mei_cl_unlink(&dev->wd_cl);
|
||||
mei_cl_unlink(&dev->iamthif_cl);
|
||||
mei_amthif_reset_params(dev);
|
||||
memset(&dev->wr_ext_msg, 0, sizeof(dev->wr_ext_msg));
|
||||
}
|
||||
|
||||
/* we're already in reset, cancel the init timer */
|
||||
dev->init_clients_timer = 0;
|
||||
|
||||
dev->me_clients_num = 0;
|
||||
dev->rd_msg_hdr = 0;
|
||||
dev->wd_pending = false;
|
||||
|
||||
if (!interrupts_enabled) {
|
||||
dev_dbg(&dev->pdev->dev, "intr not enabled end of reset\n");
|
||||
return;
|
||||
}
|
||||
|
||||
ret = mei_hw_start(dev);
|
||||
if (ret) {
|
||||
dev_err(&dev->pdev->dev, "hw_start failed disabling the device\n");
|
||||
dev->dev_state = MEI_DEV_DISABLED;
|
||||
return;
|
||||
}
|
||||
|
||||
dev_dbg(&dev->pdev->dev, "link is established start sending messages.\n");
|
||||
/* link is established * start sending messages. */
|
||||
|
||||
dev->dev_state = MEI_DEV_INIT_CLIENTS;
|
||||
|
||||
mei_hbm_start_req(dev);
|
||||
if (err || dev->dev_state == MEI_DEV_DISABLED)
|
||||
return -ENODEV;
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mei_restart);
|
||||
|
||||
|
||||
static void mei_reset_work(struct work_struct *work)
|
||||
{
|
||||
struct mei_device *dev =
|
||||
container_of(work, struct mei_device, reset_work);
|
||||
|
||||
mutex_lock(&dev->device_lock);
|
||||
|
||||
mei_reset(dev);
|
||||
|
||||
mutex_unlock(&dev->device_lock);
|
||||
|
||||
if (dev->dev_state == MEI_DEV_DISABLED)
|
||||
dev_err(&dev->pdev->dev, "reset failed");
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mei_reset);
|
||||
|
||||
void mei_stop(struct mei_device *dev)
|
||||
{
|
||||
dev_dbg(&dev->pdev->dev, "stopping the device.\n");
|
||||
|
||||
flush_scheduled_work();
|
||||
mei_cancel_work(dev);
|
||||
|
||||
mei_nfc_host_exit(dev);
|
||||
|
||||
mutex_lock(&dev->device_lock);
|
||||
|
||||
cancel_delayed_work(&dev->timer_work);
|
||||
|
||||
mei_wd_stop(dev);
|
||||
|
||||
mei_nfc_host_exit();
|
||||
|
||||
dev->dev_state = MEI_DEV_POWER_DOWN;
|
||||
mei_reset(dev, 0);
|
||||
mei_reset(dev);
|
||||
|
||||
mutex_unlock(&dev->device_lock);
|
||||
|
||||
|
|
@ -236,3 +284,41 @@ EXPORT_SYMBOL_GPL(mei_stop);
|
|||
|
||||
|
||||
|
||||
void mei_device_init(struct mei_device *dev)
|
||||
{
|
||||
/* setup our list array */
|
||||
INIT_LIST_HEAD(&dev->file_list);
|
||||
INIT_LIST_HEAD(&dev->device_list);
|
||||
mutex_init(&dev->device_lock);
|
||||
init_waitqueue_head(&dev->wait_hw_ready);
|
||||
init_waitqueue_head(&dev->wait_recvd_msg);
|
||||
init_waitqueue_head(&dev->wait_stop_wd);
|
||||
dev->dev_state = MEI_DEV_INITIALIZING;
|
||||
dev->reset_count = 0;
|
||||
|
||||
mei_io_list_init(&dev->read_list);
|
||||
mei_io_list_init(&dev->write_list);
|
||||
mei_io_list_init(&dev->write_waiting_list);
|
||||
mei_io_list_init(&dev->ctrl_wr_list);
|
||||
mei_io_list_init(&dev->ctrl_rd_list);
|
||||
|
||||
INIT_DELAYED_WORK(&dev->timer_work, mei_timer);
|
||||
INIT_WORK(&dev->init_work, mei_host_client_init);
|
||||
INIT_WORK(&dev->reset_work, mei_reset_work);
|
||||
|
||||
INIT_LIST_HEAD(&dev->wd_cl.link);
|
||||
INIT_LIST_HEAD(&dev->iamthif_cl.link);
|
||||
mei_io_list_init(&dev->amthif_cmd_list);
|
||||
mei_io_list_init(&dev->amthif_rd_complete_list);
|
||||
|
||||
bitmap_zero(dev->host_clients_map, MEI_CLIENTS_MAX);
|
||||
dev->open_handle_count = 0;
|
||||
|
||||
/*
|
||||
* Reserving the first client ID
|
||||
* 0: Reserved for MEI Bus Message communications
|
||||
*/
|
||||
bitmap_set(dev->host_clients_map, 0, 1);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mei_device_init);
|
||||
|
||||
|
|
|
|||
|
|
@ -31,7 +31,7 @@
|
|||
|
||||
|
||||
/**
|
||||
* mei_irq_compl_handler - dispatch complete handelers
|
||||
* mei_irq_compl_handler - dispatch complete handlers
|
||||
* for the completed callbacks
|
||||
*
|
||||
* @dev - mei device
|
||||
|
|
@ -301,13 +301,11 @@ int mei_irq_read_handler(struct mei_device *dev,
|
|||
struct mei_cl_cb *cmpl_list, s32 *slots)
|
||||
{
|
||||
struct mei_msg_hdr *mei_hdr;
|
||||
struct mei_cl *cl_pos = NULL;
|
||||
struct mei_cl *cl_next = NULL;
|
||||
int ret = 0;
|
||||
struct mei_cl *cl;
|
||||
int ret;
|
||||
|
||||
if (!dev->rd_msg_hdr) {
|
||||
dev->rd_msg_hdr = mei_read_hdr(dev);
|
||||
dev_dbg(&dev->pdev->dev, "slots =%08x.\n", *slots);
|
||||
(*slots)--;
|
||||
dev_dbg(&dev->pdev->dev, "slots =%08x.\n", *slots);
|
||||
}
|
||||
|
|
@ -315,61 +313,67 @@ int mei_irq_read_handler(struct mei_device *dev,
|
|||
dev_dbg(&dev->pdev->dev, MEI_HDR_FMT, MEI_HDR_PRM(mei_hdr));
|
||||
|
||||
if (mei_hdr->reserved || !dev->rd_msg_hdr) {
|
||||
dev_dbg(&dev->pdev->dev, "corrupted message header.\n");
|
||||
dev_err(&dev->pdev->dev, "corrupted message header 0x%08X\n",
|
||||
dev->rd_msg_hdr);
|
||||
ret = -EBADMSG;
|
||||
goto end;
|
||||
}
|
||||
|
||||
if (mei_hdr->host_addr || mei_hdr->me_addr) {
|
||||
list_for_each_entry_safe(cl_pos, cl_next,
|
||||
&dev->file_list, link) {
|
||||
dev_dbg(&dev->pdev->dev,
|
||||
"list_for_each_entry_safe read host"
|
||||
" client = %d, ME client = %d\n",
|
||||
cl_pos->host_client_id,
|
||||
cl_pos->me_client_id);
|
||||
if (mei_cl_hbm_equal(cl_pos, mei_hdr))
|
||||
break;
|
||||
}
|
||||
|
||||
if (&cl_pos->link == &dev->file_list) {
|
||||
dev_dbg(&dev->pdev->dev, "corrupted message header\n");
|
||||
ret = -EBADMSG;
|
||||
goto end;
|
||||
}
|
||||
}
|
||||
if (((*slots) * sizeof(u32)) < mei_hdr->length) {
|
||||
dev_err(&dev->pdev->dev,
|
||||
"we can't read the message slots =%08x.\n",
|
||||
if (mei_slots2data(*slots) < mei_hdr->length) {
|
||||
dev_err(&dev->pdev->dev, "less data available than length=%08x.\n",
|
||||
*slots);
|
||||
/* we can't read the message */
|
||||
ret = -ERANGE;
|
||||
goto end;
|
||||
}
|
||||
|
||||
/* decide where to read the message too */
|
||||
if (!mei_hdr->host_addr) {
|
||||
dev_dbg(&dev->pdev->dev, "call mei_hbm_dispatch.\n");
|
||||
mei_hbm_dispatch(dev, mei_hdr);
|
||||
dev_dbg(&dev->pdev->dev, "end mei_hbm_dispatch.\n");
|
||||
} else if (mei_hdr->host_addr == dev->iamthif_cl.host_client_id &&
|
||||
(MEI_FILE_CONNECTED == dev->iamthif_cl.state) &&
|
||||
(dev->iamthif_state == MEI_IAMTHIF_READING)) {
|
||||
|
||||
dev_dbg(&dev->pdev->dev, "call mei_amthif_irq_read_msg.\n");
|
||||
dev_dbg(&dev->pdev->dev, MEI_HDR_FMT, MEI_HDR_PRM(mei_hdr));
|
||||
|
||||
ret = mei_amthif_irq_read_msg(dev, mei_hdr, cmpl_list);
|
||||
if (ret)
|
||||
goto end;
|
||||
} else {
|
||||
dev_dbg(&dev->pdev->dev, "call mei_cl_irq_read_msg.\n");
|
||||
dev_dbg(&dev->pdev->dev, MEI_HDR_FMT, MEI_HDR_PRM(mei_hdr));
|
||||
ret = mei_cl_irq_read_msg(dev, mei_hdr, cmpl_list);
|
||||
if (ret)
|
||||
/* HBM message */
|
||||
if (mei_hdr->host_addr == 0 && mei_hdr->me_addr == 0) {
|
||||
ret = mei_hbm_dispatch(dev, mei_hdr);
|
||||
if (ret) {
|
||||
dev_dbg(&dev->pdev->dev, "mei_hbm_dispatch failed ret = %d\n",
|
||||
ret);
|
||||
goto end;
|
||||
}
|
||||
goto reset_slots;
|
||||
}
|
||||
|
||||
/* find recipient cl */
|
||||
list_for_each_entry(cl, &dev->file_list, link) {
|
||||
if (mei_cl_hbm_equal(cl, mei_hdr)) {
|
||||
cl_dbg(dev, cl, "got a message\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* if no recipient cl was found we assume corrupted header */
|
||||
if (&cl->link == &dev->file_list) {
|
||||
dev_err(&dev->pdev->dev, "no destination client found 0x%08X\n",
|
||||
dev->rd_msg_hdr);
|
||||
ret = -EBADMSG;
|
||||
goto end;
|
||||
}
|
||||
|
||||
if (mei_hdr->host_addr == dev->iamthif_cl.host_client_id &&
|
||||
MEI_FILE_CONNECTED == dev->iamthif_cl.state &&
|
||||
dev->iamthif_state == MEI_IAMTHIF_READING) {
|
||||
|
||||
ret = mei_amthif_irq_read_msg(dev, mei_hdr, cmpl_list);
|
||||
if (ret) {
|
||||
dev_err(&dev->pdev->dev, "mei_amthif_irq_read_msg failed = %d\n",
|
||||
ret);
|
||||
goto end;
|
||||
}
|
||||
} else {
|
||||
ret = mei_cl_irq_read_msg(dev, mei_hdr, cmpl_list);
|
||||
if (ret) {
|
||||
dev_err(&dev->pdev->dev, "mei_cl_irq_read_msg failed = %d\n",
|
||||
ret);
|
||||
goto end;
|
||||
}
|
||||
}
|
||||
|
||||
reset_slots:
|
||||
/* reset the number of slots and header */
|
||||
*slots = mei_count_full_read_slots(dev);
|
||||
dev->rd_msg_hdr = 0;
|
||||
|
|
@ -533,7 +537,6 @@ EXPORT_SYMBOL_GPL(mei_irq_write_handler);
|
|||
*
|
||||
* @work: pointer to the work_struct structure
|
||||
*
|
||||
* NOTE: This function is called by timer interrupt work
|
||||
*/
|
||||
void mei_timer(struct work_struct *work)
|
||||
{
|
||||
|
|
@ -548,24 +551,30 @@ void mei_timer(struct work_struct *work)
|
|||
|
||||
|
||||
mutex_lock(&dev->device_lock);
|
||||
if (dev->dev_state != MEI_DEV_ENABLED) {
|
||||
if (dev->dev_state == MEI_DEV_INIT_CLIENTS) {
|
||||
if (dev->init_clients_timer) {
|
||||
if (--dev->init_clients_timer == 0) {
|
||||
dev_err(&dev->pdev->dev, "reset: init clients timeout hbm_state = %d.\n",
|
||||
dev->hbm_state);
|
||||
mei_reset(dev, 1);
|
||||
}
|
||||
|
||||
/* Catch interrupt stalls during HBM init handshake */
|
||||
if (dev->dev_state == MEI_DEV_INIT_CLIENTS &&
|
||||
dev->hbm_state != MEI_HBM_IDLE) {
|
||||
|
||||
if (dev->init_clients_timer) {
|
||||
if (--dev->init_clients_timer == 0) {
|
||||
dev_err(&dev->pdev->dev, "timer: init clients timeout hbm_state = %d.\n",
|
||||
dev->hbm_state);
|
||||
mei_reset(dev);
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (dev->dev_state != MEI_DEV_ENABLED)
|
||||
goto out;
|
||||
|
||||
/*** connect/disconnect timeouts ***/
|
||||
list_for_each_entry_safe(cl_pos, cl_next, &dev->file_list, link) {
|
||||
if (cl_pos->timer_count) {
|
||||
if (--cl_pos->timer_count == 0) {
|
||||
dev_err(&dev->pdev->dev, "reset: connect/disconnect timeout.\n");
|
||||
mei_reset(dev, 1);
|
||||
dev_err(&dev->pdev->dev, "timer: connect/disconnect timeout.\n");
|
||||
mei_reset(dev);
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
|
|
@ -573,8 +582,8 @@ void mei_timer(struct work_struct *work)
|
|||
|
||||
if (dev->iamthif_stall_timer) {
|
||||
if (--dev->iamthif_stall_timer == 0) {
|
||||
dev_err(&dev->pdev->dev, "reset: amthif hanged.\n");
|
||||
mei_reset(dev, 1);
|
||||
dev_err(&dev->pdev->dev, "timer: amthif hanged.\n");
|
||||
mei_reset(dev);
|
||||
dev->iamthif_msg_buf_size = 0;
|
||||
dev->iamthif_msg_buf_index = 0;
|
||||
dev->iamthif_canceled = false;
|
||||
|
|
@ -627,7 +636,8 @@ void mei_timer(struct work_struct *work)
|
|||
}
|
||||
}
|
||||
out:
|
||||
schedule_delayed_work(&dev->timer_work, 2 * HZ);
|
||||
if (dev->dev_state != MEI_DEV_DISABLED)
|
||||
schedule_delayed_work(&dev->timer_work, 2 * HZ);
|
||||
mutex_unlock(&dev->device_lock);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -48,7 +48,7 @@
|
|||
*
|
||||
* @inode: pointer to inode structure
|
||||
* @file: pointer to file structure
|
||||
e
|
||||
*
|
||||
* returns 0 on success, <0 on error
|
||||
*/
|
||||
static int mei_open(struct inode *inode, struct file *file)
|
||||
|
|
|
|||
|
|
@ -60,12 +60,17 @@ extern const uuid_le mei_wd_guid;
|
|||
*/
|
||||
#define MEI_CLIENTS_MAX 256
|
||||
|
||||
/*
|
||||
* maximum number of consecutive resets
|
||||
*/
|
||||
#define MEI_MAX_CONSEC_RESET 3
|
||||
|
||||
/*
|
||||
* Number of File descriptors/handles
|
||||
* that can be opened to the driver.
|
||||
*
|
||||
* Limit to 255: 256 Total Clients
|
||||
* minus internal client for MEI Bus Messags
|
||||
* minus internal client for MEI Bus Messages
|
||||
*/
|
||||
#define MEI_MAX_OPEN_HANDLE_COUNT (MEI_CLIENTS_MAX - 1)
|
||||
|
||||
|
|
@ -178,9 +183,10 @@ struct mei_cl_cb {
|
|||
unsigned long buf_idx;
|
||||
unsigned long read_time;
|
||||
struct file *file_object;
|
||||
u32 internal:1;
|
||||
};
|
||||
|
||||
/* MEI client instance carried as file->pirvate_data*/
|
||||
/* MEI client instance carried as file->private_data*/
|
||||
struct mei_cl {
|
||||
struct list_head link;
|
||||
struct mei_device *dev;
|
||||
|
|
@ -326,6 +332,7 @@ struct mei_cl_device {
|
|||
/**
|
||||
* struct mei_device - MEI private device struct
|
||||
|
||||
* @reset_count - limits the number of consecutive resets
|
||||
* @hbm_state - state of host bus message protocol
|
||||
* @mem_addr - mem mapped base register address
|
||||
|
||||
|
|
@ -369,6 +376,7 @@ struct mei_device {
|
|||
/*
|
||||
* mei device states
|
||||
*/
|
||||
unsigned long reset_count;
|
||||
enum mei_dev_state dev_state;
|
||||
enum mei_hbm_state hbm_state;
|
||||
u16 init_clients_timer;
|
||||
|
|
@ -427,6 +435,7 @@ struct mei_device {
|
|||
bool iamthif_canceled;
|
||||
|
||||
struct work_struct init_work;
|
||||
struct work_struct reset_work;
|
||||
|
||||
/* List of bus devices */
|
||||
struct list_head device_list;
|
||||
|
|
@ -456,13 +465,25 @@ static inline u32 mei_data2slots(size_t length)
|
|||
return DIV_ROUND_UP(sizeof(struct mei_msg_hdr) + length, 4);
|
||||
}
|
||||
|
||||
/**
|
||||
* mei_slots2data- get data in slots - bytes from slots
|
||||
* @slots - number of available slots
|
||||
* returns - number of bytes in slots
|
||||
*/
|
||||
static inline u32 mei_slots2data(int slots)
|
||||
{
|
||||
return slots * 4;
|
||||
}
|
||||
|
||||
/*
|
||||
* mei init function prototypes
|
||||
*/
|
||||
void mei_device_init(struct mei_device *dev);
|
||||
void mei_reset(struct mei_device *dev, int interrupts);
|
||||
int mei_reset(struct mei_device *dev);
|
||||
int mei_start(struct mei_device *dev);
|
||||
int mei_restart(struct mei_device *dev);
|
||||
void mei_stop(struct mei_device *dev);
|
||||
void mei_cancel_work(struct mei_device *dev);
|
||||
|
||||
/*
|
||||
* MEI interrupt functions prototype
|
||||
|
|
@ -510,7 +531,7 @@ int mei_amthif_irq_read(struct mei_device *dev, s32 *slots);
|
|||
* NFC functions
|
||||
*/
|
||||
int mei_nfc_host_init(struct mei_device *dev);
|
||||
void mei_nfc_host_exit(void);
|
||||
void mei_nfc_host_exit(struct mei_device *dev);
|
||||
|
||||
/*
|
||||
* NFC Client UUID
|
||||
|
|
@ -626,9 +647,9 @@ static inline void mei_dbgfs_deregister(struct mei_device *dev) {}
|
|||
int mei_register(struct mei_device *dev);
|
||||
void mei_deregister(struct mei_device *dev);
|
||||
|
||||
#define MEI_HDR_FMT "hdr:host=%02d me=%02d len=%d comp=%1d"
|
||||
#define MEI_HDR_FMT "hdr:host=%02d me=%02d len=%d internal=%1d comp=%1d"
|
||||
#define MEI_HDR_PRM(hdr) \
|
||||
(hdr)->host_addr, (hdr)->me_addr, \
|
||||
(hdr)->length, (hdr)->msg_complete
|
||||
(hdr)->length, (hdr)->internal, (hdr)->msg_complete
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -92,7 +92,7 @@ struct mei_nfc_hci_hdr {
|
|||
* @cl: NFC host client
|
||||
* @cl_info: NFC info host client
|
||||
* @init_work: perform connection to the info client
|
||||
* @fw_ivn: NFC Intervace Version Number
|
||||
* @fw_ivn: NFC Interface Version Number
|
||||
* @vendor_id: NFC manufacturer ID
|
||||
* @radio_type: NFC radio type
|
||||
*/
|
||||
|
|
@ -163,7 +163,7 @@ static int mei_nfc_build_bus_name(struct mei_nfc_dev *ndev)
|
|||
return 0;
|
||||
|
||||
default:
|
||||
dev_err(&dev->pdev->dev, "Unknow radio type 0x%x\n",
|
||||
dev_err(&dev->pdev->dev, "Unknown radio type 0x%x\n",
|
||||
ndev->radio_type);
|
||||
|
||||
return -EINVAL;
|
||||
|
|
@ -175,14 +175,14 @@ static int mei_nfc_build_bus_name(struct mei_nfc_dev *ndev)
|
|||
ndev->bus_name = "pn544";
|
||||
return 0;
|
||||
default:
|
||||
dev_err(&dev->pdev->dev, "Unknow radio type 0x%x\n",
|
||||
dev_err(&dev->pdev->dev, "Unknown radio type 0x%x\n",
|
||||
ndev->radio_type);
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
default:
|
||||
dev_err(&dev->pdev->dev, "Unknow vendor ID 0x%x\n",
|
||||
dev_err(&dev->pdev->dev, "Unknown vendor ID 0x%x\n",
|
||||
ndev->vendor_id);
|
||||
|
||||
return -EINVAL;
|
||||
|
|
@ -469,7 +469,9 @@ static void mei_nfc_init(struct work_struct *work)
|
|||
return;
|
||||
|
||||
err:
|
||||
mutex_lock(&dev->device_lock);
|
||||
mei_nfc_free(ndev);
|
||||
mutex_unlock(&dev->device_lock);
|
||||
|
||||
return;
|
||||
}
|
||||
|
|
@ -481,7 +483,7 @@ int mei_nfc_host_init(struct mei_device *dev)
|
|||
struct mei_cl *cl_info, *cl = NULL;
|
||||
int i, ret;
|
||||
|
||||
/* already initialzed */
|
||||
/* already initialized */
|
||||
if (ndev->cl_info)
|
||||
return 0;
|
||||
|
||||
|
|
@ -547,12 +549,16 @@ err:
|
|||
return ret;
|
||||
}
|
||||
|
||||
void mei_nfc_host_exit(void)
|
||||
void mei_nfc_host_exit(struct mei_device *dev)
|
||||
{
|
||||
struct mei_nfc_dev *ndev = &nfc_dev;
|
||||
|
||||
cancel_work_sync(&ndev->init_work);
|
||||
|
||||
mutex_lock(&dev->device_lock);
|
||||
if (ndev->cl && ndev->cl->device)
|
||||
mei_cl_remove_device(ndev->cl->device);
|
||||
|
||||
mei_nfc_free(ndev);
|
||||
mutex_unlock(&dev->device_lock);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -144,6 +144,21 @@ static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|||
dev_err(&pdev->dev, "failed to get pci regions.\n");
|
||||
goto disable_device;
|
||||
}
|
||||
|
||||
if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) ||
|
||||
dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
|
||||
|
||||
err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
|
||||
if (err)
|
||||
err = dma_set_coherent_mask(&pdev->dev,
|
||||
DMA_BIT_MASK(32));
|
||||
}
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
|
||||
goto release_regions;
|
||||
}
|
||||
|
||||
|
||||
/* allocates and initializes the mei dev structure */
|
||||
dev = mei_me_dev_init(pdev);
|
||||
if (!dev) {
|
||||
|
|
@ -197,8 +212,8 @@ static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|||
return 0;
|
||||
|
||||
release_irq:
|
||||
mei_cancel_work(dev);
|
||||
mei_disable_interrupts(dev);
|
||||
flush_scheduled_work();
|
||||
free_irq(pdev->irq, dev);
|
||||
disable_msi:
|
||||
pci_disable_msi(pdev);
|
||||
|
|
@ -306,16 +321,14 @@ static int mei_me_pci_resume(struct device *device)
|
|||
return err;
|
||||
}
|
||||
|
||||
mutex_lock(&dev->device_lock);
|
||||
dev->dev_state = MEI_DEV_POWER_UP;
|
||||
mei_clear_interrupts(dev);
|
||||
mei_reset(dev, 1);
|
||||
mutex_unlock(&dev->device_lock);
|
||||
err = mei_restart(dev);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
/* Start timer if stopped in suspend */
|
||||
schedule_delayed_work(&dev->timer_work, HZ);
|
||||
|
||||
return err;
|
||||
return 0;
|
||||
}
|
||||
static SIMPLE_DEV_PM_OPS(mei_me_pm_ops, mei_me_pci_suspend, mei_me_pci_resume);
|
||||
#define MEI_ME_PM_OPS (&mei_me_pm_ops)
|
||||
|
|
|
|||
|
|
@ -115,6 +115,7 @@ int mei_wd_send(struct mei_device *dev)
|
|||
hdr.me_addr = dev->wd_cl.me_client_id;
|
||||
hdr.msg_complete = 1;
|
||||
hdr.reserved = 0;
|
||||
hdr.internal = 0;
|
||||
|
||||
if (!memcmp(dev->wd_data, mei_start_wd_params, MEI_WD_HDR_SIZE))
|
||||
hdr.length = MEI_WD_START_MSG_SIZE;
|
||||
|
|
|
|||
|
|
@ -112,7 +112,7 @@ struct mic_device {
|
|||
struct work_struct shutdown_work;
|
||||
u8 state;
|
||||
u8 shutdown_status;
|
||||
struct sysfs_dirent *state_sysfs;
|
||||
struct kernfs_node *state_sysfs;
|
||||
struct completion reset_wait;
|
||||
void *log_buf_addr;
|
||||
int *log_buf_len;
|
||||
|
|
@ -134,6 +134,8 @@ struct mic_device {
|
|||
* @send_intr: Send an interrupt for a particular doorbell on the card.
|
||||
* @ack_interrupt: Hardware specific operations to ack the h/w on
|
||||
* receipt of an interrupt.
|
||||
* @intr_workarounds: Hardware specific workarounds needed after
|
||||
* handling an interrupt.
|
||||
* @reset: Reset the remote processor.
|
||||
* @reset_fw_ready: Reset firmware ready field.
|
||||
* @is_fw_ready: Check if firmware is ready for OS download.
|
||||
|
|
@ -149,6 +151,7 @@ struct mic_hw_ops {
|
|||
void (*write_spad)(struct mic_device *mdev, unsigned int idx, u32 val);
|
||||
void (*send_intr)(struct mic_device *mdev, int doorbell);
|
||||
u32 (*ack_interrupt)(struct mic_device *mdev);
|
||||
void (*intr_workarounds)(struct mic_device *mdev);
|
||||
void (*reset)(struct mic_device *mdev);
|
||||
void (*reset_fw_ready)(struct mic_device *mdev);
|
||||
bool (*is_fw_ready)(struct mic_device *mdev);
|
||||
|
|
|
|||
|
|
@ -115,7 +115,7 @@ static irqreturn_t mic_shutdown_db(int irq, void *data)
|
|||
struct mic_device *mdev = data;
|
||||
struct mic_bootparam *bootparam = mdev->dp;
|
||||
|
||||
mdev->ops->ack_interrupt(mdev);
|
||||
mdev->ops->intr_workarounds(mdev);
|
||||
|
||||
switch (bootparam->shutdown_status) {
|
||||
case MIC_HALTED:
|
||||
|
|
|
|||
|
|
@ -156,7 +156,8 @@ static int mic_vringh_copy(struct mic_vdev *mvdev, struct vringh_kiov *iov,
|
|||
static int _mic_virtio_copy(struct mic_vdev *mvdev,
|
||||
struct mic_copy_desc *copy)
|
||||
{
|
||||
int ret = 0, iovcnt = copy->iovcnt;
|
||||
int ret = 0;
|
||||
u32 iovcnt = copy->iovcnt;
|
||||
struct iovec iov;
|
||||
struct iovec __user *u_iov = copy->iov;
|
||||
void __user *ubuf = NULL;
|
||||
|
|
@ -369,7 +370,7 @@ static irqreturn_t mic_virtio_intr_handler(int irq, void *data)
|
|||
struct mic_vdev *mvdev = data;
|
||||
struct mic_device *mdev = mvdev->mdev;
|
||||
|
||||
mdev->ops->ack_interrupt(mdev);
|
||||
mdev->ops->intr_workarounds(mdev);
|
||||
schedule_work(&mvdev->virtio_bh_work);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -174,35 +174,38 @@ static void mic_x100_send_intr(struct mic_device *mdev, int doorbell)
|
|||
}
|
||||
|
||||
/**
|
||||
* mic_ack_interrupt - Device specific interrupt handling.
|
||||
* @mdev: pointer to mic_device instance
|
||||
* mic_x100_ack_interrupt - Read the interrupt sources register and
|
||||
* clear it. This function will be called in the MSI/INTx case.
|
||||
* @mdev: Pointer to mic_device instance.
|
||||
*
|
||||
* Returns: bitmask of doorbell events triggered.
|
||||
* Returns: bitmask of interrupt sources triggered.
|
||||
*/
|
||||
static u32 mic_x100_ack_interrupt(struct mic_device *mdev)
|
||||
{
|
||||
u32 reg = 0;
|
||||
struct mic_mw *mw = &mdev->mmio;
|
||||
u32 sicr0 = MIC_X100_SBOX_BASE_ADDRESS + MIC_X100_SBOX_SICR0;
|
||||
u32 reg = mic_mmio_read(&mdev->mmio, sicr0);
|
||||
mic_mmio_write(&mdev->mmio, reg, sicr0);
|
||||
return reg;
|
||||
}
|
||||
|
||||
/**
|
||||
* mic_x100_intr_workarounds - These hardware specific workarounds are
|
||||
* to be invoked everytime an interrupt is handled.
|
||||
* @mdev: Pointer to mic_device instance.
|
||||
*
|
||||
* Returns: none
|
||||
*/
|
||||
static void mic_x100_intr_workarounds(struct mic_device *mdev)
|
||||
{
|
||||
struct mic_mw *mw = &mdev->mmio;
|
||||
|
||||
/* Clear pending bit array. */
|
||||
if (MIC_A0_STEP == mdev->stepping)
|
||||
mic_mmio_write(mw, 1, MIC_X100_SBOX_BASE_ADDRESS +
|
||||
MIC_X100_SBOX_MSIXPBACR);
|
||||
|
||||
if (mdev->irq_info.num_vectors <= 1) {
|
||||
reg = mic_mmio_read(mw, sicr0);
|
||||
|
||||
if (unlikely(!reg))
|
||||
goto done;
|
||||
|
||||
mic_mmio_write(mw, reg, sicr0);
|
||||
}
|
||||
|
||||
if (mdev->stepping >= MIC_B0_STEP)
|
||||
mdev->intr_ops->enable_interrupts(mdev);
|
||||
done:
|
||||
return reg;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -553,6 +556,7 @@ struct mic_hw_ops mic_x100_ops = {
|
|||
.write_spad = mic_x100_write_spad,
|
||||
.send_intr = mic_x100_send_intr,
|
||||
.ack_interrupt = mic_x100_ack_interrupt,
|
||||
.intr_workarounds = mic_x100_intr_workarounds,
|
||||
.reset = mic_x100_hw_reset,
|
||||
.reset_fw_ready = mic_x100_reset_fw_ready,
|
||||
.is_fw_ready = mic_x100_is_fw_ready,
|
||||
|
|
|
|||
|
|
@ -139,8 +139,11 @@ static int gru_dump_context(struct gru_state *gru, int ctxnum,
|
|||
|
||||
ubuf += sizeof(hdr);
|
||||
ubufcch = ubuf;
|
||||
if (gru_user_copy_handle(&ubuf, cch))
|
||||
goto fail;
|
||||
if (gru_user_copy_handle(&ubuf, cch)) {
|
||||
if (cch_locked)
|
||||
unlock_cch_handle(cch);
|
||||
return -EFAULT;
|
||||
}
|
||||
if (cch_locked)
|
||||
ubufcch->delresp = 0;
|
||||
bytes = sizeof(hdr) + GRU_CACHE_LINE_BYTES;
|
||||
|
|
@ -179,10 +182,6 @@ static int gru_dump_context(struct gru_state *gru, int ctxnum,
|
|||
ret = -EFAULT;
|
||||
|
||||
return ret ? ret : bytes;
|
||||
|
||||
fail:
|
||||
unlock_cch_handle(cch);
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
int gru_dump_chiplet_request(unsigned long arg)
|
||||
|
|
|
|||
|
|
@ -828,6 +828,7 @@ enum xp_retval
|
|||
xpc_allocate_msg_wait(struct xpc_channel *ch)
|
||||
{
|
||||
enum xp_retval ret;
|
||||
DEFINE_WAIT(wait);
|
||||
|
||||
if (ch->flags & XPC_C_DISCONNECTING) {
|
||||
DBUG_ON(ch->reason == xpInterrupted);
|
||||
|
|
@ -835,7 +836,9 @@ xpc_allocate_msg_wait(struct xpc_channel *ch)
|
|||
}
|
||||
|
||||
atomic_inc(&ch->n_on_msg_allocate_wq);
|
||||
ret = interruptible_sleep_on_timeout(&ch->msg_allocate_wq, 1);
|
||||
prepare_to_wait(&ch->msg_allocate_wq, &wait, TASK_INTERRUPTIBLE);
|
||||
ret = schedule_timeout(1);
|
||||
finish_wait(&ch->msg_allocate_wq, &wait);
|
||||
atomic_dec(&ch->n_on_msg_allocate_wq);
|
||||
|
||||
if (ch->flags & XPC_C_DISCONNECTING) {
|
||||
|
|
|
|||
|
|
@ -812,7 +812,7 @@ static void st_tty_flush_buffer(struct tty_struct *tty)
|
|||
kfree_skb(st_gdata->tx_skb);
|
||||
st_gdata->tx_skb = NULL;
|
||||
|
||||
tty->ops->flush_buffer(tty);
|
||||
tty_driver_flush_buffer(tty);
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -531,7 +531,6 @@ long st_kim_stop(void *kim_data)
|
|||
/* Flush any pending characters in the driver and discipline. */
|
||||
tty_ldisc_flush(tty);
|
||||
tty_driver_flush_buffer(tty);
|
||||
tty->ops->flush_buffer(tty);
|
||||
}
|
||||
|
||||
/* send uninstall notification to UIM */
|
||||
|
|
|
|||
|
|
@ -165,7 +165,7 @@ static void vmci_guest_cid_update(u32 sub_id,
|
|||
* true if required hypercalls (or fallback hypercalls) are
|
||||
* supported by the host, false otherwise.
|
||||
*/
|
||||
static bool vmci_check_host_caps(struct pci_dev *pdev)
|
||||
static int vmci_check_host_caps(struct pci_dev *pdev)
|
||||
{
|
||||
bool result;
|
||||
struct vmci_resource_query_msg *msg;
|
||||
|
|
@ -176,7 +176,7 @@ static bool vmci_check_host_caps(struct pci_dev *pdev)
|
|||
check_msg = kmalloc(msg_size, GFP_KERNEL);
|
||||
if (!check_msg) {
|
||||
dev_err(&pdev->dev, "%s: Insufficient memory\n", __func__);
|
||||
return false;
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
check_msg->dst = vmci_make_handle(VMCI_HYPERVISOR_CONTEXT_ID,
|
||||
|
|
@ -196,7 +196,7 @@ static bool vmci_check_host_caps(struct pci_dev *pdev)
|
|||
__func__, result ? "PASSED" : "FAILED");
|
||||
|
||||
/* We need the vector. There are no fallbacks. */
|
||||
return result;
|
||||
return result ? 0 : -ENXIO;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -564,12 +564,14 @@ static int vmci_guest_probe_device(struct pci_dev *pdev,
|
|||
dev_warn(&pdev->dev,
|
||||
"VMCI device unable to register notification bitmap with PPN 0x%x\n",
|
||||
(u32) bitmap_ppn);
|
||||
error = -ENXIO;
|
||||
goto err_remove_vmci_dev_g;
|
||||
}
|
||||
}
|
||||
|
||||
/* Check host capabilities. */
|
||||
if (!vmci_check_host_caps(pdev))
|
||||
error = vmci_check_host_caps(pdev);
|
||||
if (error)
|
||||
goto err_remove_bitmap;
|
||||
|
||||
/* Enable device. */
|
||||
|
|
|
|||
Loading…
Reference in a new issue