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sound updates for 3.14-rc1

Browse source 
It was holiday season, so no wonder that there are little changes in
 framework level, although diffstat shows quite many changes spreaded
 over sound/* directories.  Most of changes are cleanups, code
 refactoring and fixes.
 
 Some highlights:
 
 - Removal of OSS sleep_on usages by Arnd
 
 - Simplified memalloc helper codes, drop obsoleted features;
   now it's built into PCM driver instead of an individual module
 
 - Warn if PCM buffer preallocation fails, which will show page
   allocation issues more clearly
 
 - Compress offload API updates for sample rates by Vinod
 
 - PCM glitch workaround on ctxfi emu20k1 by Sarah
 
 - Drop cs46xx DSP blobs, using firmware loader now
 
 - USB-audio quitks for Plantronics Gamecom 780, Creative VF0420,
   and Focusrite Saffire 6
 
 HD-audio specifics:
 
 - Standardize Kconfigs of HD-audio codec drivers;
   now "make localmodconfig" recognizes configs properly (finally!)
 
 - Parallel PM implementation by Mengdong
 
 - BayleyBay/ValleyView2 board fixups
 
 - Broadwell audio support
 
 - Runtime PM improvement (PantherPoint, etc)
 
 - Quirks: Dell subwooer, Gigabyte mobo jack detection oddity,
   Dell AiO click noise fixes, Dell headset mic fixes, etc
 
 - Automatic bind with HDMI codec parser without generic parser
 
 - More AD codec fixes (since 3.12 regression) including the automatic
   stereo mix support
 
 - Common Thinkpad ACPI helper for Realtek and Conexant codecs
 
 ASoC specifics:
 
 - Update to the generic DMA code to support deferred probe and managed
   resources
 
 - New drivers for BCM2835 (used in Raspberry Pi), Tegra with MAX98090
   and Analog Devices AXI I2S and S/PDIF controller IPs
 
 - Device tree support for the simple card, max98090 and cs42l52
 
 - Conversion of the Samsung drivers to native dmaengine, making them
   multiplatform compatible and hopefully helping keep them more modern
   and up to date.
 
 - More regmap conversions, including a very welcome one for twl6040
   from Peter Ujfalusi
 
 - A big overhaul of the DaVinci drivers also from Peter Ujfalusi
 
 - Lots of DMA updates from Lars-Peter
 
 - Improvements to the constraints handling code from Lars-Peter
 
 - A very helpful conversion of the TWL4030 driver to regmap from Peter
 
 - A new driver for the Freescale ESAI controller from Nicolin Chen
 
 - Conversion of some of the drivers to use params_width()
 
 - Extensions to DPCM for use with compressed audio from Liam
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Merge tag 'sound-3.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "It was holiday season, so no wonder that there are little changes in
  framework level, although diffstat shows quite many changes spreaded
  over sound/* directories.  Most of changes are cleanups, code
  refactoring and fixes.

  Some highlights:
   - Removal of OSS sleep_on usages by Arnd
   - Simplified memalloc helper codes, drop obsoleted features; now it's
     built into PCM driver instead of an individual module
   - Warn if PCM buffer preallocation fails, which will show page
     allocation issues more clearly
   - Compress offload API updates for sample rates by Vinod
   - PCM glitch workaround on ctxfi emu20k1 by Sarah
   - Drop cs46xx DSP blobs, using firmware loader now
   - USB-audio quitks for Plantronics Gamecom 780, Creative VF0420, and
     Focusrite Saffire 6

  HD-audio specifics:
   - Standardize Kconfigs of HD-audio codec drivers; now "make
     localmodconfig" recognizes configs properly (finally!)
   - Parallel PM implementation by Mengdong
   - BayleyBay/ValleyView2 board fixups
   - Broadwell audio support
   - Runtime PM improvement (PantherPoint, etc)
   - Quirks: Dell subwooer, Gigabyte mobo jack detection oddity, Dell
     AiO click noise fixes, Dell headset mic fixes, etc
   - Automatic bind with HDMI codec parser without generic parser
   - More AD codec fixes (since 3.12 regression) including the automatic
     stereo mix support
   - Common Thinkpad ACPI helper for Realtek and Conexant codecs

  ASoC specifics:
   - Update to the generic DMA code to support deferred probe and
     managed resources
   - New drivers for BCM2835 (used in Raspberry Pi), Tegra with MAX98090
     and Analog Devices AXI I2S and S/PDIF controller IPs
   - Device tree support for the simple card, max98090 and cs42l52
   - Conversion of the Samsung drivers to native dmaengine, making them
     multiplatform compatible and hopefully helping keep them more
     modern and up to date.
   - More regmap conversions, including a very welcome one for twl6040
     from Peter Ujfalusi
   - A big overhaul of the DaVinci drivers also from Peter Ujfalusi
   - Lots of DMA updates from Lars-Peter
   - Improvements to the constraints handling code from Lars-Peter
   - A very helpful conversion of the TWL4030 driver to regmap from Peter
   - A new driver for the Freescale ESAI controller from Nicolin Chen
   - Conversion of some of the drivers to use params_width()
   - Extensions to DPCM for use with compressed audio from Liam"

* tag 'sound-3.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (396 commits)
  ASoC: dapm: Fix double prefix addition
  ASoC: compress: Add suport for DPCM into compressed audio
  ASoC: DPCM: make some DPCM API calls non static for compressed usage
  ASoC: core: Fix possible NULL pointer dereference of pcm->config
  ALSA: hda - add headset mic detect quirks for some Dell machines
  ASoC: tlv320aic32x4: Fix regmap range_min
  ASoC: core: Return -ENOTSUPP from set_sysclk() if no operation provided
  ASoC: dapm: Change prototype of soc_widget_read
  ASoC: samsung: Remove SND_DMAENGINE_PCM_FLAG_NO_RESIDUE flag
  ASoC: axi-{spdif,i2s}: Remove SND_DMAENGINE_PCM_FLAG_NO_RESIDUE flag
  ASoC: generic-dmaengine-pcm: Check DMA residue granularity
  ASoC: generic-dmaengine-pcm: Check NO_RESIDUE flag at runtime
  dma: pl330: Set residue_granularity
  dma: Indicate residue granularity in dma_slave_caps
  ASoC: simple-card: fix one bug to writing to the platform data
  ASoC: pcm: Use snd_pcm_rate_mask_intersect() helper
  ALSA: Add helper function for intersecting two rate masks
  ASoC: s6000: Don't mix SNDRV_PCM_RATE_CONTINUOUS with specific rates
  ASoC: fsl: Don't mix SNDRV_PCM_RATE_CONTINUOUS with specific rates
  ASoC: pcm: Properly initialize hw->rate_max
  ...
This commit is contained in:
Linus Torvalds 2014-01-21 10:26:23 -08:00
commit d4371f94bc
285 changed files with 12067 additions and 10929 deletions
Download patch file Download diff file Expand all files Collapse all files

36
include/linux/dmaengine.h
View file

@ -22,6 +22,7 @@
#define LINUX_DMAENGINE_H
#include <linux/device.h>
#include <linux/err.h>
#include <linux/uio.h>
#include <linux/bug.h>
#include <linux/scatterlist.h>
@ -363,6 +364,32 @@ struct dma_slave_config {
unsigned int slave_id;
};
/**
* enum dma_residue_granularity - Granularity of the reported transfer residue
* @DMA_RESIDUE_GRANULARITY_DESCRIPTOR: Residue reporting is not support. The
* DMA channel is only able to tell whether a descriptor has been completed or
* not, which means residue reporting is not supported by this channel. The
* residue field of the dma_tx_state field will always be 0.
* @DMA_RESIDUE_GRANULARITY_SEGMENT: Residue is updated after each successfully
* completed segment of the transfer (For cyclic transfers this is after each
* period). This is typically implemented by having the hardware generate an
* interrupt after each transferred segment and then the drivers updates the
* outstanding residue by the size of the segment. Another possibility is if
* the hardware supports scatter-gather and the segment descriptor has a field
* which gets set after the segment has been completed. The driver then counts
* the number of segments without the flag set to compute the residue.
* @DMA_RESIDUE_GRANULARITY_BURST: Residue is updated after each transferred
* burst. This is typically only supported if the hardware has a progress
* register of some sort (E.g. a register with the current read/write address
* or a register with the amount of bursts/beats/bytes that have been
* transferred or still need to be transferred).
*/
enum dma_residue_granularity {
DMA_RESIDUE_GRANULARITY_DESCRIPTOR = 0,
DMA_RESIDUE_GRANULARITY_SEGMENT = 1,
DMA_RESIDUE_GRANULARITY_BURST = 2,
};
/* struct dma_slave_caps - expose capabilities of a slave channel only
*
* @src_addr_widths: bit mask of src addr widths the channel supports
@ -373,6 +400,7 @@ struct dma_slave_config {
* should be checked by controller as well
* @cmd_pause: true, if pause and thereby resume is supported
* @cmd_terminate: true, if terminate cmd is supported
* @residue_granularity: granularity of the reported transfer residue
*/
struct dma_slave_caps {
u32 src_addr_widths;
@ -380,6 +408,7 @@ struct dma_slave_caps {
u32 directions;
bool cmd_pause;
bool cmd_terminate;
enum dma_residue_granularity residue_granularity;
};
static inline const char *dma_chan_name(struct dma_chan *chan)
@ -1040,6 +1069,8 @@ enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx);
void dma_issue_pending_all(void);
struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
dma_filter_fn fn, void *fn_param);
struct dma_chan *dma_request_slave_channel_reason(struct device *dev,
const char *name);
struct dma_chan *dma_request_slave_channel(struct device *dev, const char *name);
void dma_release_channel(struct dma_chan *chan);
#else
@ -1063,6 +1094,11 @@ static inline struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
{
return NULL;
}
static inline struct dma_chan *dma_request_slave_channel_reason(
struct device *dev, const char *name)
{
return ERR_PTR(-ENODEV);
}
static inline struct dma_chan *dma_request_slave_channel(struct device *dev,
const char *name)
{

5
include/linux/i2c/twl.h
View file

@ -175,6 +175,9 @@ static inline int twl_class_is_ ##class(void) \
TWL_CLASS_IS(4030, TWL4030_CLASS_ID)
TWL_CLASS_IS(6030, TWL6030_CLASS_ID)
/* Set the regcache bypass for the regmap associated with the nodule */
int twl_set_regcache_bypass(u8 mod_no, bool enable);
/*
* Read and write several 8-bit registers at once.
*/
@ -667,8 +670,6 @@ struct twl4030_codec_data {
unsigned int digimic_delay; /* in ms */
unsigned int ramp_delay_value;
unsigned int offset_cncl_path;
unsigned int check_defaults:1;
unsigned int reset_registers:1;
unsigned int hs_extmute:1;
int hs_extmute_gpio;
};

189
include/linux/mfd/arizona/registers.h
View file

@ -139,6 +139,7 @@
#define ARIZONA_INPUT_ENABLES_STATUS 0x301
#define ARIZONA_INPUT_RATE 0x308
#define ARIZONA_INPUT_VOLUME_RAMP 0x309
#define ARIZONA_HPF_CONTROL 0x30C
#define ARIZONA_IN1L_CONTROL 0x310
#define ARIZONA_ADC_DIGITAL_VOLUME_1L 0x311
#define ARIZONA_DMIC1L_CONTROL 0x312
@ -160,6 +161,7 @@
#define ARIZONA_IN4L_CONTROL 0x328
#define ARIZONA_ADC_DIGITAL_VOLUME_4L 0x329
#define ARIZONA_DMIC4L_CONTROL 0x32A
#define ARIZONA_IN4R_CONTROL 0x32C
#define ARIZONA_ADC_DIGITAL_VOLUME_4R 0x32D
#define ARIZONA_DMIC4R_CONTROL 0x32E
#define ARIZONA_OUTPUT_ENABLES_1 0x400
@ -224,6 +226,9 @@
#define ARIZONA_PDM_SPK1_CTRL_2 0x491
#define ARIZONA_PDM_SPK2_CTRL_1 0x492
#define ARIZONA_PDM_SPK2_CTRL_2 0x493
#define ARIZONA_HP1_SHORT_CIRCUIT_CTRL 0x4A0
#define ARIZONA_HP2_SHORT_CIRCUIT_CTRL 0x4A1
#define ARIZONA_HP3_SHORT_CIRCUIT_CTRL 0x4A2
#define ARIZONA_SPK_CTRL_2 0x4B5
#define ARIZONA_SPK_CTRL_3 0x4B6
#define ARIZONA_DAC_COMP_1 0x4DC
@ -511,6 +516,38 @@
#define ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME 0x74D
#define ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE 0x74E
#define ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME 0x74F
#define ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE 0x750
#define ARIZONA_AIF2TX3MIX_INPUT_1_VOLUME 0x751
#define ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE 0x752
#define ARIZONA_AIF2TX3MIX_INPUT_2_VOLUME 0x753
#define ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE 0x754
#define ARIZONA_AIF2TX3MIX_INPUT_3_VOLUME 0x755
#define ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE 0x756
#define ARIZONA_AIF2TX3MIX_INPUT_4_VOLUME 0x757
#define ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE 0x758
#define ARIZONA_AIF2TX4MIX_INPUT_1_VOLUME 0x759
#define ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE 0x75A
#define ARIZONA_AIF2TX4MIX_INPUT_2_VOLUME 0x75B
#define ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE 0x75C
#define ARIZONA_AIF2TX4MIX_INPUT_3_VOLUME 0x75D
#define ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE 0x75E
#define ARIZONA_AIF2TX4MIX_INPUT_4_VOLUME 0x75F
#define ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE 0x760
#define ARIZONA_AIF2TX5MIX_INPUT_1_VOLUME 0x761
#define ARIZONA_AIF2TX5MIX_INPUT_2_SOURCE 0x762
#define ARIZONA_AIF2TX5MIX_INPUT_2_VOLUME 0x763
#define ARIZONA_AIF2TX5MIX_INPUT_3_SOURCE 0x764
#define ARIZONA_AIF2TX5MIX_INPUT_3_VOLUME 0x765
#define ARIZONA_AIF2TX5MIX_INPUT_4_SOURCE 0x766
#define ARIZONA_AIF2TX5MIX_INPUT_4_VOLUME 0x767
#define ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE 0x768
#define ARIZONA_AIF2TX6MIX_INPUT_1_VOLUME 0x769
#define ARIZONA_AIF2TX6MIX_INPUT_2_SOURCE 0x76A
#define ARIZONA_AIF2TX6MIX_INPUT_2_VOLUME 0x76B
#define ARIZONA_AIF2TX6MIX_INPUT_3_SOURCE 0x76C
#define ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME 0x76D
#define ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE 0x76E
#define ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME 0x76F
#define ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE 0x780
#define ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME 0x781
#define ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE 0x782
@ -2301,9 +2338,19 @@
#define ARIZONA_IN_VI_RAMP_SHIFT 0 /* IN_VI_RAMP - [2:0] */
#define ARIZONA_IN_VI_RAMP_WIDTH 3 /* IN_VI_RAMP - [2:0] */
/*
* R780 (0x30C) - HPF Control
*/
#define ARIZONA_IN_HPF_CUT_MASK 0x0007 /* IN_HPF_CUT [2:0] */
#define ARIZONA_IN_HPF_CUT_SHIFT 0 /* IN_HPF_CUT [2:0] */
#define ARIZONA_IN_HPF_CUT_WIDTH 3 /* IN_HPF_CUT [2:0] */
/*
* R784 (0x310) - IN1L Control
*/
#define ARIZONA_IN1L_HPF_MASK 0x8000 /* IN1L_HPF - [15] */
#define ARIZONA_IN1L_HPF_SHIFT 15 /* IN1L_HPF - [15] */
#define ARIZONA_IN1L_HPF_WIDTH 1 /* IN1L_HPF - [15] */
#define ARIZONA_IN1_OSR_MASK 0x6000 /* IN1_OSR - [14:13] */
#define ARIZONA_IN1_OSR_SHIFT 13 /* IN1_OSR - [14:13] */
#define ARIZONA_IN1_OSR_WIDTH 2 /* IN1_OSR - [14:13] */
@ -2342,6 +2389,9 @@
/*
* R788 (0x314) - IN1R Control
*/
#define ARIZONA_IN1R_HPF_MASK 0x8000 /* IN1R_HPF - [15] */
#define ARIZONA_IN1R_HPF_SHIFT 15 /* IN1R_HPF - [15] */
#define ARIZONA_IN1R_HPF_WIDTH 1 /* IN1R_HPF - [15] */
#define ARIZONA_IN1R_PGA_VOL_MASK 0x00FE /* IN1R_PGA_VOL - [7:1] */
#define ARIZONA_IN1R_PGA_VOL_SHIFT 1 /* IN1R_PGA_VOL - [7:1] */
#define ARIZONA_IN1R_PGA_VOL_WIDTH 7 /* IN1R_PGA_VOL - [7:1] */
@ -2371,6 +2421,9 @@
/*
* R792 (0x318) - IN2L Control
*/
#define ARIZONA_IN2L_HPF_MASK 0x8000 /* IN2L_HPF - [15] */
#define ARIZONA_IN2L_HPF_SHIFT 15 /* IN2L_HPF - [15] */
#define ARIZONA_IN2L_HPF_WIDTH 1 /* IN2L_HPF - [15] */
#define ARIZONA_IN2_OSR_MASK 0x6000 /* IN2_OSR - [14:13] */
#define ARIZONA_IN2_OSR_SHIFT 13 /* IN2_OSR - [14:13] */
#define ARIZONA_IN2_OSR_WIDTH 2 /* IN2_OSR - [14:13] */
@ -2409,6 +2462,9 @@
/*
* R796 (0x31C) - IN2R Control
*/
#define ARIZONA_IN2R_HPF_MASK 0x8000 /* IN2R_HPF - [15] */
#define ARIZONA_IN2R_HPF_SHIFT 15 /* IN2R_HPF - [15] */
#define ARIZONA_IN2R_HPF_WIDTH 1 /* IN2R_HPF - [15] */
#define ARIZONA_IN2R_PGA_VOL_MASK 0x00FE /* IN2R_PGA_VOL - [7:1] */
#define ARIZONA_IN2R_PGA_VOL_SHIFT 1 /* IN2R_PGA_VOL - [7:1] */
#define ARIZONA_IN2R_PGA_VOL_WIDTH 7 /* IN2R_PGA_VOL - [7:1] */
@ -2438,6 +2494,9 @@
/*
* R800 (0x320) - IN3L Control
*/
#define ARIZONA_IN3L_HPF_MASK 0x8000 /* IN3L_HPF - [15] */
#define ARIZONA_IN3L_HPF_SHIFT 15 /* IN3L_HPF - [15] */
#define ARIZONA_IN3L_HPF_WIDTH 1 /* IN3L_HPF - [15] */
#define ARIZONA_IN3_OSR_MASK 0x6000 /* IN3_OSR - [14:13] */
#define ARIZONA_IN3_OSR_SHIFT 13 /* IN3_OSR - [14:13] */
#define ARIZONA_IN3_OSR_WIDTH 2 /* IN3_OSR - [14:13] */
@ -2476,6 +2535,9 @@
/*
* R804 (0x324) - IN3R Control
*/
#define ARIZONA_IN3R_HPF_MASK 0x8000 /* IN3R_HPF - [15] */
#define ARIZONA_IN3R_HPF_SHIFT 15 /* IN3R_HPF - [15] */
#define ARIZONA_IN3R_HPF_WIDTH 1 /* IN3R_HPF - [15] */
#define ARIZONA_IN3R_PGA_VOL_MASK 0x00FE /* IN3R_PGA_VOL - [7:1] */
#define ARIZONA_IN3R_PGA_VOL_SHIFT 1 /* IN3R_PGA_VOL - [7:1] */
#define ARIZONA_IN3R_PGA_VOL_WIDTH 7 /* IN3R_PGA_VOL - [7:1] */
@ -2505,6 +2567,9 @@
/*
* R808 (0x328) - IN4 Control
*/
#define ARIZONA_IN4L_HPF_MASK 0x8000 /* IN4L_HPF - [15] */
#define ARIZONA_IN4L_HPF_SHIFT 15 /* IN4L_HPF - [15] */
#define ARIZONA_IN4L_HPF_WIDTH 1 /* IN4L_HPF - [15] */
#define ARIZONA_IN4_OSR_MASK 0x6000 /* IN4_OSR - [14:13] */
#define ARIZONA_IN4_OSR_SHIFT 13 /* IN4_OSR - [14:13] */
#define ARIZONA_IN4_OSR_WIDTH 2 /* IN4_OSR - [14:13] */
@ -2534,6 +2599,13 @@
#define ARIZONA_IN4L_DMIC_DLY_SHIFT 0 /* IN4L_DMIC_DLY - [5:0] */
#define ARIZONA_IN4L_DMIC_DLY_WIDTH 6 /* IN4L_DMIC_DLY - [5:0] */
/*
* R812 (0x32C) - IN4R Control
*/
#define ARIZONA_IN4R_HPF_MASK 0x8000 /* IN4R_HPF - [15] */
#define ARIZONA_IN4R_HPF_SHIFT 15 /* IN4R_HPF - [15] */
#define ARIZONA_IN4R_HPF_WIDTH 1 /* IN4R_HPF - [15] */
/*
* R813 (0x32D) - ADC Digital Volume 4R
*/
@ -3147,6 +3219,10 @@
/*
* R1088 (0x440) - DRE Enable
*/
#define ARIZONA_DRE3R_ENA 0x0020 /* DRE3R_ENA */
#define ARIZONA_DRE3R_ENA_MASK 0x0020 /* DRE3R_ENA */
#define ARIZONA_DRE3R_ENA_SHIFT 5 /* DRE3R_ENA */
#define ARIZONA_DRE3R_ENA_WIDTH 1 /* DRE3R_ENA */
#define ARIZONA_DRE3L_ENA 0x0010 /* DRE3L_ENA */
#define ARIZONA_DRE3L_ENA_MASK 0x0010 /* DRE3L_ENA */
#define ARIZONA_DRE3L_ENA_SHIFT 4 /* DRE3L_ENA */
@ -3268,6 +3344,30 @@
#define ARIZONA_SPK2_FMT_SHIFT 0 /* SPK2_FMT */
#define ARIZONA_SPK2_FMT_WIDTH 1 /* SPK2_FMT */
/*
* R1184 (0x4A0) - HP1 Short Circuit Ctrl
*/
#define ARIZONA_HP1_SC_ENA 0x1000 /* HP1_SC_ENA */
#define ARIZONA_HP1_SC_ENA_MASK 0x1000 /* HP1_SC_ENA */
#define ARIZONA_HP1_SC_ENA_SHIFT 12 /* HP1_SC_ENA */
#define ARIZONA_HP1_SC_ENA_WIDTH 1 /* HP1_SC_ENA */
/*
* R1185 (0x4A1) - HP2 Short Circuit Ctrl
*/
#define ARIZONA_HP2_SC_ENA 0x1000 /* HP2_SC_ENA */
#define ARIZONA_HP2_SC_ENA_MASK 0x1000 /* HP2_SC_ENA */
#define ARIZONA_HP2_SC_ENA_SHIFT 12 /* HP2_SC_ENA */
#define ARIZONA_HP2_SC_ENA_WIDTH 1 /* HP2_SC_ENA */
/*
* R1186 (0x4A2) - HP3 Short Circuit Ctrl
*/
#define ARIZONA_HP3_SC_ENA 0x1000 /* HP3_SC_ENA */
#define ARIZONA_HP3_SC_ENA_MASK 0x1000 /* HP3_SC_ENA */
#define ARIZONA_HP3_SC_ENA_SHIFT 12 /* HP3_SC_ENA */
#define ARIZONA_HP3_SC_ENA_WIDTH 1 /* HP3_SC_ENA */
/*
* R1244 (0x4DC) - DAC comp 1
*/
@ -3734,6 +3834,35 @@
#define ARIZONA_AIF2TX2_SLOT_SHIFT 0 /* AIF2TX2_SLOT - [5:0] */
#define ARIZONA_AIF2TX2_SLOT_WIDTH 6 /* AIF2TX2_SLOT - [5:0] */
/*
* R1355 (0x54B) - AIF2 Frame Ctrl 5
*/
#define ARIZONA_AIF2TX3_SLOT_MASK 0x003F /* AIF2TX3_SLOT - [5:0] */
#define ARIZONA_AIF2TX3_SLOT_SHIFT 0 /* AIF2TX3_SLOT - [5:0] */
#define ARIZONA_AIF2TX3_SLOT_WIDTH 6 /* AIF2TX3_SLOT - [5:0] */
/*
* R1356 (0x54C) - AIF2 Frame Ctrl 6
*/
#define ARIZONA_AIF2TX4_SLOT_MASK 0x003F /* AIF2TX4_SLOT - [5:0] */
#define ARIZONA_AIF2TX4_SLOT_SHIFT 0 /* AIF2TX4_SLOT - [5:0] */
#define ARIZONA_AIF2TX4_SLOT_WIDTH 6 /* AIF2TX4_SLOT - [5:0] */
/*
* R1357 (0x54D) - AIF2 Frame Ctrl 7
*/
#define ARIZONA_AIF2TX5_SLOT_MASK 0x003F /* AIF2TX5_SLOT - [5:0] */
#define ARIZONA_AIF2TX5_SLOT_SHIFT 0 /* AIF2TX5_SLOT - [5:0] */
#define ARIZONA_AIF2TX5_SLOT_WIDTH 6 /* AIF2TX5_SLOT - [5:0] */
/*
* R1358 (0x54E) - AIF2 Frame Ctrl 8
*/
#define ARIZONA_AIF2TX6_SLOT_MASK 0x003F /* AIF2TX6_SLOT - [5:0] */
#define ARIZONA_AIF2TX6_SLOT_SHIFT 0 /* AIF2TX6_SLOT - [5:0] */
#define ARIZONA_AIF2TX6_SLOT_WIDTH 6 /* AIF2TX6_SLOT - [5:0] */
/*
* R1361 (0x551) - AIF2 Frame Ctrl 11
*/
@ -3748,9 +3877,53 @@
#define ARIZONA_AIF2RX2_SLOT_SHIFT 0 /* AIF2RX2_SLOT - [5:0] */
#define ARIZONA_AIF2RX2_SLOT_WIDTH 6 /* AIF2RX2_SLOT - [5:0] */
/*
* R1363 (0x553) - AIF2 Frame Ctrl 13
*/
#define ARIZONA_AIF2RX3_SLOT_MASK 0x003F /* AIF2RX3_SLOT - [5:0] */
#define ARIZONA_AIF2RX3_SLOT_SHIFT 0 /* AIF2RX3_SLOT - [5:0] */
#define ARIZONA_AIF2RX3_SLOT_WIDTH 6 /* AIF2RX3_SLOT - [5:0] */
/*
* R1364 (0x554) - AIF2 Frame Ctrl 14
*/
#define ARIZONA_AIF2RX4_SLOT_MASK 0x003F /* AIF2RX4_SLOT - [5:0] */
#define ARIZONA_AIF2RX4_SLOT_SHIFT 0 /* AIF2RX4_SLOT - [5:0] */
#define ARIZONA_AIF2RX4_SLOT_WIDTH 6 /* AIF2RX4_SLOT - [5:0] */
/*
* R1365 (0x555) - AIF2 Frame Ctrl 15
*/
#define ARIZONA_AIF2RX5_SLOT_MASK 0x003F /* AIF2RX5_SLOT - [5:0] */
#define ARIZONA_AIF2RX5_SLOT_SHIFT 0 /* AIF2RX5_SLOT - [5:0] */
#define ARIZONA_AIF2RX5_SLOT_WIDTH 6 /* AIF2RX5_SLOT - [5:0] */
/*
* R1366 (0x556) - AIF2 Frame Ctrl 16
*/
#define ARIZONA_AIF2RX6_SLOT_MASK 0x003F /* AIF2RX6_SLOT - [5:0] */
#define ARIZONA_AIF2RX6_SLOT_SHIFT 0 /* AIF2RX6_SLOT - [5:0] */
#define ARIZONA_AIF2RX6_SLOT_WIDTH 6 /* AIF2RX6_SLOT - [5:0] */
/*
* R1369 (0x559) - AIF2 Tx Enables
*/
#define ARIZONA_AIF2TX6_ENA 0x0020 /* AIF2TX6_ENA */
#define ARIZONA_AIF2TX6_ENA_MASK 0x0020 /* AIF2TX6_ENA */
#define ARIZONA_AIF2TX6_ENA_SHIFT 5 /* AIF2TX6_ENA */
#define ARIZONA_AIF2TX6_ENA_WIDTH 1 /* AIF2TX6_ENA */
#define ARIZONA_AIF2TX5_ENA 0x0010 /* AIF2TX5_ENA */
#define ARIZONA_AIF2TX5_ENA_MASK 0x0010 /* AIF2TX5_ENA */
#define ARIZONA_AIF2TX5_ENA_SHIFT 4 /* AIF2TX5_ENA */
#define ARIZONA_AIF2TX5_ENA_WIDTH 1 /* AIF2TX5_ENA */
#define ARIZONA_AIF2TX4_ENA 0x0008 /* AIF2TX4_ENA */
#define ARIZONA_AIF2TX4_ENA_MASK 0x0008 /* AIF2TX4_ENA */
#define ARIZONA_AIF2TX4_ENA_SHIFT 3 /* AIF2TX4_ENA */
#define ARIZONA_AIF2TX4_ENA_WIDTH 1 /* AIF2TX4_ENA */
#define ARIZONA_AIF2TX3_ENA 0x0004 /* AIF2TX3_ENA */
#define ARIZONA_AIF2TX3_ENA_MASK 0x0004 /* AIF2TX3_ENA */
#define ARIZONA_AIF2TX3_ENA_SHIFT 2 /* AIF2TX3_ENA */
#define ARIZONA_AIF2TX3_ENA_WIDTH 1 /* AIF2TX3_ENA */
#define ARIZONA_AIF2TX2_ENA 0x0002 /* AIF2TX2_ENA */
#define ARIZONA_AIF2TX2_ENA_MASK 0x0002 /* AIF2TX2_ENA */
#define ARIZONA_AIF2TX2_ENA_SHIFT 1 /* AIF2TX2_ENA */
@ -3763,6 +3936,22 @@
/*
* R1370 (0x55A) - AIF2 Rx Enables
*/
#define ARIZONA_AIF2RX6_ENA 0x0020 /* AIF2RX6_ENA */
#define ARIZONA_AIF2RX6_ENA_MASK 0x0020 /* AIF2RX6_ENA */
#define ARIZONA_AIF2RX6_ENA_SHIFT 5 /* AIF2RX6_ENA */
#define ARIZONA_AIF2RX6_ENA_WIDTH 1 /* AIF2RX6_ENA */
#define ARIZONA_AIF2RX5_ENA 0x0010 /* AIF2RX5_ENA */
#define ARIZONA_AIF2RX5_ENA_MASK 0x0010 /* AIF2RX5_ENA */
#define ARIZONA_AIF2RX5_ENA_SHIFT 4 /* AIF2RX5_ENA */
#define ARIZONA_AIF2RX5_ENA_WIDTH 1 /* AIF2RX5_ENA */
#define ARIZONA_AIF2RX4_ENA 0x0008 /* AIF2RX4_ENA */
#define ARIZONA_AIF2RX4_ENA_MASK 0x0008 /* AIF2RX4_ENA */
#define ARIZONA_AIF2RX4_ENA_SHIFT 3 /* AIF2RX4_ENA */
#define ARIZONA_AIF2RX4_ENA_WIDTH 1 /* AIF2RX4_ENA */
#define ARIZONA_AIF2RX3_ENA 0x0004 /* AIF2RX3_ENA */
#define ARIZONA_AIF2RX3_ENA_MASK 0x0004 /* AIF2RX3_ENA */
#define ARIZONA_AIF2RX3_ENA_SHIFT 2 /* AIF2RX3_ENA */
#define ARIZONA_AIF2RX3_ENA_WIDTH 1 /* AIF2RX3_ENA */
#define ARIZONA_AIF2RX2_ENA 0x0002 /* AIF2RX2_ENA */
#define ARIZONA_AIF2RX2_ENA_MASK 0x0002 /* AIF2RX2_ENA */
#define ARIZONA_AIF2RX2_ENA_SHIFT 1 /* AIF2RX2_ENA */

6
include/linux/platform_data/asoc-ti-mcbsp.h
View file

@ -1,6 +1,4 @@
/*
* arch/arm/plat-omap/include/mach/mcbsp.h
*
* Defines for Multi-Channel Buffered Serial Port
*
* Copyright (C) 2002 RidgeRun, Inc.
@ -21,8 +19,8 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#ifndef __ASM_ARCH_OMAP_MCBSP_H
#define __ASM_ARCH_OMAP_MCBSP_H
#ifndef __ASOC_TI_MCBSP_H
#define __ASOC_TI_MCBSP_H
#include <linux/spinlock.h>
#include <linux/clk.h>

9
include/linux/platform_data/asoc-ux500-msp.h
View file

@ -10,16 +10,9 @@
#include <linux/platform_data/dma-ste-dma40.h>
enum msp_i2s_id {
MSP_I2S_0 = 0,
MSP_I2S_1,
MSP_I2S_2,
MSP_I2S_3,
};
/* Platform data structure for a MSP I2S-device */
struct msp_i2s_platform_data {
enum msp_i2s_id id;
int id;
struct stedma40_chan_cfg *msp_i2s_dma_rx;
struct stedma40_chan_cfg *msp_i2s_dma_tx;
};

1
include/linux/platform_data/davinci_asp.h
View file

@ -92,6 +92,7 @@ enum {
MCASP_VERSION_1 = 0, /* DM646x */
MCASP_VERSION_2, /* DA8xx/OMAPL1x */
MCASP_VERSION_3, /* TI81xx/AM33xx */
MCASP_VERSION_4, /* DRA7xxx */
};
enum mcbsp_clk_input_pin {