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Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 PTI and Spectre related fixes and updates from Ingo Molnar:
"Here's the latest set of Spectre and PTI related fixes and updates:
Spectre:
- Add entry code register clearing to reduce the Spectre attack
surface
- Update the Spectre microcode blacklist
- Inline the KVM Spectre helpers to get close to v4.14 performance
again.
- Fix indirect_branch_prediction_barrier()
- Fix/improve Spectre related kernel messages
- Fix array_index_nospec_mask() asm constraint
- KVM: fix two MSR handling bugs
PTI:
- Fix a paranoid entry PTI CR3 handling bug
- Fix comments
objtool:
- Fix paranoid_entry() frame pointer warning
- Annotate WARN()-related UD2 as reachable
- Various fixes
- Add Add Peter Zijlstra as objtool co-maintainer
Misc:
- Various x86 entry code self-test fixes
- Improve/simplify entry code stack frame generation and handling
after recent heavy-handed PTI and Spectre changes. (There's two
more WIP improvements expected here.)
- Type fix for cache entries
There's also some low risk non-fix changes I've included in this
branch to reduce backporting conflicts:
- rename a confusing x86_cpu field name
- de-obfuscate the naming of single-TLB flushing primitives"
* 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (41 commits)
x86/entry/64: Fix CR3 restore in paranoid_exit()
x86/cpu: Change type of x86_cache_size variable to unsigned int
x86/spectre: Fix an error message
x86/cpu: Rename cpu_data.x86_mask to cpu_data.x86_stepping
selftests/x86/mpx: Fix incorrect bounds with old _sigfault
x86/mm: Rename flush_tlb_single() and flush_tlb_one() to __flush_tlb_one_[user|kernel]()
x86/speculation: Add <asm/msr-index.h> dependency
nospec: Move array_index_nospec() parameter checking into separate macro
x86/speculation: Fix up array_index_nospec_mask() asm constraint
x86/debug: Use UD2 for WARN()
x86/debug, objtool: Annotate WARN()-related UD2 as reachable
objtool: Fix segfault in ignore_unreachable_insn()
selftests/x86: Disable tests requiring 32-bit support on pure 64-bit systems
selftests/x86: Do not rely on "int $0x80" in single_step_syscall.c
selftests/x86: Do not rely on "int $0x80" in test_mremap_vdso.c
selftests/x86: Fix build bug caused by the 5lvl test which has been moved to the VM directory
selftests/x86/pkeys: Remove unused functions
selftests/x86: Clean up and document sscanf() usage
selftests/x86: Fix vDSO selftest segfault for vsyscall=none
x86/entry/64: Remove the unused 'icebp' macro
...
This commit is contained in:
commit
d4667ca142
69 changed files with 444 additions and 362 deletions
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@ -269,13 +269,13 @@ static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
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for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) {
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const struct tjmax_model *tm = &tjmax_model_table[i];
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if (c->x86_model == tm->model &&
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(tm->mask == ANY || c->x86_mask == tm->mask))
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(tm->mask == ANY || c->x86_stepping == tm->mask))
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return tm->tjmax;
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}
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/* Early chips have no MSR for TjMax */
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if (c->x86_model == 0xf && c->x86_mask < 4)
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if (c->x86_model == 0xf && c->x86_stepping < 4)
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usemsr_ee = 0;
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if (c->x86_model > 0xe && usemsr_ee) {
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@ -426,7 +426,7 @@ static int chk_ucode_version(unsigned int cpu)
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* Readings might stop update when processor visited too deep sleep,
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* fixed for stepping D0 (6EC).
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*/
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if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
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if (c->x86_model == 0xe && c->x86_stepping < 0xc && c->microcode < 0x39) {
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pr_err("Errata AE18 not fixed, update BIOS or microcode of the CPU!\n");
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return -ENODEV;
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}
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@ -293,7 +293,7 @@ u8 vid_which_vrm(void)
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if (c->x86 < 6) /* Any CPU with family lower than 6 */
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return 0; /* doesn't have VID */
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vrm_ret = find_vrm(c->x86, c->x86_model, c->x86_mask, c->x86_vendor);
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vrm_ret = find_vrm(c->x86, c->x86_model, c->x86_stepping, c->x86_vendor);
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if (vrm_ret == 134)
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vrm_ret = get_via_model_d_vrm();
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if (vrm_ret == 0)
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@ -227,7 +227,7 @@ static bool has_erratum_319(struct pci_dev *pdev)
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* and AM3 formats, but that's the best we can do.
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*/
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return boot_cpu_data.x86_model < 4 ||
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(boot_cpu_data.x86_model == 4 && boot_cpu_data.x86_mask <= 2);
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(boot_cpu_data.x86_model == 4 && boot_cpu_data.x86_stepping <= 2);
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}
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static int k10temp_probe(struct pci_dev *pdev,
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@ -187,7 +187,7 @@ static int k8temp_probe(struct pci_dev *pdev,
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return -ENOMEM;
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model = boot_cpu_data.x86_model;
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stepping = boot_cpu_data.x86_mask;
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stepping = boot_cpu_data.x86_stepping;
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/* feature available since SH-C0, exclude older revisions */
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if ((model == 4 && stepping == 0) ||
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