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sh: intc - remove redundant irq code for sh03, snapgear and titan
This patch removes redundant board specific interrupt code for boards using sh775x processors and 4 IRQ lines in "Individual Interrupt Mode" aka IRLM. Three boards are affected: sh03, snapgear and titan. The right way to do this is to use cpu specific code provided by intc. A nice side effect is that sh03 now compiles, board not BROKEN any more. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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8 changed files with 19 additions and 109 deletions
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@ -41,11 +41,6 @@ struct ipr_desc {
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void register_ipr_controller(struct ipr_desc *);
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/*
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* Enable individual interrupt mode for external IPR IRQs.
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*/
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void __init ipr_irq_enable_irlm(void);
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typedef unsigned char intc_enum;
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struct intc_vect {
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@ -11,22 +11,13 @@
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#include <linux/time.h>
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#define INTC_IPRD 0xffd00010UL
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#define IRL0_IRQ 2
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#define IRL0_IPR_POS 3
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#define IRL0_PRIORITY 13
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#define IRL1_IRQ 5
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#define IRL1_IPR_POS 2
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#define IRL1_PRIORITY 10
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#define IRL2_IRQ 8
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#define IRL2_IPR_POS 1
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#define IRL2_PRIORITY 7
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#define IRL3_IRQ 11
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#define IRL3_IPR_POS 0
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#define IRL3_PRIORITY 4
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void heartbeat_sh03(void);
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@ -19,20 +19,16 @@
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* is the interrupt :-)
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*/
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#define IRL0_IRQ 2
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#define IRL0_IPR_POS 3
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#define IRL0_IRQ 2
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#define IRL0_PRIORITY 13
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#define IRL1_IRQ 5
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#define IRL1_IPR_POS 2
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#define IRL1_IRQ 5
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#define IRL1_PRIORITY 10
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#define IRL2_IRQ 8
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#define IRL2_IPR_POS 1
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#define IRL2_IRQ 8
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#define IRL2_PRIORITY 7
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#define IRL3_IRQ 11
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#define IRL3_IPR_POS 0
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#define IRL3_IRQ 11
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#define IRL3_PRIORITY 4
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#endif
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