mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-24 21:54:34 -04:00
powerpc updates for 4.6
Highlights:
- Restructure Linux PTE on Book3S/64 to Radix format from Paul Mackerras
- Book3s 64 MMU cleanup in preparation for Radix MMU from Aneesh Kumar K.V
- Add POWER9 cputable entry from Michael Neuling
- FPU/Altivec/VSX save/restore optimisations from Cyril Bur
- Add support for new ftrace ABI on ppc64le from Torsten Duwe
Various cleanups & minor fixes from:
- Adam Buchbinder, Andrew Donnellan, Balbir Singh, Christophe Leroy, Cyril
Bur, Luis Henriques, Madhavan Srinivasan, Pan Xinhui, Russell Currey,
Sukadev Bhattiprolu, Suraj Jitindar Singh.
General:
- atomics: Allow architectures to define their own __atomic_op_* helpers from
Boqun Feng
- Implement atomic{, 64}_*_return_* variants and acquire/release/relaxed
variants for (cmp)xchg from Boqun Feng
- Add powernv_defconfig from Jeremy Kerr
- Fix BUG_ON() reporting in real mode from Balbir Singh
- Add xmon command to dump OPAL msglog from Andrew Donnellan
- Add xmon command to dump process/task similar to ps(1) from Douglas Miller
- Clean up memory hotplug failure paths from David Gibson
pci/eeh:
- Redesign SR-IOV on PowerNV to give absolute isolation between VFs from Wei
Yang.
- EEH Support for SRIOV VFs from Wei Yang and Gavin Shan.
- PCI/IOV: Rename and export virtfn_{add, remove} from Wei Yang
- PCI: Add pcibios_bus_add_device() weak function from Wei Yang
- MAINTAINERS: Update EEH details and maintainership from Russell Currey
cxl:
- Support added to the CXL driver for running on both bare-metal and
hypervisor systems, from Christophe Lombard and Frederic Barrat.
- Ignore probes for virtual afu pci devices from Vaibhav Jain
perf:
- Export Power8 generic and cache events to sysfs from Sukadev Bhattiprolu
- hv-24x7: Fix usage with chip events, display change in counter values,
display domain indices in sysfs, eliminate domain suffix in event names,
from Sukadev Bhattiprolu
Freescale:
- Updates from Scott: "Highlights include 8xx optimizations, 32-bit checksum
optimizations, 86xx consolidation, e5500/e6500 cpu hotplug, more fman and
other dt bits, and minor fixes/cleanup."
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJW69OrAAoJEFHr6jzI4aWAe5EQAJw/hE6WBQc6a7Tj70AnXOqR
qk/m5pZjuTwQxfBteIvHR1pE5eXdlvtAjcD254LVkFkAbIn19W/h2k0VX/nlee7P
n/VRHRifjtGmukqHrPYJJ7ua9mNlY7pxh3leGSixBFASnSWqMxNNNziNQtSTcuCs
TjHiw6NkZ/kzeunA4bAfE4yHVUZjmL74oiS9JbLyaVHqoW4fqWLlh26AKo2yYMZI
qPicBBG4HBi3FGvoexnKxlJNdcV4HO7LzDjJmCSfUKYCJi+Pw19T5qmhso0q0qVz
vHg/A8HNeG4Hn83pNVmLeQSAIQRZ3DvTtcLgbjPo+TVwm/hzrRRBWipTeOVbkLW8
2bcOXT4t7LWUq15EAJ1LYgYZGzcLrfRfUeOcuQ1TWd3+PcfY9pE7FmizsxAAfaVe
E9j9mpz4XnIqBtWkFHneTIHkQ5OWptyKuZJEaYH0nut4VsP0k8NarkseafGqBPu7
5eG83gbiQbCVixfOgblV9eocJ29JcwpjPAY4CZSGJimShg909FV7WRgZgJkKWrbK
dBRco8Jcp4VglGfo2qymv7Uj4KwQoypBREOhiKUvrAsVlDxPfx+bcskhjGu9xGDC
xs/+nme0/lKa/wg5K4C3mQ1GAlkMWHI0ojhJjsyODbetup5UbkEu03wjAaTdO9dT
Y6ptGm0rYAJluPNlziFj
=qkAt
-----END PGP SIGNATURE-----
Merge tag 'powerpc-4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc updates from Michael Ellerman:
"This was delayed a day or two by some build-breakage on old toolchains
which we've now fixed.
There's two PCI commits both acked by Bjorn.
There's one commit to mm/hugepage.c which is (co)authored by Kirill.
Highlights:
- Restructure Linux PTE on Book3S/64 to Radix format from Paul
Mackerras
- Book3s 64 MMU cleanup in preparation for Radix MMU from Aneesh
Kumar K.V
- Add POWER9 cputable entry from Michael Neuling
- FPU/Altivec/VSX save/restore optimisations from Cyril Bur
- Add support for new ftrace ABI on ppc64le from Torsten Duwe
Various cleanups & minor fixes from:
- Adam Buchbinder, Andrew Donnellan, Balbir Singh, Christophe Leroy,
Cyril Bur, Luis Henriques, Madhavan Srinivasan, Pan Xinhui, Russell
Currey, Sukadev Bhattiprolu, Suraj Jitindar Singh.
General:
- atomics: Allow architectures to define their own __atomic_op_*
helpers from Boqun Feng
- Implement atomic{, 64}_*_return_* variants and acquire/release/
relaxed variants for (cmp)xchg from Boqun Feng
- Add powernv_defconfig from Jeremy Kerr
- Fix BUG_ON() reporting in real mode from Balbir Singh
- Add xmon command to dump OPAL msglog from Andrew Donnellan
- Add xmon command to dump process/task similar to ps(1) from Douglas
Miller
- Clean up memory hotplug failure paths from David Gibson
pci/eeh:
- Redesign SR-IOV on PowerNV to give absolute isolation between VFs
from Wei Yang.
- EEH Support for SRIOV VFs from Wei Yang and Gavin Shan.
- PCI/IOV: Rename and export virtfn_{add, remove} from Wei Yang
- PCI: Add pcibios_bus_add_device() weak function from Wei Yang
- MAINTAINERS: Update EEH details and maintainership from Russell
Currey
cxl:
- Support added to the CXL driver for running on both bare-metal and
hypervisor systems, from Christophe Lombard and Frederic Barrat.
- Ignore probes for virtual afu pci devices from Vaibhav Jain
perf:
- Export Power8 generic and cache events to sysfs from Sukadev
Bhattiprolu
- hv-24x7: Fix usage with chip events, display change in counter
values, display domain indices in sysfs, eliminate domain suffix in
event names, from Sukadev Bhattiprolu
Freescale:
- Updates from Scott: "Highlights include 8xx optimizations, 32-bit
checksum optimizations, 86xx consolidation, e5500/e6500 cpu
hotplug, more fman and other dt bits, and minor fixes/cleanup"
* tag 'powerpc-4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (179 commits)
powerpc: Fix unrecoverable SLB miss during restore_math()
powerpc/8xx: Fix do_mtspr_cpu6() build on older compilers
powerpc/rcpm: Fix build break when SMP=n
powerpc/book3e-64: Use hardcoded mttmr opcode
powerpc/fsl/dts: Add "jedec,spi-nor" flash compatible
powerpc/T104xRDB: add tdm riser card node to device tree
powerpc32: PAGE_EXEC required for inittext
powerpc/mpc85xx: Add pcsphy nodes to FManV3 device tree
powerpc/mpc85xx: Add MDIO bus muxing support to the board device tree(s)
powerpc/86xx: Introduce and use common dtsi
powerpc/86xx: Update device tree
powerpc/86xx: Move dts files to fsl directory
powerpc/86xx: Switch to kconfig fragments approach
powerpc/86xx: Update defconfigs
powerpc/86xx: Consolidate common platform code
powerpc32: Remove one insn in mulhdu
powerpc32: small optimisation in flush_icache_range()
powerpc: Simplify test in __dma_sync()
powerpc32: move xxxxx_dcache_range() functions inline
powerpc32: Remove clear_pages() and define clear_page() inline
...
This commit is contained in:
Linus Torvalds
commit
d5e2d00898
324 changed files with 14760 additions and 7155 deletions
|
|
@ -34,20 +34,29 @@
|
|||
* The idea here is to build acquire/release variants by adding explicit
|
||||
* barriers on top of the relaxed variant. In the case where the relaxed
|
||||
* variant is already fully ordered, no additional barriers are needed.
|
||||
*
|
||||
* Besides, if an arch has a special barrier for acquire/release, it could
|
||||
* implement its own __atomic_op_* and use the same framework for building
|
||||
* variants
|
||||
*/
|
||||
#ifndef __atomic_op_acquire
|
||||
#define __atomic_op_acquire(op, args...) \
|
||||
({ \
|
||||
typeof(op##_relaxed(args)) __ret = op##_relaxed(args); \
|
||||
smp_mb__after_atomic(); \
|
||||
__ret; \
|
||||
})
|
||||
#endif
|
||||
|
||||
#ifndef __atomic_op_release
|
||||
#define __atomic_op_release(op, args...) \
|
||||
({ \
|
||||
smp_mb__before_atomic(); \
|
||||
op##_relaxed(args); \
|
||||
})
|
||||
#endif
|
||||
|
||||
#ifndef __atomic_op_fence
|
||||
#define __atomic_op_fence(op, args...) \
|
||||
({ \
|
||||
typeof(op##_relaxed(args)) __ret; \
|
||||
|
|
@ -56,6 +65,7 @@
|
|||
smp_mb__after_atomic(); \
|
||||
__ret; \
|
||||
})
|
||||
#endif
|
||||
|
||||
/* atomic_add_return_relaxed */
|
||||
#ifndef atomic_add_return_relaxed
|
||||
|
|
|
|||
|
|
@ -20,6 +20,7 @@ struct pt_regs;
|
|||
#define BUILD_BUG_ON_MSG(cond, msg) (0)
|
||||
#define BUILD_BUG_ON(condition) (0)
|
||||
#define BUILD_BUG() (0)
|
||||
#define MAYBE_BUILD_BUG_ON(cond) (0)
|
||||
#else /* __CHECKER__ */
|
||||
|
||||
/* Force a compilation error if a constant expression is not a power of 2 */
|
||||
|
|
@ -83,6 +84,14 @@ struct pt_regs;
|
|||
*/
|
||||
#define BUILD_BUG() BUILD_BUG_ON_MSG(1, "BUILD_BUG failed")
|
||||
|
||||
#define MAYBE_BUILD_BUG_ON(cond) \
|
||||
do { \
|
||||
if (__builtin_constant_p((cond))) \
|
||||
BUILD_BUG_ON(cond); \
|
||||
else \
|
||||
BUG_ON(cond); \
|
||||
} while (0)
|
||||
|
||||
#endif /* __CHECKER__ */
|
||||
|
||||
#ifdef CONFIG_GENERIC_BUG
|
||||
|
|
|
|||
|
|
@ -189,4 +189,109 @@ static inline void guts_set_pmuxcr_dma(struct ccsr_guts __iomem *guts,
|
|||
|
||||
#endif
|
||||
|
||||
struct ccsr_rcpm_v1 {
|
||||
u8 res0000[4];
|
||||
__be32 cdozsr; /* 0x0004 Core Doze Status Register */
|
||||
u8 res0008[4];
|
||||
__be32 cdozcr; /* 0x000c Core Doze Control Register */
|
||||
u8 res0010[4];
|
||||
__be32 cnapsr; /* 0x0014 Core Nap Status Register */
|
||||
u8 res0018[4];
|
||||
__be32 cnapcr; /* 0x001c Core Nap Control Register */
|
||||
u8 res0020[4];
|
||||
__be32 cdozpsr; /* 0x0024 Core Doze Previous Status Register */
|
||||
u8 res0028[4];
|
||||
__be32 cnappsr; /* 0x002c Core Nap Previous Status Register */
|
||||
u8 res0030[4];
|
||||
__be32 cwaitsr; /* 0x0034 Core Wait Status Register */
|
||||
u8 res0038[4];
|
||||
__be32 cwdtdsr; /* 0x003c Core Watchdog Detect Status Register */
|
||||
__be32 powmgtcsr; /* 0x0040 PM Control&Status Register */
|
||||
#define RCPM_POWMGTCSR_SLP 0x00020000
|
||||
u8 res0044[12];
|
||||
__be32 ippdexpcr; /* 0x0050 IP Powerdown Exception Control Register */
|
||||
u8 res0054[16];
|
||||
__be32 cpmimr; /* 0x0064 Core PM IRQ Mask Register */
|
||||
u8 res0068[4];
|
||||
__be32 cpmcimr; /* 0x006c Core PM Critical IRQ Mask Register */
|
||||
u8 res0070[4];
|
||||
__be32 cpmmcmr; /* 0x0074 Core PM Machine Check Mask Register */
|
||||
u8 res0078[4];
|
||||
__be32 cpmnmimr; /* 0x007c Core PM NMI Mask Register */
|
||||
u8 res0080[4];
|
||||
__be32 ctbenr; /* 0x0084 Core Time Base Enable Register */
|
||||
u8 res0088[4];
|
||||
__be32 ctbckselr; /* 0x008c Core Time Base Clock Select Register */
|
||||
u8 res0090[4];
|
||||
__be32 ctbhltcr; /* 0x0094 Core Time Base Halt Control Register */
|
||||
u8 res0098[4];
|
||||
__be32 cmcpmaskcr; /* 0x00a4 Core Machine Check Mask Register */
|
||||
};
|
||||
|
||||
struct ccsr_rcpm_v2 {
|
||||
u8 res_00[12];
|
||||
__be32 tph10sr0; /* Thread PH10 Status Register */
|
||||
u8 res_10[12];
|
||||
__be32 tph10setr0; /* Thread PH10 Set Control Register */
|
||||
u8 res_20[12];
|
||||
__be32 tph10clrr0; /* Thread PH10 Clear Control Register */
|
||||
u8 res_30[12];
|
||||
__be32 tph10psr0; /* Thread PH10 Previous Status Register */
|
||||
u8 res_40[12];
|
||||
__be32 twaitsr0; /* Thread Wait Status Register */
|
||||
u8 res_50[96];
|
||||
__be32 pcph15sr; /* Physical Core PH15 Status Register */
|
||||
__be32 pcph15setr; /* Physical Core PH15 Set Control Register */
|
||||
__be32 pcph15clrr; /* Physical Core PH15 Clear Control Register */
|
||||
__be32 pcph15psr; /* Physical Core PH15 Prev Status Register */
|
||||
u8 res_c0[16];
|
||||
__be32 pcph20sr; /* Physical Core PH20 Status Register */
|
||||
__be32 pcph20setr; /* Physical Core PH20 Set Control Register */
|
||||
__be32 pcph20clrr; /* Physical Core PH20 Clear Control Register */
|
||||
__be32 pcph20psr; /* Physical Core PH20 Prev Status Register */
|
||||
__be32 pcpw20sr; /* Physical Core PW20 Status Register */
|
||||
u8 res_e0[12];
|
||||
__be32 pcph30sr; /* Physical Core PH30 Status Register */
|
||||
__be32 pcph30setr; /* Physical Core PH30 Set Control Register */
|
||||
__be32 pcph30clrr; /* Physical Core PH30 Clear Control Register */
|
||||
__be32 pcph30psr; /* Physical Core PH30 Prev Status Register */
|
||||
u8 res_100[32];
|
||||
__be32 ippwrgatecr; /* IP Power Gating Control Register */
|
||||
u8 res_124[12];
|
||||
__be32 powmgtcsr; /* Power Management Control & Status Reg */
|
||||
#define RCPM_POWMGTCSR_LPM20_RQ 0x00100000
|
||||
#define RCPM_POWMGTCSR_LPM20_ST 0x00000200
|
||||
#define RCPM_POWMGTCSR_P_LPM20_ST 0x00000100
|
||||
u8 res_134[12];
|
||||
__be32 ippdexpcr[4]; /* IP Powerdown Exception Control Reg */
|
||||
u8 res_150[12];
|
||||
__be32 tpmimr0; /* Thread PM Interrupt Mask Reg */
|
||||
u8 res_160[12];
|
||||
__be32 tpmcimr0; /* Thread PM Crit Interrupt Mask Reg */
|
||||
u8 res_170[12];
|
||||
__be32 tpmmcmr0; /* Thread PM Machine Check Interrupt Mask Reg */
|
||||
u8 res_180[12];
|
||||
__be32 tpmnmimr0; /* Thread PM NMI Mask Reg */
|
||||
u8 res_190[12];
|
||||
__be32 tmcpmaskcr0; /* Thread Machine Check Mask Control Reg */
|
||||
__be32 pctbenr; /* Physical Core Time Base Enable Reg */
|
||||
__be32 pctbclkselr; /* Physical Core Time Base Clock Select */
|
||||
__be32 tbclkdivr; /* Time Base Clock Divider Register */
|
||||
u8 res_1ac[4];
|
||||
__be32 ttbhltcr[4]; /* Thread Time Base Halt Control Register */
|
||||
__be32 clpcl10sr; /* Cluster PCL10 Status Register */
|
||||
__be32 clpcl10setr; /* Cluster PCL30 Set Control Register */
|
||||
__be32 clpcl10clrr; /* Cluster PCL30 Clear Control Register */
|
||||
__be32 clpcl10psr; /* Cluster PCL30 Prev Status Register */
|
||||
__be32 cddslpsetr; /* Core Domain Deep Sleep Set Register */
|
||||
__be32 cddslpclrr; /* Core Domain Deep Sleep Clear Register */
|
||||
__be32 cdpwroksetr; /* Core Domain Power OK Set Register */
|
||||
__be32 cdpwrokclrr; /* Core Domain Power OK Clear Register */
|
||||
__be32 cdpwrensr; /* Core Domain Power Enable Status Register */
|
||||
__be32 cddslsr; /* Core Domain Deep Sleep Status Register */
|
||||
u8 res_1e8[8];
|
||||
__be32 dslpcntcr[8]; /* Deep Sleep Counter Cfg Register */
|
||||
u8 res_300[3568];
|
||||
};
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -111,9 +111,6 @@ void __split_huge_pmd(struct vm_area_struct *vma, pmd_t *pmd,
|
|||
void split_huge_pmd_address(struct vm_area_struct *vma, unsigned long address,
|
||||
bool freeze, struct page *page);
|
||||
|
||||
#if HPAGE_PMD_ORDER >= MAX_ORDER
|
||||
#error "hugepages can't be allocated by the buddy allocator"
|
||||
#endif
|
||||
extern int hugepage_madvise(struct vm_area_struct *vma,
|
||||
unsigned long *vm_flags, int advice);
|
||||
extern void vma_adjust_trans_huge(struct vm_area_struct *vma,
|
||||
|
|
|
|||
|
|
@ -784,6 +784,7 @@ extern struct list_head pci_root_buses; /* list of all known PCI buses */
|
|||
int no_pci_devices(void);
|
||||
|
||||
void pcibios_resource_survey_bus(struct pci_bus *bus);
|
||||
void pcibios_bus_add_device(struct pci_dev *pdev);
|
||||
void pcibios_add_bus(struct pci_bus *bus);
|
||||
void pcibios_remove_bus(struct pci_bus *bus);
|
||||
void pcibios_fixup_bus(struct pci_bus *);
|
||||
|
|
@ -1733,6 +1734,8 @@ int pci_iov_virtfn_devfn(struct pci_dev *dev, int id);
|
|||
|
||||
int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn);
|
||||
void pci_disable_sriov(struct pci_dev *dev);
|
||||
int pci_iov_add_virtfn(struct pci_dev *dev, int id, int reset);
|
||||
void pci_iov_remove_virtfn(struct pci_dev *dev, int id, int reset);
|
||||
int pci_num_vf(struct pci_dev *dev);
|
||||
int pci_vfs_assigned(struct pci_dev *dev);
|
||||
int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs);
|
||||
|
|
@ -1749,6 +1752,12 @@ static inline int pci_iov_virtfn_devfn(struct pci_dev *dev, int id)
|
|||
}
|
||||
static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
|
||||
{ return -ENODEV; }
|
||||
static inline int pci_iov_add_virtfn(struct pci_dev *dev, int id, int reset)
|
||||
{
|
||||
return -ENOSYS;
|
||||
}
|
||||
static inline void pci_iov_remove_virtfn(struct pci_dev *dev,
|
||||
int id, int reset) { }
|
||||
static inline void pci_disable_sriov(struct pci_dev *dev) { }
|
||||
static inline int pci_num_vf(struct pci_dev *dev) { return 0; }
|
||||
static inline int pci_vfs_assigned(struct pci_dev *dev)
|
||||
|
|
|
|||
Loading…
Reference in a new issue