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ARM: dts: msm: Enable qcedev and qcrypto on olympic
Add dts entries for qcedev and qcrypto modules on olympic target. Change-Id: Iffd514a3246409416cc53d87d31176e31a9bdf7c
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@ -1203,6 +1203,48 @@
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thermal_zones: thermal-zones {
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};
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qcom_cedev: qcedev@1de0000 {
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compatible = "qcom,qcedev";
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reg = <0x1de0000 0x20000>,
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<0x1dc4000 0x24000>;
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reg-names = "crypto-base","crypto-bam-base";
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interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
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qcom,bam-pipe-pair = <3>;
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qcom,ce-hw-instance = <0>;
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qcom,ce-device = <0>;
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qcom,bam-ee = <0>;
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qcom,ce-hw-shared;
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interconnect-names = "data_path";
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interconnects = <&system_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>;
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qcom,no-clock-support;
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iommus = <&apps_smmu 0x0066 0x0011>,
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<&apps_smmu 0x0076 0x0011>;
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};
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qcom_crypto: qcrypto@1de0000 {
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compatible = "qcom,qcrypto";
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reg = <0x1de0000 0x20000>,
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<0x1dc4000 0x24000>;
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reg-names = "crypto-base","crypto-bam-base";
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interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
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qcom,bam-pipe-pair = <2>;
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qcom,ce-hw-instance = <0>;
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qcom,ce-device = <0>;
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qcom,bam-ee = <0>;
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qcom,ce-hw-shared;
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interconnect-names = "data_path";
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interconnects = <&system_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>;
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qcom,use-sw-aes-cbc-ecb-ctr-algo;
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qcom,use-sw-aes-xts-algo;
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qcom,use-sw-aes-ccm-algo;
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qcom,use-sw-aead-algo;
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qcom,use-sw-ahash-algo;
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qcom,use-sw-hmac-algo;
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qcom,no-clock-support;
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iommus = <&apps_smmu 0x0064 0x0011>,
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<&apps_smmu 0x0074 0x0011>;
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};
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qcom,rmtfs_sharedmem@0 {
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compatible = "qcom,sharedmem-uio";
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reg = <0x0 0x400000>;
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