ARM: dts: msm: Enable qcedev and qcrypto on olympic

Add dts entries for qcedev and qcrypto modules on
olympic target.

Change-Id: Iffd514a3246409416cc53d87d31176e31a9bdf7c
This commit is contained in:
Anmolpreet Kaur 2020-12-09 17:37:54 +05:30
commit d67d8d60a2

View file

@ -1203,6 +1203,48 @@
thermal_zones: thermal-zones {
};
qcom_cedev: qcedev@1de0000 {
compatible = "qcom,qcedev";
reg = <0x1de0000 0x20000>,
<0x1dc4000 0x24000>;
reg-names = "crypto-base","crypto-bam-base";
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
qcom,bam-pipe-pair = <3>;
qcom,ce-hw-instance = <0>;
qcom,ce-device = <0>;
qcom,bam-ee = <0>;
qcom,ce-hw-shared;
interconnect-names = "data_path";
interconnects = <&system_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>;
qcom,no-clock-support;
iommus = <&apps_smmu 0x0066 0x0011>,
<&apps_smmu 0x0076 0x0011>;
};
qcom_crypto: qcrypto@1de0000 {
compatible = "qcom,qcrypto";
reg = <0x1de0000 0x20000>,
<0x1dc4000 0x24000>;
reg-names = "crypto-base","crypto-bam-base";
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
qcom,bam-pipe-pair = <2>;
qcom,ce-hw-instance = <0>;
qcom,ce-device = <0>;
qcom,bam-ee = <0>;
qcom,ce-hw-shared;
interconnect-names = "data_path";
interconnects = <&system_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>;
qcom,use-sw-aes-cbc-ecb-ctr-algo;
qcom,use-sw-aes-xts-algo;
qcom,use-sw-aes-ccm-algo;
qcom,use-sw-aead-algo;
qcom,use-sw-ahash-algo;
qcom,use-sw-hmac-algo;
qcom,no-clock-support;
iommus = <&apps_smmu 0x0064 0x0011>,
<&apps_smmu 0x0074 0x0011>;
};
qcom,rmtfs_sharedmem@0 {
compatible = "qcom,sharedmem-uio";
reg = <0x0 0x400000>;