From a83ad850546e6f8e5959db4cee2971b5bf8ecb91 Mon Sep 17 00:00:00 2001 From: Xiaoyu Ye Date: Thu, 20 Dec 2018 17:09:28 -0800 Subject: [PATCH] asoc: msm-dai-q6-v2: add a new VA macro DMA TX CPU DAI VA macro in Kona has three DMA TX ports. Add a new VA DMA TX CPU DAI in the DSP DAI driver to use it on Kona. Change-Id: Ic144dbed1bd63af6f0150f854fdb74d57e156839 Signed-off-by: Xiaoyu Ye --- asoc/msm-dai-q6-v2.c | 25 +++++++++++++++++++++++++ include/dsp/apr_audio-v2.h | 3 +++ 2 files changed, 28 insertions(+) diff --git a/asoc/msm-dai-q6-v2.c b/asoc/msm-dai-q6-v2.c index 02e454e3939a..acca44360788 100644 --- a/asoc/msm-dai-q6-v2.c +++ b/asoc/msm-dai-q6-v2.c @@ -10654,6 +10654,31 @@ static struct snd_soc_dai_driver msm_dai_q6_cdc_dma_dai[] = { .probe = msm_dai_q6_dai_cdc_dma_probe, .remove = msm_dai_q6_dai_cdc_dma_remove, }, + { + .capture = { + .stream_name = "VA CDC DMA2 Capture", + .aif_name = "VA_CDC_DMA_TX_2", + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | + SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | + SNDRV_PCM_RATE_192000 | SNDRV_PCM_RATE_352800 | + SNDRV_PCM_RATE_384000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S24_LE | + SNDRV_PCM_FMTBIT_S24_3LE, + .channels_min = 1, + .channels_max = 8, + .rate_min = 8000, + .rate_max = 384000, + }, + .name = "VA_CDC_DMA_TX_2", + .ops = &msm_dai_q6_cdc_dma_ops, + .id = AFE_PORT_ID_VA_CODEC_DMA_TX_2, + .probe = msm_dai_q6_dai_cdc_dma_probe, + .remove = msm_dai_q6_dai_cdc_dma_remove, + }, { .playback = { .stream_name = "RX CDC DMA0 Playback", diff --git a/include/dsp/apr_audio-v2.h b/include/dsp/apr_audio-v2.h index 475027682f84..f5f6da786b96 100644 --- a/include/dsp/apr_audio-v2.h +++ b/include/dsp/apr_audio-v2.h @@ -1570,6 +1570,9 @@ struct adm_cmd_connect_afe_port_v5 { /* AFE VA Codec DMA Tx port 1 */ #define AFE_PORT_ID_VA_CODEC_DMA_TX_1 0xB023 +/* AFE VA Codec DMA Tx port 2 */ +#define AFE_PORT_ID_VA_CODEC_DMA_TX_2 0xB025 + /* AFE Rx Codec DMA Rx port 0 */ #define AFE_PORT_ID_RX_CODEC_DMA_RX_0 0xB030