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Merge branches 'arm/exynos', 'ppc/pamu', 'arm/smmu', 'x86/amd' and 'iommu/fixes' into next
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d6a60fc1a8
15 changed files with 3145 additions and 120 deletions
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@ -58,10 +58,26 @@ struct iommu_domain {
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#define IOMMU_CAP_CACHE_COHERENCY 0x1
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#define IOMMU_CAP_INTR_REMAP 0x2 /* isolates device intrs */
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/*
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* Following constraints are specifc to FSL_PAMUV1:
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* -aperture must be power of 2, and naturally aligned
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* -number of windows must be power of 2, and address space size
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* of each window is determined by aperture size / # of windows
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* -the actual size of the mapped region of a window must be power
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* of 2 starting with 4KB and physical address must be naturally
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* aligned.
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* DOMAIN_ATTR_FSL_PAMUV1 corresponds to the above mentioned contraints.
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* The caller can invoke iommu_domain_get_attr to check if the underlying
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* iommu implementation supports these constraints.
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*/
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enum iommu_attr {
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DOMAIN_ATTR_GEOMETRY,
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DOMAIN_ATTR_PAGING,
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DOMAIN_ATTR_WINDOWS,
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DOMAIN_ATTR_FSL_PAMU_STASH,
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DOMAIN_ATTR_FSL_PAMU_ENABLE,
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DOMAIN_ATTR_FSL_PAMUV1,
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DOMAIN_ATTR_MAX,
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};
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