From 2c7f9aa57281700eed8a92889e7076696e6c89ec Mon Sep 17 00:00:00 2001 From: Yue Ma Date: Mon, 8 Feb 2021 18:25:51 -0800 Subject: [PATCH] cnss2: Increase QMI and MHI timeouts for emulation builds Increase QMI and MHI default timeouts for emulation builds. Also set timeout for MHI power on as multiple default timeout value instead of a fixed number so that it can be changed at runtime for debug purpose. Change-Id: I483a458f54083644f9acd2a484243016901c4776 Signed-off-by: Yue Ma --- drivers/net/wireless/cnss2/main.c | 4 +++- drivers/net/wireless/cnss2/pci.c | 8 ++++---- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/net/wireless/cnss2/main.c b/drivers/net/wireless/cnss2/main.c index 1f3ba544d231..cb730ad9ecd8 100644 --- a/drivers/net/wireless/cnss2/main.c +++ b/drivers/net/wireless/cnss2/main.c @@ -36,11 +36,13 @@ #define CNSS_QUIRKS_DEFAULT 0 #ifdef CONFIG_CNSS_EMULATION #define CNSS_MHI_TIMEOUT_DEFAULT 90000 +#define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000 +#define CNSS_QMI_TIMEOUT_DEFAULT 90000 #else #define CNSS_MHI_TIMEOUT_DEFAULT 0 -#endif #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25 #define CNSS_QMI_TIMEOUT_DEFAULT 10000 +#endif #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000 diff --git a/drivers/net/wireless/cnss2/pci.c b/drivers/net/wireless/cnss2/pci.c index 3a0d43e2b4ea..144814b6d4c0 100644 --- a/drivers/net/wireless/cnss2/pci.c +++ b/drivers/net/wireless/cnss2/pci.c @@ -74,7 +74,6 @@ static DEFINE_SPINLOCK(time_sync_lock); #define FORCE_WAKE_DELAY_MIN_US 4000 #define FORCE_WAKE_DELAY_MAX_US 6000 #define FORCE_WAKE_DELAY_TIMEOUT_US 60000 -#define MHI_MISSION_MODE_TIMEOUT 60000 #define POWER_ON_RETRY_MAX_TIMES 3 #define POWER_ON_RETRY_DELAY_MS 200 @@ -1749,10 +1748,11 @@ int cnss_pci_start_mhi(struct cnss_pci_data *pci_priv) return ret; timeout = pci_priv->mhi_ctrl->timeout_ms; + /* For non-perf builds the timeout is 10 (default) * 6 seconds */ if (cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01) - pci_priv->mhi_ctrl->timeout_ms = MHI_MISSION_MODE_TIMEOUT; - else /* For Perf builds the timeout is 30sec*/ - pci_priv->mhi_ctrl->timeout_ms = (MHI_MISSION_MODE_TIMEOUT / 2); + pci_priv->mhi_ctrl->timeout_ms *= 6; + else /* For perf builds the timeout is 10 (default) * 3 seconds */ + pci_priv->mhi_ctrl->timeout_ms *= 3; ret = cnss_pci_set_mhi_state(pci_priv, CNSS_MHI_POWER_ON); if (ret == 0)