From d7ae7e47affe5c24b4c0759041da38c80587b552 Mon Sep 17 00:00:00 2001 From: Steven Cohen Date: Sat, 14 Mar 2020 19:38:40 -0400 Subject: [PATCH] ARM: dts: msm: enable SDE RSC rev 4 on lahaina Enable the SDE RSC rev4 driver and HW, and update the interconnect bindings. Change-Id: I85336dac6d0c4081350259c636c1159c32c582a5 --- display/lahaina-sde-display.dtsi | 2 +- display/lahaina-sde.dtsi | 35 ++++++++++++-------------------- 2 files changed, 14 insertions(+), 23 deletions(-) diff --git a/display/lahaina-sde-display.dtsi b/display/lahaina-sde-display.dtsi index 630ac106a3c2..3b30d34f777b 100644 --- a/display/lahaina-sde-display.dtsi +++ b/display/lahaina-sde-display.dtsi @@ -141,7 +141,7 @@ }; &mdss_mdp { - connectors = <&sde_dp &sde_wb &sde_dsi>; + connectors = <&sde_dp &sde_wb &sde_dsi &sde_rscc>; }; /* PHY TIMINGS REVISION YB */ diff --git a/display/lahaina-sde.dtsi b/display/lahaina-sde.dtsi index 5066ab3ff0ca..31fdba926563 100644 --- a/display/lahaina-sde.dtsi +++ b/display/lahaina-sde.dtsi @@ -29,7 +29,6 @@ 460000000>; mmcx-supply = <&VDD_MMCX_LEVEL>; - vdd-supply = <&disp_cc_mdss_core_gdsc>; /* interrupt config */ interrupts = ; @@ -235,14 +234,12 @@ qcom,sde-secure-sid-mask = <0x4000821>; /* data and reg bus scale settings */ - interconnects = - <&mmss_noc MASTER_MDP0 &gem_noc SLAVE_LLCC>, - <&mmss_noc MASTER_MDP1 &gem_noc SLAVE_LLCC>, - <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>, - <&gem_noc MASTER_APPSS_PROC + interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>, + <&mmss_noc MASTER_MDP1 &mc_virt SLAVE_EBI1>, + <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_DISPLAY_CFG>; interconnect-names = "qcom,sde-data-bus0", "qcom,sde-data-bus1", - "qcom,sde-ebi-bus", "qcom,sde-reg-bus"; + "qcom,sde-reg-bus"; qcom,sde-sspp-vig-blocks { qcom,sde-vig-csc-off = <0x1a00>; @@ -294,15 +291,6 @@ qcom,supply-enable-load = <0>; qcom,supply-disable-load = <0>; }; - - qcom,platform-supply-entry@1 { - reg = <0>; - qcom,supply-name = "vdd"; - qcom,supply-min-voltage = <0>; - qcom,supply-max-voltage = <0>; - qcom,supply-enable-load = <0>; - qcom,supply-disable-load = <0>; - }; }; smmu_sde_unsec: qcom,smmu_sde_unsec_cb { @@ -461,11 +449,10 @@ sde_rscc: qcom,sde_rscc@af20000 { cell-index = <0>; compatible = "qcom,sde-rsc"; - status = "disabled"; - reg = <0xaf20000 0x3c50>, + reg = <0xaf20000 0x4d68>, <0xaf30000 0x3fd4>; reg-names = "drv", "wrapper"; - qcom,sde-rsc-version = <3>; + qcom,sde-rsc-version = <4>; qcom,sde-dram-channels = <2>; @@ -474,10 +461,14 @@ <&clock_dispcc DISP_CC_MDSS_NON_GDSC_AHB_CLK>, <&clock_dispcc DISP_CC_MDSS_RSCC_AHB_CLK>; clock-names = "vsync_clk", "gdsc_clk", "iface_clk"; + + qcom,msm-bus,active-only; interconnects = - <&gem_noc MASTER_APPSS_PROC - &config_noc SLAVE_DISPLAY_CFG>; - interconnect-names = "qcom,sde-reg-bus"; + <&mmss_noc MASTER_MDP0_DISP &gem_noc SLAVE_LLCC_DISP>, + <&mmss_noc MASTER_MDP1_DISP &gem_noc SLAVE_LLCC_DISP>, + <&mc_virt MASTER_LLCC_DISP &mc_virt SLAVE_EBI1_DISP>; + interconnect-names = "qcom,sde-data-bus0", "qcom,sde-data-bus1", + "qcom,sde-ebi-bus"; }; mdss_dsi0: qcom,mdss_dsi_ctrl0@ae94000 {