From d7b1781300a9d8475f02d0a897239f1b24b3d24f Mon Sep 17 00:00:00 2001
From: Raghavendra Rao Ananta <rananta@quicinc.com>
Date: Tue, 22 Oct 2019 18:44:16 -0700
Subject: [PATCH] ARM: dts: msm: Add ARM PMU node for Lahaina

Add the ARM CPU Performace Monitor Unit (PMU) device-tree node
for measuring various CPU performance events such as cycles,
cache misses, and so on.

Change-Id: I2c5817d4ed97db97fa38b235204175d01c41fed8
---
 qcom/lahaina.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/qcom/lahaina.dtsi b/qcom/lahaina.dtsi
index 78d96e4a5924..03c79736c4b9 100644
--- a/qcom/lahaina.dtsi
+++ b/qcom/lahaina.dtsi
@@ -456,6 +456,12 @@
 		};
 	};
 
+	cpu_pmu: cpu-pmu {
+		compatible = "arm,armv8-pmuv3";
+		qcom,irq-is-percpu;
+		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
 	qcom,msm-imem@146bf000 {
 		compatible = "qcom,msm-imem";
 		reg = <0x146bf000 0x1000>;