From 90f9f30b8419705ec290497ad6823432d158ab34 Mon Sep 17 00:00:00 2001 From: Meng Wang Date: Fri, 28 Aug 2020 11:20:58 +0800 Subject: [PATCH] ARM: dts: msm: update setting for tert MI2S on Lahaina Update setting for TERT MI2S on Lahaina devices. Change-Id: I58ab19562531fadc9badb7759f13ee8e3ce55bdc --- qcom/lahaina-cdp.dtsi | 17 ++++++++++------- qcom/lahaina-mtp.dtsi | 20 +++++++++++++------- qcom/lahaina-qrd-common.dtsi | 22 +++++++++++++--------- 3 files changed, 36 insertions(+), 23 deletions(-) diff --git a/qcom/lahaina-cdp.dtsi b/qcom/lahaina-cdp.dtsi index f6d55be6b7ae..d2725015880a 100644 --- a/qcom/lahaina-cdp.dtsi +++ b/qcom/lahaina-cdp.dtsi @@ -201,17 +201,20 @@ status = "ok"; }; -&dai_mi2s2 { - qcom,msm-mi2s-tx-lines = <1>; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&tert_mi2s_sck_active &tert_mi2s_ws_active - &tert_mi2s_sd0_active>; - pinctrl-1 = <&tert_mi2s_sck_sleep &tert_mi2s_ws_sleep - &tert_mi2s_sd0_sleep>; +&q6core { + cdc_tert_mi2s_gpios: msm_cdc_pinctrl_tert { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&tert_mi2s_sck_active &tert_mi2s_ws_active + &tert_mi2s_sd0_active>; + pinctrl-1 = <&tert_mi2s_sck_sleep &tert_mi2s_ws_sleep + &tert_mi2s_sd0_sleep>; + }; }; &lahaina_snd { qcom,model = "lahaina-cdp-snd-card"; + qcom,tert-mi2s-gpios = <&cdc_tert_mi2s_gpios>; }; &usb1 { diff --git a/qcom/lahaina-mtp.dtsi b/qcom/lahaina-mtp.dtsi index f2094b9e91a2..6a4d134eeaf6 100644 --- a/qcom/lahaina-mtp.dtsi +++ b/qcom/lahaina-mtp.dtsi @@ -182,13 +182,19 @@ status = "ok"; }; -&dai_mi2s2 { - qcom,msm-mi2s-tx-lines = <1>; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&tert_mi2s_sck_active &tert_mi2s_ws_active - &tert_mi2s_sd0_active>; - pinctrl-1 = <&tert_mi2s_sck_sleep &tert_mi2s_ws_sleep - &tert_mi2s_sd0_sleep>; +&q6core { + cdc_tert_mi2s_gpios: msm_cdc_pinctrl_tert { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&tert_mi2s_sck_active &tert_mi2s_ws_active + &tert_mi2s_sd0_active>; + pinctrl-1 = <&tert_mi2s_sck_sleep &tert_mi2s_ws_sleep + &tert_mi2s_sd0_sleep>; + }; +}; + +&lahaina_snd { + qcom,tert-mi2s-gpios = <&cdc_tert_mi2s_gpios>; }; &usb1 { diff --git a/qcom/lahaina-qrd-common.dtsi b/qcom/lahaina-qrd-common.dtsi index 54706c61fe95..7d7249f6b4c1 100644 --- a/qcom/lahaina-qrd-common.dtsi +++ b/qcom/lahaina-qrd-common.dtsi @@ -97,6 +97,17 @@ }; }; +&q6core { + cdc_tert_mi2s_gpios: msm_cdc_pinctrl_tert { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&tert_mi2s_sck_active &tert_mi2s_ws_active + &tert_mi2s_sd0_active>; + pinctrl-1 = <&tert_mi2s_sck_sleep &tert_mi2s_ws_sleep + &tert_mi2s_sd0_sleep>; + }; +}; + &lahaina_snd { qcom,model = "lahaina-qrd-snd-card"; @@ -164,6 +175,8 @@ qcom,msm-mbhc-usbc-audio-supported = <1>; qcom,msm-mbhc-hphl-swh = <0>; qcom,msm-mbhc-gnd-swh = <0>; + + qcom,tert-mi2s-gpios = <&cdc_tert_mi2s_gpios>; }; &usb1 { @@ -214,15 +227,6 @@ }; }; -&dai_mi2s2 { - qcom,msm-mi2s-tx-lines = <1>; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&tert_mi2s_sck_active &tert_mi2s_ws_active - &tert_mi2s_sd0_active>; - pinctrl-1 = <&tert_mi2s_sck_sleep &tert_mi2s_ws_sleep - &tert_mi2s_sd0_sleep>; -}; - &battery_charger { qcom,thermal-mitigation = <10000000 9500000 9000000 8500000 8000000 7500000 7000000 6500000 6000000 5500000