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SCSI misc on 20151113
Sorry for the delay in this patch which was mostly caused by getting the merger of the mpt2/mpt3sas driver, which was seen as an essential item of maintenance work to do before the drivers diverge too much. Unfortunately, this caused a compile failure (detected by linux-next), which then had to be fixed up and incubated. In addition to the mpt2/3sas rework, there are updates from pm80xx, lpfc, bnx2fc, hpsa, ipr, aacraid, megaraid_sas, storvsc and ufs plus an assortment of changes including some year 2038 issues, a fix for a remove before detach issue in some drivers and a couple of other minor issues. Signed-off-by: James Bottomley <[email protected]> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQEcBAABAgAGBQJWRnpiAAoJEDeqqVYsXL0MJd0IAIkNP1q/6ksMw/lam2UlbdxN zFsFOIhGM3xLnBFehbCx7JW3cmybA7WC5jhMjaa1OeJmYHLpwbTzvVwrLs2l/0y1 /S+G0wwxROZfIKj/1EO3oKbSPCu9N3lStxOnmNXt5PSUEzAXrTqSNTtnMf2ZGh7j bQxTWEJe+66GckgGw4ozTXJHWXqM/Zs/FsYjn2h/WzFhFv8utr7zRSzHMVjcqpLG TK/Lt03hiTGqiignKrV9W6JzdGTWf2LGIsj/njgR0dxv59cNH8PrHIjZyknSBxgn lblinsCjxDHWnP4BSfTi9MQG1lEiZiWO3Y6TKkKJTgxZ9M0Eitspc+cLOiJ1mpg= =HvQf -----END PGP SIGNATURE----- Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi Pull final round of SCSI updates from James Bottomley: "Sorry for the delay in this patch which was mostly caused by getting the merger of the mpt2/mpt3sas driver, which was seen as an essential item of maintenance work to do before the drivers diverge too much. Unfortunately, this caused a compile failure (detected by linux-next), which then had to be fixed up and incubated. In addition to the mpt2/3sas rework, there are updates from pm80xx, lpfc, bnx2fc, hpsa, ipr, aacraid, megaraid_sas, storvsc and ufs plus an assortment of changes including some year 2038 issues, a fix for a remove before detach issue in some drivers and a couple of other minor issues" * tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (141 commits) mpt3sas: fix inline markers on non inline function declarations sd: Clear PS bit before Mode Select. ibmvscsi: set max_lun to 32 ibmvscsi: display default value for max_id, max_lun and max_channel. mptfusion: don't allow negative bytes in kbuf_alloc_2_sgl() scsi: pmcraid: replace struct timeval with ktime_get_real_seconds() mvumi: 64bit value for seconds_since1970 be2iscsi: Fix bogus WARN_ON length check scsi_scan: don't dump trace when scsi_prep_async_scan() is called twice mpt3sas: Bump mpt3sas driver version to 09.102.00.00 mpt3sas: Single driver module which supports both SAS 2.0 & SAS 3.0 HBAs mpt2sas, mpt3sas: Update the driver versions mpt3sas: setpci reset kernel oops fix mpt3sas: Added OEM Gen2 PnP ID branding names mpt3sas: Refcount fw_events and fix unsafe list usage mpt3sas: Refcount sas_device objects and fix unsafe list usage mpt3sas: sysfs attribute to report Backup Rail Monitor Status mpt3sas: Ported WarpDrive product SSS6200 support mpt3sas: fix for driver fails EEH, recovery from injected pci bus error mpt3sas: Manage MSI-X vectors according to HBA device type ...
This commit is contained in:
Linus Torvalds
commit
d83763f4a6
121 changed files with 6584 additions and 32724 deletions
58
Documentation/devicetree/bindings/ufs/ufs-qcom.txt
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58
Documentation/devicetree/bindings/ufs/ufs-qcom.txt
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@ -0,0 +1,58 @@
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* Qualcomm Technologies Inc Universal Flash Storage (UFS) PHY
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UFSPHY nodes are defined to describe on-chip UFS PHY hardware macro.
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Each UFS PHY node should have its own node.
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To bind UFS PHY with UFS host controller, the controller node should
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contain a phandle reference to UFS PHY node.
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Required properties:
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- compatible : compatible list, contains "qcom,ufs-phy-qmp-20nm"
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or "qcom,ufs-phy-qmp-14nm" according to the relevant phy in use.
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- reg : should contain PHY register address space (mandatory),
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- reg-names : indicates various resources passed to driver (via reg proptery) by name.
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Required "reg-names" is "phy_mem".
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- #phy-cells : This property shall be set to 0
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- vdda-phy-supply : phandle to main PHY supply for analog domain
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- vdda-pll-supply : phandle to PHY PLL and Power-Gen block power supply
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- clocks : List of phandle and clock specifier pairs
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- clock-names : List of clock input name strings sorted in the same
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order as the clocks property. "ref_clk_src", "ref_clk",
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"tx_iface_clk" & "rx_iface_clk" are mandatory but
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"ref_clk_parent" is optional
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Optional properties:
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- vdda-phy-max-microamp : specifies max. load that can be drawn from phy supply
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- vdda-pll-max-microamp : specifies max. load that can be drawn from pll supply
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- vddp-ref-clk-supply : phandle to UFS device ref_clk pad power supply
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- vddp-ref-clk-max-microamp : specifies max. load that can be drawn from this supply
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- vddp-ref-clk-always-on : specifies if this supply needs to be kept always on
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Example:
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ufsphy1: ufsphy@0xfc597000 {
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compatible = "qcom,ufs-phy-qmp-20nm";
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reg = <0xfc597000 0x800>;
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reg-names = "phy_mem";
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#phy-cells = <0>;
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vdda-phy-supply = <&pma8084_l4>;
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vdda-pll-supply = <&pma8084_l12>;
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vdda-phy-max-microamp = <50000>;
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vdda-pll-max-microamp = <1000>;
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clock-names = "ref_clk_src",
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"ref_clk_parent",
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"ref_clk",
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"tx_iface_clk",
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"rx_iface_clk";
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clocks = <&clock_rpm clk_ln_bb_clk>,
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<&clock_gcc clk_pcie_1_phy_ldo >,
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<&clock_gcc clk_ufs_phy_ldo>,
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<&clock_gcc clk_gcc_ufs_tx_cfg_clk>,
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<&clock_gcc clk_gcc_ufs_rx_cfg_clk>;
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};
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ufshc@0xfc598000 {
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...
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phys = <&ufsphy1>;
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phy-names = "ufsphy";
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};
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@ -4,11 +4,18 @@ UFSHC nodes are defined to describe on-chip UFS host controllers.
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Each UFS controller instance should have its own node.
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Required properties:
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- compatible : compatible list, contains "jedec,ufs-1.1"
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- compatible : must contain "jedec,ufs-1.1", may also list one or more
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of the following:
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"qcom,msm8994-ufshc"
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"qcom,msm8996-ufshc"
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"qcom,ufshc"
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- interrupts : <interrupt mapping for UFS host controller IRQ>
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- reg : <registers mapping>
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Optional properties:
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- phys : phandle to UFS PHY node
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- phy-names : the string "ufsphy" when is found in a node, along
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with "phys" attribute, provides phandle to UFS PHY node
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- vdd-hba-supply : phandle to UFS host controller supply regulator node
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- vcc-supply : phandle to VCC supply regulator node
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- vccq-supply : phandle to VCCQ supply regulator node
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@ -54,4 +61,6 @@ Example:
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clocks = <&core 0>, <&ref 0>, <&iface 0>;
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clock-names = "core_clk", "ref_clk", "iface_clk";
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freq-table-hz = <100000000 200000000>, <0 0>, <0 0>;
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phys = <&ufsphy1>;
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phy-names = "ufsphy";
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};
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