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arm64/dt: Add Milan 5G DVT2 dts configuration

Browse source 
According to the change of hardware design, update the device tree
for DVT2

Change-Id: I9a9eee45313c36e755b8350d2bc767f5a40d1a9b
Signed-off-by: wangxf14 <wangxf14@motorola.com>
Reviewed-on: https://gerrit.mot.com/2121910
SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver
Tested-by: Jira Key
Reviewed-by: Minghui Wei <weimh1@motorola.com>
Reviewed-by: Xiaojun Ji <jixj@motorola.com>
Reviewed-by: Huosheng Liao <liaohs@motorola.com>
Submit-Approved: Jira Key
This commit is contained in:
wangxf14 2021-11-19 18:11:02 +08:00 • committed by panyq6
commit d8e71e5ee6
2 changed files with 135 additions and 1 deletions
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4
qcom/Makefile
View file

@ -90,11 +90,13 @@ blair-cypfr-evt-overlay.dtbo-base := blair-moto-base.dtb
dtbo-$(CONFIG_MILANF_DTB) += \
blair-milanf-evb1-overlay.dtbo \
blair-milanf-evb2-overlay.dtbo \
blair-milanf-dvt1-overlay.dtbo
blair-milanf-dvt1-overlay.dtbo \
blair-milanf-dvt2-overlay.dtbo
blair-milanf-evb1-overlay.dtbo-base := blair-moto-base.dtb
blair-milanf-evb2-overlay.dtbo-base := blair-moto-base.dtb
blair-milanf-dvt1-overlay.dtbo-base := blair-moto-base.dtb
blair-milanf-dvt2-overlay.dtbo-base := blair-moto-base.dtb
dtbo-$(CONFIG_RHODEP_DTB) += \
blair-rhodep-evb-overlay.dtbo \

132
qcom/blair-milanf-dvt2-overlay.dts Normal file
View file

@ -0,0 +1,132 @@
/* Copyright (c) 2021, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/plugin/;
#include "blair-nopmi-milanf-common-overlay.dtsi"
/ {
model = "milanf";
compatible = "qcom,blair-milanf", "qcom,blair-moto", "qcom,blair";
qcom,msm-id = <507 0x10000>;
qcom,board-id = <0x49 0xB200>;
};
&rt9426a {
interrupts-extended = <&tlmm 38 IRQ_TYPE_LEVEL_LOW>;
};
&rt9426a_alert {
mux {
pins = "gpio38";
function = "gpio";
};
config {
pins = "gpio38";
drive-strength = <2>;
bias-pull-up;
};
};
&tlmm {
ets_vcc_high {
mux {
pins = "gpio6";
};
config {
pins = "gpio6";
};
};
ets_vcc_low {
mux {
pins = "gpio6";
};
config {
pins = "gpio6";
};
};
nfc_enable_active {
mux {
pins = "gpio48";
};
config {
pins = "gpio48";
};
};
nfc_enable_suspend {
mux {
pins = "gpio48";
};
config {
pins = "gpio48";
};
};
sgm7220_en_n: sgm7220_en_n {
mux {
pins = "gpio58";
function = "gpio";
};
config {
pins = "gpio58";
drive-strength = <2>;
bias-pull-down;
input-enable;
};
};
};
&sgm7220 {
pinctrl-names = "default";
pinctrl-0 = <&sgm7220_int_n &sgm7220_en_n>;
};
&et528 {
egistec,gpio_vcc_en = <&tlmm 6 0x0>;
};
&silead {
avdd-gpios = <&tlmm 6 0x0>;
};
&qupv3_se7_i2c {
st21nfc@8 {
status = "diabled"
};
nq@28 {
compatible = "qcom,sn-nci";
mmi,status = "/chosen", "mmi,nfc", "nxp"
reg = <0x28>;
qcom,sn-irq = <&tlmm 9 0x00>;
qcom,sn-ven = <&tlmm 48 0x00>;
qcom,sn-firm = <&tlmm 8 0x00>;
qcom,sn-clkreq = <&tlmm 7 0x00>;
interrupt-parent = <&tlmm>;
interrupts = <9 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active
&nfc_clk_req_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend
&nfc_clk_req_suspend>;
};
};