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ASoC: da7219: Expose BCLK and WCLK control through CCF
For the purposes of platforms which use the codec as DAI clock master for the CPU and other codec devices, there is the need to not only expose the clock gating of BCLK and WCLK but also the ability to set those rates without going through the ASoC APIs. To make this possible, the previous CCF implementation in the driver has been extended to separate BCLK and WCLK out. WCLK is the parent clock to BCLK, and is also the clock gate for both. BCLK in HW is a factor/multiplier of WCLK so derives from whatever SR is chosen for WCLK, hence the need to make it a child of WCLK for the purposes of CCF. Enabling/disabling either BCLK or WCLK will result in clocks being ungated/gated accordingly. To simplify matters, these clocks can only be configured if the codec is set as master, otherwise CCF control is disallowed. Signed-off-by: Adam Thomson <[email protected]> Signed-off-by: Mark Brown <[email protected]>
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3 changed files with 407 additions and 130 deletions
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@ -33,10 +33,16 @@ enum da7219_mic_amp_in_sel {
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struct da7219_aad_pdata;
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enum da7219_dai_clks {
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DA7219_DAI_WCLK_IDX = 0,
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DA7219_DAI_BCLK_IDX,
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DA7219_DAI_NUM_CLKS,
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};
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struct da7219_pdata {
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bool wakeup_source;
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const char *dai_clks_name;
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const char *dai_clk_names[DA7219_DAI_NUM_CLKS];
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/* Mic */
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enum da7219_micbias_voltage micbias_lvl;
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