Merge "cnss2: Update QMI header file for PCIE gen switch and bdf data"

This commit is contained in:
qctecmdr 2020-08-04 18:37:06 -07:00 • committed by Gerrit - the friendly Code Review server
commit d92a495e75
2 changed files with 150 additions and 3 deletions

View file

@ -782,6 +782,24 @@ struct qmi_elem_info wlfw_ind_register_req_msg_v01_ei[] = {
.offset = offsetof(struct wlfw_ind_register_req_msg_v01,
wfc_call_twt_config_enable),
},
{
.data_type = QMI_OPT_FLAG,
.elem_len = 1,
.elem_size = sizeof(u8),
.array_type = NO_ARRAY,
.tlv_type = 0x22,
.offset = offsetof(struct wlfw_ind_register_req_msg_v01,
qdss_mem_ready_enable_valid),
},
{
.data_type = QMI_UNSIGNED_1_BYTE,
.elem_len = 1,
.elem_size = sizeof(u8),
.array_type = NO_ARRAY,
.tlv_type = 0x22,
.offset = offsetof(struct wlfw_ind_register_req_msg_v01,
qdss_mem_ready_enable),
},
{
.data_type = QMI_EOTI,
.array_type = NO_ARRAY,
@ -1407,6 +1425,24 @@ struct qmi_elem_info wlfw_cap_resp_msg_v01_ei[] = {
.offset = offsetof(struct wlfw_cap_resp_msg_v01,
eeprom_caldata_read_timeout),
},
{
.data_type = QMI_OPT_FLAG,
.elem_len = 1,
.elem_size = sizeof(u8),
.array_type = NO_ARRAY,
.tlv_type = 0x1A,
.offset = offsetof(struct wlfw_cap_resp_msg_v01,
fw_caps_valid),
},
{
.data_type = QMI_UNSIGNED_8_BYTE,
.elem_len = 1,
.elem_size = sizeof(u64),
.array_type = NO_ARRAY,
.tlv_type = 0x1A,
.offset = offsetof(struct wlfw_cap_resp_msg_v01,
fw_caps),
},
{
.data_type = QMI_EOTI,
.array_type = NO_ARRAY,
@ -1560,6 +1596,26 @@ struct qmi_elem_info wlfw_bdf_download_resp_msg_v01_ei[] = {
resp),
.ei_array = qmi_response_type_v01_ei,
},
{
.data_type = QMI_OPT_FLAG,
.elem_len = 1,
.elem_size = sizeof(u8),
.array_type = NO_ARRAY,
.tlv_type = 0x10,
.offset = offsetof(struct
wlfw_bdf_download_resp_msg_v01,
host_bdf_data_valid),
},
{
.data_type = QMI_UNSIGNED_8_BYTE,
.elem_len = 1,
.elem_size = sizeof(u64),
.array_type = NO_ARRAY,
.tlv_type = 0x10,
.offset = offsetof(struct
wlfw_bdf_download_resp_msg_v01,
host_bdf_data),
},
{
.data_type = QMI_EOTI,
.array_type = NO_ARRAY,
@ -4441,3 +4497,49 @@ struct qmi_elem_info wlfw_wfc_call_twt_config_ind_msg_v01_ei[] = {
.tlv_type = QMI_COMMON_TLV_TYPE,
},
};
struct qmi_elem_info wlfw_qdss_mem_ready_ind_msg_v01_ei[] = {
{
.data_type = QMI_EOTI,
.array_type = NO_ARRAY,
.tlv_type = QMI_COMMON_TLV_TYPE,
},
};
struct qmi_elem_info wlfw_pcie_gen_switch_req_msg_v01_ei[] = {
{
.data_type = QMI_SIGNED_4_BYTE_ENUM,
.elem_len = 1,
.elem_size = sizeof(enum wlfw_pcie_gen_speed_v01),
.array_type = NO_ARRAY,
.tlv_type = 0x01,
.offset = offsetof(struct
wlfw_pcie_gen_switch_req_msg_v01,
pcie_speed),
},
{
.data_type = QMI_EOTI,
.array_type = NO_ARRAY,
.tlv_type = QMI_COMMON_TLV_TYPE,
},
};
struct qmi_elem_info wlfw_pcie_gen_switch_resp_msg_v01_ei[] = {
{
.data_type = QMI_STRUCT,
.elem_len = 1,
.elem_size = sizeof(struct qmi_response_type_v01),
.array_type = NO_ARRAY,
.tlv_type = 0x02,
.offset = offsetof(struct
wlfw_pcie_gen_switch_resp_msg_v01,
resp),
.ei_array = qmi_response_type_v01_ei,
},
{
.data_type = QMI_EOTI,
.array_type = NO_ARRAY,
.tlv_type = QMI_COMMON_TLV_TYPE,
},
};

View file

@ -92,6 +92,9 @@
#define QMI_WLFW_ATHDIAG_READ_REQ_V01 0x0030
#define QMI_WLFW_WLAN_CFG_REQ_V01 0x0023
#define QMI_WLFW_IND_REGISTER_RESP_V01 0x0020
#define QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01 0x0053
#define QMI_WLFW_PCIE_GEN_SWITCH_RESP_V01 0x0053
#define QMI_WLFW_QDSS_MEM_READY_IND_V01 0x0052
#define QMI_WLFW_MAX_NUM_MEMORY_REGIONS_V01 2
#define QMI_WLFW_MAX_NUM_MEM_SEG_V01 32
@ -123,6 +126,7 @@ enum wlfw_driver_mode_enum_v01 {
QMI_WLFW_CCPM_V01 = 5,
QMI_WLFW_QVIT_V01 = 6,
QMI_WLFW_CALIBRATION_V01 = 7,
QMI_WLFW_FTM_CALIBRATION_V01 = 10,
WLFW_DRIVER_MODE_ENUM_MAX_VAL_V01 = INT_MAX,
};
@ -197,6 +201,15 @@ enum wlfw_qmi_param_value_v01 {
WLFW_QMI_PARAM_VALUE_MAX_VAL_V01 = INT_MAX,
};
enum wlfw_pcie_gen_speed_v01 {
WLFW_PCIE_GEN_SPEED_MIN_VAL_V01 = INT_MIN,
QMI_PCIE_GEN_SPEED_INVALID_V01 = 0,
QMI_PCIE_GEN_SPEED_1_V01 = 1,
QMI_PCIE_GEN_SPEED_2_V01 = 2,
QMI_PCIE_GEN_SPEED_3_V01 = 3,
WLFW_PCIE_GEN_SPEED_MAX_VAL_V01 = INT_MAX,
};
#define QMI_WLFW_CE_ATTR_FLAGS_V01 ((u32)0x00)
#define QMI_WLFW_CE_ATTR_NO_SNOOP_V01 ((u32)0x01)
#define QMI_WLFW_CE_ATTR_BYTE_SWAP_DATA_V01 ((u32)0x02)
@ -212,6 +225,11 @@ enum wlfw_qmi_param_value_v01 {
#define QMI_WLFW_FW_REJUVENATE_V01 ((u64)0x01ULL)
#define QMI_WLFW_HW_XPA_V01 ((u64)0x01ULL)
#define QMI_WLFW_CBC_FILE_DOWNLOAD_V01 ((u64)0x02ULL)
#define QMI_WLFW_HOST_PCIE_GEN_SWITCH_V01 ((u64)0x01ULL)
struct wlfw_ce_tgt_pipe_cfg_s_v01 {
u32 pipe_num;
enum wlfw_pipedir_enum_v01 pipe_dir;
@ -331,9 +349,11 @@ struct wlfw_ind_register_req_msg_v01 {
u8 m3_dump_upload_req_enable;
u8 wfc_call_twt_config_enable_valid;
u8 wfc_call_twt_config_enable;
u8 qdss_mem_ready_enable_valid;
u8 qdss_mem_ready_enable;
};
#define WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN 78
#define WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN 82
extern struct qmi_elem_info wlfw_ind_register_req_msg_v01_ei[];
struct wlfw_ind_register_resp_msg_v01 {
@ -453,9 +473,11 @@ struct wlfw_cap_resp_msg_v01 {
u32 otp_version;
u8 eeprom_caldata_read_timeout_valid;
u32 eeprom_caldata_read_timeout;
u8 fw_caps_valid;
u64 fw_caps;
};
#define WLFW_CAP_RESP_MSG_V01_MAX_MSG_LEN 235
#define WLFW_CAP_RESP_MSG_V01_MAX_MSG_LEN 246
extern struct qmi_elem_info wlfw_cap_resp_msg_v01_ei[];
struct wlfw_bdf_download_req_msg_v01 {
@ -480,9 +502,11 @@ extern struct qmi_elem_info wlfw_bdf_download_req_msg_v01_ei[];
struct wlfw_bdf_download_resp_msg_v01 {
struct qmi_response_type_v01 resp;
u8 host_bdf_data_valid;
u64 host_bdf_data;
};
#define WLFW_BDF_DOWNLOAD_RESP_MSG_V01_MAX_MSG_LEN 7
#define WLFW_BDF_DOWNLOAD_RESP_MSG_V01_MAX_MSG_LEN 18
extern struct qmi_elem_info wlfw_bdf_download_resp_msg_v01_ei[];
struct wlfw_cal_report_req_msg_v01 {
@ -1155,4 +1179,25 @@ struct wlfw_wfc_call_twt_config_ind_msg_v01 {
#define WLFW_WFC_CALL_TWT_CONFIG_IND_MSG_V01_MAX_MSG_LEN 35
extern struct qmi_elem_info wlfw_wfc_call_twt_config_ind_msg_v01_ei[];
struct wlfw_qdss_mem_ready_ind_msg_v01 {
char placeholder;
};
#define WLFW_QDSS_MEM_READY_IND_MSG_V01_MAX_MSG_LEN 0
extern struct qmi_elem_info wlfw_qdss_mem_ready_ind_msg_v01_ei[];
struct wlfw_pcie_gen_switch_req_msg_v01 {
enum wlfw_pcie_gen_speed_v01 pcie_speed;
};
#define WLFW_PCIE_GEN_SWITCH_REQ_MSG_V01_MAX_MSG_LEN 7
extern struct qmi_elem_info wlfw_pcie_gen_switch_req_msg_v01_ei[];
struct wlfw_pcie_gen_switch_resp_msg_v01 {
struct qmi_response_type_v01 resp;
};
#define WLFW_PCIE_GEN_SWITCH_RESP_MSG_V01_MAX_MSG_LEN 7
extern struct qmi_elem_info wlfw_pcie_gen_switch_resp_msg_v01_ei[];
#endif