From da36413400139ceae76aa2d8b17059d62ec0ce19 Mon Sep 17 00:00:00 2001 From: spuligil Date: Wed, 7 Jan 2026 12:01:49 -0800 Subject: [PATCH] fw-api: CL 31328053 - update fw common interface files Change-Id: I574f5d437acc21948c3cbbbcdc30610f95f4cffe CRs-Fixed: 3830439 --- fw/htt.h | 16 ++++++++- fw/htt_stats.h | 95 +++++++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 109 insertions(+), 2 deletions(-) diff --git a/fw/htt.h b/fw/htt.h index d052173156b8..919575802bc4 100644 --- a/fw/htt.h +++ b/fw/htt.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2011-2021 The Linux Foundation. All rights reserved. - * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2026 Qualcomm Innovation Center, Inc. All rights reserved. * * Previously licensed under the ISC license by Qualcomm Atheros, Inc. * @@ -890,6 +890,20 @@ typedef enum { HTT_STATS_RX_PDEV_UL_MUMIMO_TRIG_BN_TAG = 237, /* htt_stats_rx_pdev_ul_mumimo_trig_bn_tlv, TOPIC=advanced */ HTT_STATS_RX_PDEV_BN_UL_MIMO_USER_TAG = 238, /* htt_stats_rx_pdev_bn_ul_mimo_user_tlv */ HTT_STATS_TX_PDEV_BN_UL_MU_MIMO_TAG = 239, /* htt_stats_tx_pdev_bn_ul_mu_mimo_tlv */ + /* HTT_STATS_PDEV_ANI_HIST_TAG: + * htt_stats_pdev_ani_hist_tlv + * ani_hist_type: + * 0 = 1 sec, + * 1 = granular + * 2 = 1 sec disabled + * 3 = granular disabled + */ + HTT_STATS_PDEV_ANI_HIST_TAG = 240, + HTT_STATS_ANI_SCALAR_TAG = 241, /* htt_stats_ani_scalar_tlv */ + HTT_STATS_ANI_PKT_CNT_TAG = 242, /* htt_stats_ani_pkt_cnt_tlv */ + HTT_STATS_ANI_CRC_PASS_TAG = 243, /* htt_stats_ani_crc_pass_tlv */ + HTT_STATS_ANI_PER_BLK_ERR_TAG = 244, /* htt_stats_ani_per_blk_err_tlv */ + HTT_STATS_ANI_OTA_ERR_TAG = 245, /* htt_stats_ani_ota_err_tlv */ HTT_STATS_MAX_TAG, } htt_stats_tlv_tag_t; diff --git a/fw/htt_stats.h b/fw/htt_stats.h index faa6680df3f7..69973598075d 100644 --- a/fw/htt_stats.h +++ b/fw/htt_stats.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2017-2021 The Linux Foundation. All rights reserved. - * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2026 Qualcomm Innovation Center, Inc. All rights reserved. * * Permission to use, copy, modify, and/or distribute this software for * any purpose with or without fee is hereby granted, provided that the @@ -882,6 +882,14 @@ enum htt_dbg_ext_stats_type { */ HTT_DBG_EXT_STATS_PDEV_FTM_TPCCAL_EXT = 80, + /** HTT_DBG_EXT_STATS_ANI_HISTOGRAM + * PARAMS: + * - No Params + * RESP MSG: + * - htt_stats_phy_ani_hist_tlv + * */ + HTT_DBG_EXT_STATS_ANI_HISTOGRAM = 81, + /* keep this last */ HTT_DBG_NUM_EXT_STATS = 256, @@ -12330,6 +12338,91 @@ typedef struct { } htt_vdevs_txrx_stats_t; #endif /* ATH_TARGET */ +typedef struct { + htt_tlv_hdr_t tlv_hdr; + /** The channel number on which these stats were collected */ + A_UINT32 chan_num; + /** num of records provided */ + A_UINT32 num_records; + /** Indicates the stats collection interval + * Valid Values: + * 100 - For the 100 ms interval stats histogram + * 1000 - For 1 sec interval histogram + */ + A_UINT32 collection_interval; + /** ani_hist_type: + * single flag to differentiate histogram type + * Valid Values: + * 0 - (default) For 1 sec interval histogram + * 1 - For granular (100 ms) interval histogram + * 2 - 1 sec histogram not enabled + * 3 - Granular histogram not enabled + */ + A_UINT32 ani_hist_type; +} htt_stats_pdev_ani_hist_tlv; + +typedef struct { + htt_tlv_hdr_t tlv_hdr; + A_UINT32 rx_ofdma_timing_err_cnt; + A_UINT32 rx_cck_fail_cnt; + A_UINT32 rx_cck1_fail_cnt; + A_UINT32 rx_cck2_fail_cnt; + A_UINT32 rx_cck7_fail_cnt; + A_UINT32 mactx_abort_cnt; + A_UINT32 macrx_abort_cnt; + A_UINT32 phytx_abort_cnt; + A_UINT32 phyrx_abort_cnt; + A_UINT32 phyrx_defer_abort_cnt; + A_UINT32 rx_sizing1_event_cnt; /* a.k.a sizing1 */ + A_UINT32 rx_sizing2_event_cnt; /* a.k.a sizing2 */ +} htt_stats_ani_scalar_tlv; + +typedef struct { + htt_tlv_hdr_t tlv_hdr; + /* rx_pkt_cnt - + * Received EOP (end-of-packet) count per packet type; + * [0] = 11a; [1] = 11b; [2] = 11n; [3] = 11ac; [4] = 11ax; + * [5] = GF; [6] = EHT; [7] = WUR; [8] = AZ + */ + A_UINT32 rx_pkt_cnt[9]; +} htt_stats_ani_pkt_cnt_tlv; + +typedef struct { + htt_tlv_hdr_t tlv_hdr; + /* rx_pkt_crc_pass_cnt - + * CRC pass count per packet type; + * [0] = 11a; [1] = 11b; [2] = 11n; [3] = 11ac; [4] = 11ax; + * [5] = GF; [6] = EHT; [7] = WUR; [8] = AZ + */ + A_UINT32 rx_pkt_crc_pass_cnt[9]; +} htt_stats_ani_crc_pass_tlv; + +typedef struct { + htt_tlv_hdr_t tlv_hdr; + /* per_blk_err_cnt - + * Error count per error source; + * [0] = unknown; [1] = LSIG; [2] = HTSIG; [3] = VHTSIG; [4] = HESIG; + * [5] = RXTD_OTA; [6] = RXTD_FATAL; [7] = DEMF; [8] = ROBE; + * [9] = PMI; [10] = TXFD; [11] = TXTD; [12] = PHYRF + * [13-15]=RSVD + */ + A_UINT32 per_blk_err_cnt[16]; +} htt_stats_ani_per_blk_err_tlv; + +typedef struct { + htt_tlv_hdr_t tlv_hdr; + /* rx_ota_err_cnt - + * RXTD OTA (over-the-air) error count per error reason; + * [0] = voting fail; [1] = weak det fail; [2] = strong sig fail; + * [3] = cck fail; [4] = power surge; + * [5] = btcf timing timeout error; [6] = btcf packet detect error; + * [7] = coarse timing timeout error + * [8-9]=RSVD + */ + A_UINT32 rx_ota_err_cnt[10]; +} htt_stats_ani_ota_err_tlv; + + /* PAPRD and power boost stats and counters */ typedef struct { htt_tlv_hdr_t tlv_hdr;