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ARM: dts: msm: add jtag_mm node for holi
Add jtag_mm node for holi to support etm save and restore. Change-Id: I725493062199a45fb5f066f8d1d9be6a34e06ce2
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@ -1028,6 +1028,94 @@
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};
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};
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jtag_mm0: jtagmm@9040000 {
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compatible = "qcom,jtagv8-mm";
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reg = <0x9040000 0x1000>;
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reg-names = "etm-base";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "core_clk";
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qcom,coresight-jtagmm-cpu = <&CPU0>;
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};
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jtag_mm1: jtagmm@9140000 {
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compatible = "qcom,jtagv8-mm";
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reg = <0x9140000 0x1000>;
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reg-names = "etm-base";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "core_clk";
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qcom,coresight-jtagmm-cpu = <&CPU1>;
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};
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jtag_mm2: jtagmm@9240000 {
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compatible = "qcom,jtagv8-mm";
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reg = <0x9240000 0x1000>;
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reg-names = "etm-base";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "core_clk";
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qcom,coresight-jtagmm-cpu = <&CPU2>;
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};
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jtag_mm3: jtagmm@9340000 {
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compatible = "qcom,jtagv8-mm";
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reg = <0x9340000 0x1000>;
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reg-names = "etm-base";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "core_clk";
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qcom,coresight-jtagmm-cpu = <&CPU3>;
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};
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jtag_mm4: jtagmm@9440000 {
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compatible = "qcom,jtagv8-mm";
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reg = <0x9440000 0x1000>;
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reg-names = "etm-base";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "core_clk";
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qcom,coresight-jtagmm-cpu = <&CPU4>;
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};
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jtag_mm5: jtagmm@9540000 {
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compatible = "qcom,jtagv8-mm";
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reg = <0x9540000 0x1000>;
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reg-names = "etm-base";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "core_clk";
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qcom,coresight-jtagmm-cpu = <&CPU5>;
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};
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jtag_mm6: jtagmm@9640000 {
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compatible = "qcom,jtagv8-mm";
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reg = <0x9640000 0x1000>;
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reg-names = "etm-base";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "core_clk";
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qcom,coresight-jtagmm-cpu = <&CPU6>;
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};
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jtag_mm7: jtagmm@9740000 {
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compatible = "qcom,jtagv8-mm";
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reg = <0x9740000 0x1000>;
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reg-names = "etm-base";
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
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clock-names = "core_clk";
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qcom,coresight-jtagmm-cpu = <&CPU7>;
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};
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clocks {
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xo_board: xo-board {
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compatible = "fixed-clock";
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